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cdbfaf64 1// SPDX-License-Identifier: GPL-2.0
3cc828fd
MD
2/*
3 * Device Tree Source for the Lager board
4 *
da4ea951
SS
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
6 * Copyright (C) 2014 Cogent Embedded, Inc.
880cb570 7 * Copyright (C) 2015-2016 Renesas Electronics Corporation
3cc828fd
MD
8 */
9
8ea7a44a
KM
10/*
11 * SSI-AK4643
12 *
13 * SW1: 1: AK4643
14 * 2: CN22
15 * 3: ADV7511
16 *
17 * This command is required when Playback/Capture
18 *
19 * amixer set "LINEOUT Mixer DACL" on
e110c541
KM
20 * amixer set "DVC Out" 100%
21 * amixer set "DVC In" 100%
22 *
23 * You can use Mute
24 *
25 * amixer set "DVC Out Mute" on
26 * amixer set "DVC In Mute" on
bd2e4a62
KM
27 *
28 * You can use Volume Ramp
29 *
30 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
31 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
32 * amixer set "DVC Out Ramp" on
33 * aplay xxx.wav &
34 * amixer set "DVC Out" 80% // Volume Down
35 * amixer set "DVC Out" 100% // Volume Up
8ea7a44a
KM
36 */
37
3cc828fd 38/dts-v1/;
31c46cbf 39#include "r8a7790.dtsi"
39fa511b 40#include <dt-bindings/gpio/gpio.h>
f7dcd382 41#include <dt-bindings/input/input.h>
3cc828fd
MD
42
43/ {
44 model = "Lager";
45 compatible = "renesas,lager", "renesas,r8a7790";
46
4e9c4877 47 aliases {
430d7bad 48 serial0 = &scif0;
78c11ec2 49 serial1 = &scifa1;
b2f15ca6 50 i2c8 = &gpioi2c1;
4e65e1b6 51 i2c9 = &gpioi2c2;
1e26fcf3 52 i2c10 = &i2cexio0;
b2f15ca6 53 i2c11 = &i2cexio1;
4e65e1b6 54 i2c12 = &i2chdmi;
e6081b21 55 i2c13 = &i2cpwr;
4e9c4877
LP
56 };
57
3cc828fd 58 chosen {
569dd56c 59 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
57d19f81 60 stdout-path = "serial0:115200n8";
3cc828fd
MD
61 };
62
63 memory@40000000 {
64 device_type = "memory";
7b16c61a 65 reg = <0 0x40000000 0 0x40000000>;
3cc828fd
MD
66 };
67
126f998e 68 memory@140000000 {
62bc32a2 69 device_type = "memory";
7b16c61a 70 reg = <1 0x40000000 0 0xc0000000>;
62bc32a2
MD
71 };
72
3cc828fd
MD
73 lbsc {
74 #address-cells = <1>;
75 #size-cells = <1>;
76 };
39fa511b 77
54caf681 78 keyboard {
f7dcd382
MD
79 compatible = "gpio-keys";
80
affe802c 81 one {
f7dcd382
MD
82 linux,code = <KEY_1>;
83 label = "SW2-1";
0cc16889 84 wakeup-source;
f7dcd382
MD
85 debounce-interval = <20>;
86 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
87 };
affe802c 88 two {
f7dcd382
MD
89 linux,code = <KEY_2>;
90 label = "SW2-2";
0cc16889 91 wakeup-source;
f7dcd382
MD
92 debounce-interval = <20>;
93 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
94 };
affe802c 95 three {
f7dcd382
MD
96 linux,code = <KEY_3>;
97 label = "SW2-3";
0cc16889 98 wakeup-source;
f7dcd382
MD
99 debounce-interval = <20>;
100 gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
101 };
affe802c 102 four {
f7dcd382
MD
103 linux,code = <KEY_4>;
104 label = "SW2-4";
0cc16889 105 wakeup-source;
f7dcd382
MD
106 debounce-interval = <20>;
107 gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
108 };
109 };
110
39fa511b
LP
111 leds {
112 compatible = "gpio-leds";
113 led6 {
114 gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
115 };
116 led7 {
117 gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
118 };
119 led8 {
120 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
121 };
122 };
123
affe802c 124 fixedregulator3v3: regulator-3v3 {
39fa511b
LP
125 compatible = "regulator-fixed";
126 regulator-name = "fixed-3.3V";
127 regulator-min-microvolt = <3300000>;
128 regulator-max-microvolt = <3300000>;
129 regulator-boot-on;
130 regulator-always-on;
131 };
c6119944 132
affe802c 133 vcc_sdhi0: regulator-vcc-sdhi0 {
c6119944
KM
134 compatible = "regulator-fixed";
135
136 regulator-name = "SDHI0 Vcc";
137 regulator-min-microvolt = <3300000>;
138 regulator-max-microvolt = <3300000>;
139
140 gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
141 enable-active-high;
142 };
143
affe802c 144 vccq_sdhi0: regulator-vccq-sdhi0 {
c6119944
KM
145 compatible = "regulator-gpio";
146
147 regulator-name = "SDHI0 VccQ";
148 regulator-min-microvolt = <1800000>;
149 regulator-max-microvolt = <3300000>;
150
151 gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
152 gpios-states = <1>;
153 states = <3300000 1
154 1800000 0>;
155 };
156
affe802c 157 vcc_sdhi2: regulator-vcc-sdhi2 {
c6119944
KM
158 compatible = "regulator-fixed";
159
160 regulator-name = "SDHI2 Vcc";
161 regulator-min-microvolt = <3300000>;
162 regulator-max-microvolt = <3300000>;
163
164 gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
165 enable-active-high;
166 };
167
affe802c 168 vccq_sdhi2: regulator-vccq-sdhi2 {
c6119944
KM
169 compatible = "regulator-gpio";
170
171 regulator-name = "SDHI2 VccQ";
172 regulator-min-microvolt = <1800000>;
173 regulator-max-microvolt = <3300000>;
174
175 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
176 gpios-states = <1>;
177 states = <3300000 1
178 1800000 0>;
179 };
3edd18ff 180
a5bad2c7 181 audio_clock: audio_clock {
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KM
182 compatible = "fixed-clock";
183 #clock-cells = <0>;
184 clock-frequency = <11289600>;
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KM
185 };
186
30be0ba5 187 rsnd_ak4643: sound {
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KM
188 compatible = "simple-audio-card";
189
190 simple-audio-card,format = "left_j";
191 simple-audio-card,bitclock-master = <&sndcodec>;
192 simple-audio-card,frame-master = <&sndcodec>;
193
194 sndcpu: simple-audio-card,cpu {
195 sound-dai = <&rcar_sound>;
196 };
197
198 sndcodec: simple-audio-card,codec {
199 sound-dai = <&ak4643>;
6bc651af 200 clocks = <&audio_clock>;
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KM
201 };
202 };
203
3edd18ff
LP
204 vga-encoder {
205 compatible = "adi,adv7123";
206
207 ports {
208 #address-cells = <1>;
209 #size-cells = <0>;
210
211 port@0 {
212 reg = <0>;
213 adv7123_in: endpoint {
214 remote-endpoint = <&du_out_rgb>;
215 };
216 };
217 port@1 {
218 reg = <1>;
219 adv7123_out: endpoint {
220 remote-endpoint = <&vga_in>;
221 };
222 };
223 };
224 };
225
226 vga {
227 compatible = "vga-connector";
228
229 port {
230 vga_in: endpoint {
231 remote-endpoint = <&adv7123_out>;
232 };
233 };
234 };
fd25cdd1 235
56548d0c
WT
236 hdmi-in {
237 compatible = "hdmi-connector";
238 type = "a";
239
240 port {
241 hdmi_con_in: endpoint {
242 remote-endpoint = <&adv7612_in>;
243 };
244 };
245 };
246
fe61513f
GU
247 cec_clock: cec-clock {
248 compatible = "fixed-clock";
249 #clock-cells = <0>;
250 clock-frequency = <12000000>;
251 };
252
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LP
253 hdmi-out {
254 compatible = "hdmi-connector";
255 type = "a";
256
257 port {
56548d0c 258 hdmi_con_out: endpoint {
fd25cdd1
LP
259 remote-endpoint = <&adv7511_out>;
260 };
261 };
262 };
26c00ab4
LP
263
264 x2_clk: x2-clock {
265 compatible = "fixed-clock";
266 #clock-cells = <0>;
267 clock-frequency = <148500000>;
268 };
269
270 x13_clk: x13-clock {
271 compatible = "fixed-clock";
272 #clock-cells = <0>;
273 clock-frequency = <148500000>;
274 };
880cb570 275
b2f15ca6
SH
276 gpioi2c1: i2c-8 {
277 #address-cells = <1>;
278 #size-cells = <0>;
279 compatible = "i2c-gpio";
280 status = "disabled";
e99185b2 281 scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
4e65e1b6
WS
282 sda-gpios = <&gpio1 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
283 i2c-gpio,delay-us = <5>;
284 };
285
286 gpioi2c2: i2c-9 {
287 #address-cells = <1>;
288 #size-cells = <0>;
289 compatible = "i2c-gpio";
290 status = "disabled";
291 scl-gpios = <&gpio5 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
292 sda-gpios = <&gpio5 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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SH
293 i2c-gpio,delay-us = <5>;
294 };
295
880cb570
WS
296 /*
297 * IIC0/I2C0 is routed to EXIO connector A, pins 114 (SCL) + 116 (SDA) only.
298 * We use the I2C demuxer, so the desired IP core can be selected at runtime
299 * depending on the use case (e.g. DMA with IIC0 or slave support with I2C0).
300 * Note: For testing the I2C slave feature, it is convenient to connect this
301 * bus with IIC3 on pins 110 (SCL) + 112 (SDA), select I2C0 at runtime, and
302 * instantiate the slave device at runtime according to the documentation.
303 * You can then communicate with the slave via IIC3.
1e26fcf3
SH
304 *
305 * IIC0/I2C0 does not appear to support fallback to GPIO.
880cb570 306 */
1e26fcf3 307 i2cexio0: i2c-10 {
880cb570
WS
308 compatible = "i2c-demux-pinctrl";
309 i2c-parent = <&iic0>, <&i2c0>;
1e26fcf3 310 i2c-bus-name = "i2c-exio0";
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WS
311 #address-cells = <1>;
312 #size-cells = <0>;
313 };
b2f15ca6
SH
314
315 /*
316 * IIC1/I2C1 is routed to EXIO connector A, pins 78 (SCL) + 80 (SDA).
317 * This is similar to the arangement described for i2cexio0 (above)
318 * with a fallback to GPIO also provided.
319 */
320 i2cexio1: i2c-11 {
321 compatible = "i2c-demux-pinctrl";
322 i2c-parent = <&iic1>, <&i2c1>, <&gpioi2c1>;
323 i2c-bus-name = "i2c-exio1";
324 #address-cells = <1>;
325 #size-cells = <0>;
326 };
4e65e1b6
WS
327
328 /*
329 * IIC2 and I2C2 may be switched using pinmux.
330 * A fallback to GPIO is also provided.
331 */
332 i2chdmi: i2c-12 {
333 compatible = "i2c-demux-pinctrl";
334 i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
335 i2c-bus-name = "i2c-hdmi";
336 #address-cells = <1>;
337 #size-cells = <0>;
338
339 ak4643: codec@12 {
340 compatible = "asahi-kasei,ak4643";
341 #sound-dai-cells = <0>;
342 reg = <0x12>;
343 };
344
345 composite-in@20 {
346 compatible = "adi,adv7180";
347 reg = <0x20>;
348 remote = <&vin1>;
349
350 port {
351 adv7180: endpoint {
352 bus-width = <8>;
353 remote-endpoint = <&vin1ep0>;
354 };
355 };
356 };
357
4e65e1b6
WS
358 hdmi@39 {
359 compatible = "adi,adv7511w";
360 reg = <0x39>;
361 interrupt-parent = <&gpio1>;
362 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
363 clocks = <&cec_clock>;
364 clock-names = "cec";
365
366 adi,input-depth = <8>;
367 adi,input-colorspace = "rgb";
368 adi,input-clock = "1x";
369 adi,input-style = <1>;
370 adi,input-justification = "evenly";
371
372 ports {
373 #address-cells = <1>;
374 #size-cells = <0>;
375
376 port@0 {
377 reg = <0>;
378 adv7511_in: endpoint {
15a1ff30 379 remote-endpoint = <&lvds0_out>;
4e65e1b6
WS
380 };
381 };
382
383 port@1 {
384 reg = <1>;
385 adv7511_out: endpoint {
386 remote-endpoint = <&hdmi_con_out>;
387 };
388 };
389 };
390 };
391
392 hdmi-in@4c {
393 compatible = "adi,adv7612";
394 reg = <0x4c>;
395 interrupt-parent = <&gpio1>;
396 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
397 default-input = <0>;
398
399 ports {
400 #address-cells = <1>;
401 #size-cells = <0>;
402
403 port@0 {
404 reg = <0>;
405 adv7612_in: endpoint {
406 remote-endpoint = <&hdmi_con_in>;
407 };
408 };
409
410 port@2 {
411 reg = <2>;
412 adv7612_out: endpoint {
413 remote-endpoint = <&vin0ep2>;
414 };
415 };
416 };
417 };
418 };
e6081b21
WS
419
420 /*
421 * IIC3 and I2C3 may be switched using pinmux.
422 * IIC3/I2C3 does not appear to support fallback to GPIO.
423 */
424 i2cpwr: i2c-13 {
425 compatible = "i2c-demux-pinctrl";
426 i2c-parent = <&iic3>, <&i2c3>;
427 i2c-bus-name = "i2c-pwr";
428 #address-cells = <1>;
429 #size-cells = <0>;
430
431 pmic@58 {
432 compatible = "dlg,da9063";
433 reg = <0x58>;
434 interrupt-parent = <&irqc0>;
435 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
436 interrupt-controller;
437
438 rtc {
439 compatible = "dlg,da9063-rtc";
440 };
441
442 wdt {
443 compatible = "dlg,da9063-watchdog";
444 };
445 };
446
447 vdd_dvfs: regulator@68 {
448 compatible = "dlg,da9210";
449 reg = <0x68>;
450 interrupt-parent = <&irqc0>;
451 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
452
453 regulator-min-microvolt = <1000000>;
454 regulator-max-microvolt = <1000000>;
455 regulator-boot-on;
456 regulator-always-on;
457 };
458 };
3edd18ff
LP
459};
460
461&du {
462 pinctrl-0 = <&du_pins>;
463 pinctrl-names = "default";
464 status = "okay";
465
5802c420 466 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>,
26c00ab4 467 <&x13_clk>, <&x2_clk>;
15a1ff30 468 clock-names = "du.0", "du.1", "du.2", "dclkin.0", "dclkin.1";
26c00ab4 469
3edd18ff
LP
470 ports {
471 port@0 {
472 endpoint {
473 remote-endpoint = <&adv7123_in>;
474 };
475 };
15a1ff30
LP
476 };
477};
478
479&lvds0 {
480 status = "okay";
481
482 ports {
fd25cdd1
LP
483 port@1 {
484 endpoint {
485 remote-endpoint = <&adv7511_in>;
486 };
487 };
15a1ff30
LP
488 };
489};
490
491&lvds1 {
492 status = "okay";
493
494 ports {
495 port@1 {
3edd18ff
LP
496 lvds_connector: endpoint {
497 };
498 };
499 };
39fa511b
LP
500};
501
62e43056
LP
502&extal_clk {
503 clock-frequency = <20000000>;
504};
505
39fa511b 506&pfc {
1781460c
GU
507 pinctrl-0 = <&scif_clk_pins>;
508 pinctrl-names = "default";
509
3024f507 510 du_pins: du {
2ffc224f
SH
511 groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
512 function = "du";
3024f507
LP
513 };
514
ca348298 515 scif0_pins: scif0 {
2ffc224f
SH
516 groups = "scif0_data";
517 function = "scif0";
39fa511b
LP
518 };
519
1781460c 520 scif_clk_pins: scif_clk {
2ffc224f
SH
521 groups = "scif_clk";
522 function = "scif_clk";
1781460c
GU
523 };
524
da4ea951 525 ether_pins: ether {
2ffc224f
SH
526 groups = "eth_link", "eth_mdio", "eth_rmii";
527 function = "eth";
da4ea951
SS
528 };
529
530 phy1_pins: phy1 {
2ffc224f
SH
531 groups = "intc_irq0";
532 function = "intc";
da4ea951
SS
533 };
534
ca348298 535 scifa1_pins: scifa1 {
2ffc224f
SH
536 groups = "scifa1_data";
537 function = "scifa1";
39fa511b
LP
538 };
539
c6119944 540 sdhi0_pins: sd0 {
2ffc224f
SH
541 groups = "sdhi0_data4", "sdhi0_ctrl";
542 function = "sdhi0";
1ca79699
WS
543 power-source = <3300>;
544 };
545
546 sdhi0_pins_uhs: sd0_uhs {
547 groups = "sdhi0_data4", "sdhi0_ctrl";
548 function = "sdhi0";
549 power-source = <1800>;
c6119944
KM
550 };
551
552 sdhi2_pins: sd2 {
2ffc224f
SH
553 groups = "sdhi2_data4", "sdhi2_ctrl";
554 function = "sdhi2";
1ca79699
WS
555 power-source = <3300>;
556 };
557
558 sdhi2_pins_uhs: sd2_uhs {
559 groups = "sdhi2_data4", "sdhi2_ctrl";
560 function = "sdhi2";
561 power-source = <1800>;
c6119944
KM
562 };
563
39fa511b 564 mmc1_pins: mmc1 {
2ffc224f
SH
565 groups = "mmc1_data8", "mmc1_ctrl";
566 function = "mmc1";
39fa511b 567 };
9fe7c4f8 568
85c5e4c4 569 qspi_pins: qspi {
2ffc224f
SH
570 groups = "qspi_ctrl", "qspi_data4";
571 function = "qspi";
9fe7c4f8 572 };
b0403b91 573
85c5e4c4 574 msiof1_pins: msiof1 {
2ffc224f 575 groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
b0403b91 576 "msiof1_tx";
2ffc224f 577 function = "msiof1";
b0403b91 578 };
05f72e03 579
880cb570 580 i2c0_pins: i2c0 {
2ffc224f
SH
581 groups = "i2c0";
582 function = "i2c0";
880cb570
WS
583 };
584
535118ca 585 iic0_pins: iic0 {
2ffc224f
SH
586 groups = "iic0";
587 function = "iic0";
535118ca
WS
588 };
589
b2f15ca6
SH
590 i2c1_pins: i2c1 {
591 groups = "i2c1";
592 function = "i2c1";
593 };
594
cb9a2b12 595 iic1_pins: iic1 {
2ffc224f
SH
596 groups = "iic1";
597 function = "iic1";
d90bf60c
SH
598 };
599
4e65e1b6
WS
600 i2c2_pins: i2c2 {
601 groups = "i2c2";
602 function = "i2c2";
603 };
604
cb9a2b12 605 iic2_pins: iic2 {
2ffc224f
SH
606 groups = "iic2";
607 function = "iic2";
d90bf60c
SH
608 };
609
e6081b21
WS
610 i2c3_pins: i2c3 {
611 groups = "i2c3";
612 function = "i2c3";
613 };
614
5179ffd0 615 iic3_pins: iic3 {
2ffc224f
SH
616 groups = "iic3";
617 function = "iic3";
05f72e03 618 };
d8584660 619
e03074a7 620 hsusb_pins: hsusb {
2ffc224f
SH
621 groups = "usb0_ovc_vbus";
622 function = "usb0";
e03074a7
YS
623 };
624
d8584660 625 usb0_pins: usb0 {
2ffc224f
SH
626 groups = "usb0";
627 function = "usb0";
d8584660
BD
628 };
629
630 usb1_pins: usb1 {
2ffc224f
SH
631 groups = "usb1";
632 function = "usb1";
d8584660
BD
633 };
634
635 usb2_pins: usb2 {
2ffc224f
SH
636 groups = "usb2";
637 function = "usb2";
d8584660 638 };
d594c977 639
56548d0c
WT
640 vin0_pins: vin0 {
641 groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
642 function = "vin0";
643 };
644
da84fd93 645 vin1_pins: vin1 {
2ffc224f
SH
646 groups = "vin1_data8", "vin1_clk";
647 function = "vin1";
d594c977 648 };
8ea7a44a
KM
649
650 sound_pins: sound {
2ffc224f
SH
651 groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
652 function = "ssi";
8ea7a44a
KM
653 };
654
655 sound_clk_pins: sound_clk {
2ffc224f
SH
656 groups = "audio_clk_a";
657 function = "audio_clk";
8ea7a44a 658 };
39fa511b
LP
659};
660
da4ea951
SS
661&ether {
662 pinctrl-0 = <&ether_pins &phy1_pins>;
663 pinctrl-names = "default";
664
665 phy-handle = <&phy1>;
666 renesas,ether-link-active-low;
fd7a8cbf 667 status = "okay";
da4ea951
SS
668
669 phy1: ethernet-phy@1 {
670 reg = <1>;
671 interrupt-parent = <&irqc0>;
672 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1c47a6aa 673 micrel,led-mode = <1>;
da4ea951
SS
674 };
675};
676
247fd5ec 677&cmt0 {
fd7a8cbf 678 status = "okay";
247fd5ec
LP
679};
680
39fa511b
LP
681&mmcif1 {
682 pinctrl-0 = <&mmc1_pins>;
683 pinctrl-names = "default";
684
685 vmmc-supply = <&fixedregulator3v3>;
686 bus-width = <8>;
687 non-removable;
688 status = "okay";
3cc828fd 689};
c6181b9f
VB
690
691&sata1 {
692 status = "okay";
693};
9fe7c4f8 694
fad6d45c 695&qspi {
9fe7c4f8
GU
696 pinctrl-0 = <&qspi_pins>;
697 pinctrl-names = "default";
698
699 status = "okay";
700
701 flash: flash@0 {
755185b2 702 compatible = "spansion,s25fl512s", "jedec,spi-nor";
9fe7c4f8
GU
703 reg = <0>;
704 spi-max-frequency = <30000000>;
9909d2cb
GU
705 spi-tx-bus-width = <4>;
706 spi-rx-bus-width = <4>;
cbf41168
HN
707 spi-cpha;
708 spi-cpol;
9fe7c4f8
GU
709 m25p,fast-read;
710
f58bac70 711 partitions {
b88ddbdd 712 compatible = "fixed-partitions";
f58bac70
GU
713 #address-cells = <1>;
714 #size-cells = <1>;
715
716 partition@0 {
717 label = "loader";
718 reg = <0x00000000 0x00040000>;
719 read-only;
720 };
721 partition@40000 {
722 label = "user";
723 reg = <0x00040000 0x00400000>;
724 read-only;
725 };
726 partition@440000 {
727 label = "flash";
728 reg = <0x00440000 0x03bc0000>;
729 };
9fe7c4f8
GU
730 };
731 };
732};
c6119944 733
430d7bad
UH
734&scif0 {
735 pinctrl-0 = <&scif0_pins>;
4e9c4877
LP
736 pinctrl-names = "default";
737
738 status = "okay";
739};
740
7c055894
WS
741&scifa1 {
742 pinctrl-0 = <&scifa1_pins>;
4e9c4877
LP
743 pinctrl-names = "default";
744
745 status = "okay";
746};
747
1781460c
GU
748&scif_clk {
749 clock-frequency = <14745600>;
1781460c
GU
750};
751
b0403b91
GU
752&msiof1 {
753 pinctrl-0 = <&msiof1_pins>;
754 pinctrl-names = "default";
755
756 status = "okay";
757
758 pmic: pmic@0 {
759 compatible = "renesas,r2a11302ft";
760 reg = <0>;
761 spi-max-frequency = <6000000>;
762 spi-cpol;
763 spi-cpha;
764 };
b0403b91
GU
765};
766
c6119944
KM
767&sdhi0 {
768 pinctrl-0 = <&sdhi0_pins>;
1ca79699
WS
769 pinctrl-1 = <&sdhi0_pins_uhs>;
770 pinctrl-names = "default", "state_uhs";
c6119944
KM
771
772 vmmc-supply = <&vcc_sdhi0>;
773 vqmmc-supply = <&vccq_sdhi0>;
774 cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
1ca79699 775 sd-uhs-sdr50;
dcc2fe78 776 sd-uhs-sdr104;
c6119944
KM
777 status = "okay";
778};
779
780&sdhi2 {
781 pinctrl-0 = <&sdhi2_pins>;
1ca79699
WS
782 pinctrl-1 = <&sdhi2_pins_uhs>;
783 pinctrl-names = "default", "state_uhs";
c6119944
KM
784
785 vmmc-supply = <&vcc_sdhi2>;
786 vqmmc-supply = <&vccq_sdhi2>;
787 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
1ca79699 788 sd-uhs-sdr50;
c6119944
KM
789 status = "okay";
790};
05f72e03 791
b989e138
BC
792&cpu0 {
793 cpu0-supply = <&vdd_dvfs>;
794};
e489c2a9 795
880cb570
WS
796&i2c0 {
797 pinctrl-0 = <&i2c0_pins>;
1e26fcf3 798 pinctrl-names = "i2c-exio0";
880cb570
WS
799};
800
cb9a2b12 801&iic0 {
535118ca 802 pinctrl-0 = <&iic0_pins>;
1e26fcf3 803 pinctrl-names = "i2c-exio0";
e489c2a9
BD
804};
805
b2f15ca6
SH
806&i2c1 {
807 pinctrl-0 = <&i2c1_pins>;
808 pinctrl-names = "i2c-exio1";
809};
810
cb9a2b12 811&iic1 {
cb9a2b12 812 pinctrl-0 = <&iic1_pins>;
b2f15ca6 813 pinctrl-names = "i2c-exio1";
e489c2a9
BD
814};
815
4e65e1b6
WS
816&i2c2 {
817 pinctrl-0 = <&i2c2_pins>;
818 pinctrl-names = "i2c-hdmi";
d594c977 819
177d8bea 820 clock-frequency = <100000>;
4e65e1b6 821};
177d8bea 822
4e65e1b6
WS
823&iic2 {
824 pinctrl-0 = <&iic2_pins>;
825 pinctrl-names = "i2c-hdmi";
56548d0c 826
4e65e1b6 827 clock-frequency = <100000>;
e489c2a9
BD
828};
829
e6081b21
WS
830&i2c3 {
831 pinctrl-0 = <&i2c3_pins>;
832 pinctrl-names = "i2c-pwr";
833};
aca4ec44 834
e6081b21
WS
835&iic3 {
836 pinctrl-0 = <&iic3_pins>;
837 pinctrl-names = "i2c-pwr";
e489c2a9 838};
d8584660
BD
839
840&pci0 {
841 status = "okay";
842 pinctrl-0 = <&usb0_pins>;
843 pinctrl-names = "default";
844};
845
846&pci1 {
847 status = "okay";
848 pinctrl-0 = <&usb1_pins>;
849 pinctrl-names = "default";
850};
851
37f7c1b0
YS
852&xhci {
853 status = "okay";
854 pinctrl-0 = <&usb2_pins>;
855 pinctrl-names = "default";
856};
857
d8584660
BD
858&pci2 {
859 status = "okay";
860 pinctrl-0 = <&usb2_pins>;
861 pinctrl-names = "default";
862};
d594c977 863
e03074a7
YS
864&hsusb {
865 status = "okay";
866 pinctrl-0 = <&hsusb_pins>;
867 pinctrl-names = "default";
868 renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>;
869};
870
6742cafb
SS
871&usbphy {
872 status = "okay";
873};
874
56548d0c
WT
875/* HDMI video input */
876&vin0 {
877 pinctrl-0 = <&vin0_pins>;
878 pinctrl-names = "default";
879
880 status = "okay";
881
882 port {
883 vin0ep2: endpoint {
884 remote-endpoint = <&adv7612_out>;
885 bus-width = <24>;
886 hsync-active = <0>;
887 vsync-active = <0>;
888 pclk-sample = <1>;
889 data-active = <1>;
890 };
891 };
892};
893
d594c977
BD
894/* composite video input */
895&vin1 {
896 pinctrl-0 = <&vin1_pins>;
897 pinctrl-names = "default";
898
fd7a8cbf 899 status = "okay";
d594c977
BD
900
901 port {
d594c977
BD
902 vin1ep0: endpoint {
903 remote-endpoint = <&adv7180>;
904 bus-width = <8>;
905 };
906 };
907};
8ea7a44a
KM
908
909&rcar_sound {
910 pinctrl-0 = <&sound_pins &sound_clk_pins>;
911 pinctrl-names = "default";
912
ad63241c 913 /* Single DAI */
8ea7a44a
KM
914 #sound-dai-cells = <0>;
915
916 status = "okay";
917
918 rcar_sound,dai {
919 dai0 {
e110c541
KM
920 playback = <&ssi0 &src2 &dvc0>;
921 capture = <&ssi1 &src3 &dvc1>;
8ea7a44a
KM
922 };
923 };
924};
925
53e480fc
GU
926&rwdt {
927 timeout-sec = <60>;
928 status = "okay";
929};
930
8ea7a44a 931&ssi1 {
8ea7a44a
KM
932 shared-pin;
933};