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CommitLineData
3cc828fd
MD
1/*
2 * Device Tree Source for the Lager board
3 *
da4ea951
SS
4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
5 * Copyright (C) 2014 Cogent Embedded, Inc.
880cb570 6 * Copyright (C) 2015-2016 Renesas Electronics Corporation
3cc828fd
MD
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
8ea7a44a
KM
13/*
14 * SSI-AK4643
15 *
16 * SW1: 1: AK4643
17 * 2: CN22
18 * 3: ADV7511
19 *
20 * This command is required when Playback/Capture
21 *
22 * amixer set "LINEOUT Mixer DACL" on
e110c541
KM
23 * amixer set "DVC Out" 100%
24 * amixer set "DVC In" 100%
25 *
26 * You can use Mute
27 *
28 * amixer set "DVC Out Mute" on
29 * amixer set "DVC In Mute" on
bd2e4a62
KM
30 *
31 * You can use Volume Ramp
32 *
33 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
34 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
35 * amixer set "DVC Out Ramp" on
36 * aplay xxx.wav &
37 * amixer set "DVC Out" 80% // Volume Down
38 * amixer set "DVC Out" 100% // Volume Up
8ea7a44a
KM
39 */
40
3cc828fd 41/dts-v1/;
31c46cbf 42#include "r8a7790.dtsi"
39fa511b 43#include <dt-bindings/gpio/gpio.h>
f7dcd382 44#include <dt-bindings/input/input.h>
3cc828fd
MD
45
46/ {
47 model = "Lager";
48 compatible = "renesas,lager", "renesas,r8a7790";
49
4e9c4877 50 aliases {
430d7bad 51 serial0 = &scif0;
78c11ec2 52 serial1 = &scifa1;
b2f15ca6 53 i2c8 = &gpioi2c1;
1e26fcf3 54 i2c10 = &i2cexio0;
b2f15ca6 55 i2c11 = &i2cexio1;
4e9c4877
LP
56 };
57
3cc828fd 58 chosen {
569dd56c 59 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
57d19f81 60 stdout-path = "serial0:115200n8";
3cc828fd
MD
61 };
62
63 memory@40000000 {
64 device_type = "memory";
7b16c61a 65 reg = <0 0x40000000 0 0x40000000>;
3cc828fd
MD
66 };
67
126f998e 68 memory@140000000 {
62bc32a2 69 device_type = "memory";
7b16c61a 70 reg = <1 0x40000000 0 0xc0000000>;
62bc32a2
MD
71 };
72
3cc828fd
MD
73 lbsc {
74 #address-cells = <1>;
75 #size-cells = <1>;
76 };
39fa511b 77
54caf681 78 keyboard {
f7dcd382
MD
79 compatible = "gpio-keys";
80
affe802c 81 one {
f7dcd382
MD
82 linux,code = <KEY_1>;
83 label = "SW2-1";
0cc16889 84 wakeup-source;
f7dcd382
MD
85 debounce-interval = <20>;
86 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
87 };
affe802c 88 two {
f7dcd382
MD
89 linux,code = <KEY_2>;
90 label = "SW2-2";
0cc16889 91 wakeup-source;
f7dcd382
MD
92 debounce-interval = <20>;
93 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
94 };
affe802c 95 three {
f7dcd382
MD
96 linux,code = <KEY_3>;
97 label = "SW2-3";
0cc16889 98 wakeup-source;
f7dcd382
MD
99 debounce-interval = <20>;
100 gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
101 };
affe802c 102 four {
f7dcd382
MD
103 linux,code = <KEY_4>;
104 label = "SW2-4";
0cc16889 105 wakeup-source;
f7dcd382
MD
106 debounce-interval = <20>;
107 gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
108 };
109 };
110
39fa511b
LP
111 leds {
112 compatible = "gpio-leds";
113 led6 {
114 gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
115 };
116 led7 {
117 gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
118 };
119 led8 {
120 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
121 };
122 };
123
affe802c 124 fixedregulator3v3: regulator-3v3 {
39fa511b
LP
125 compatible = "regulator-fixed";
126 regulator-name = "fixed-3.3V";
127 regulator-min-microvolt = <3300000>;
128 regulator-max-microvolt = <3300000>;
129 regulator-boot-on;
130 regulator-always-on;
131 };
c6119944 132
affe802c 133 vcc_sdhi0: regulator-vcc-sdhi0 {
c6119944
KM
134 compatible = "regulator-fixed";
135
136 regulator-name = "SDHI0 Vcc";
137 regulator-min-microvolt = <3300000>;
138 regulator-max-microvolt = <3300000>;
139
140 gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
141 enable-active-high;
142 };
143
affe802c 144 vccq_sdhi0: regulator-vccq-sdhi0 {
c6119944
KM
145 compatible = "regulator-gpio";
146
147 regulator-name = "SDHI0 VccQ";
148 regulator-min-microvolt = <1800000>;
149 regulator-max-microvolt = <3300000>;
150
151 gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
152 gpios-states = <1>;
153 states = <3300000 1
154 1800000 0>;
155 };
156
affe802c 157 vcc_sdhi2: regulator-vcc-sdhi2 {
c6119944
KM
158 compatible = "regulator-fixed";
159
160 regulator-name = "SDHI2 Vcc";
161 regulator-min-microvolt = <3300000>;
162 regulator-max-microvolt = <3300000>;
163
164 gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
165 enable-active-high;
166 };
167
affe802c 168 vccq_sdhi2: regulator-vccq-sdhi2 {
c6119944
KM
169 compatible = "regulator-gpio";
170
171 regulator-name = "SDHI2 VccQ";
172 regulator-min-microvolt = <1800000>;
173 regulator-max-microvolt = <3300000>;
174
175 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
176 gpios-states = <1>;
177 states = <3300000 1
178 1800000 0>;
179 };
3edd18ff 180
a5bad2c7 181 audio_clock: audio_clock {
6bc651af
KM
182 compatible = "fixed-clock";
183 #clock-cells = <0>;
184 clock-frequency = <11289600>;
6bc651af
KM
185 };
186
30be0ba5 187 rsnd_ak4643: sound {
8ea7a44a
KM
188 compatible = "simple-audio-card";
189
190 simple-audio-card,format = "left_j";
191 simple-audio-card,bitclock-master = <&sndcodec>;
192 simple-audio-card,frame-master = <&sndcodec>;
193
194 sndcpu: simple-audio-card,cpu {
195 sound-dai = <&rcar_sound>;
196 };
197
198 sndcodec: simple-audio-card,codec {
199 sound-dai = <&ak4643>;
6bc651af 200 clocks = <&audio_clock>;
8ea7a44a
KM
201 };
202 };
203
3edd18ff
LP
204 vga-encoder {
205 compatible = "adi,adv7123";
206
207 ports {
208 #address-cells = <1>;
209 #size-cells = <0>;
210
211 port@0 {
212 reg = <0>;
213 adv7123_in: endpoint {
214 remote-endpoint = <&du_out_rgb>;
215 };
216 };
217 port@1 {
218 reg = <1>;
219 adv7123_out: endpoint {
220 remote-endpoint = <&vga_in>;
221 };
222 };
223 };
224 };
225
226 vga {
227 compatible = "vga-connector";
228
229 port {
230 vga_in: endpoint {
231 remote-endpoint = <&adv7123_out>;
232 };
233 };
234 };
fd25cdd1 235
56548d0c
WT
236 hdmi-in {
237 compatible = "hdmi-connector";
238 type = "a";
239
240 port {
241 hdmi_con_in: endpoint {
242 remote-endpoint = <&adv7612_in>;
243 };
244 };
245 };
246
fd25cdd1
LP
247 hdmi-out {
248 compatible = "hdmi-connector";
249 type = "a";
250
251 port {
56548d0c 252 hdmi_con_out: endpoint {
fd25cdd1
LP
253 remote-endpoint = <&adv7511_out>;
254 };
255 };
256 };
26c00ab4
LP
257
258 x2_clk: x2-clock {
259 compatible = "fixed-clock";
260 #clock-cells = <0>;
261 clock-frequency = <148500000>;
262 };
263
264 x13_clk: x13-clock {
265 compatible = "fixed-clock";
266 #clock-cells = <0>;
267 clock-frequency = <148500000>;
268 };
880cb570 269
b2f15ca6
SH
270 gpioi2c1: i2c-8 {
271 #address-cells = <1>;
272 #size-cells = <0>;
273 compatible = "i2c-gpio";
274 status = "disabled";
275 gpios = <&gpio1 17 GPIO_ACTIVE_HIGH /* sda */
276 &gpio1 16 GPIO_ACTIVE_HIGH /* scl */
277 >;
278 i2c-gpio,delay-us = <5>;
279 };
280
880cb570
WS
281 /*
282 * IIC0/I2C0 is routed to EXIO connector A, pins 114 (SCL) + 116 (SDA) only.
283 * We use the I2C demuxer, so the desired IP core can be selected at runtime
284 * depending on the use case (e.g. DMA with IIC0 or slave support with I2C0).
285 * Note: For testing the I2C slave feature, it is convenient to connect this
286 * bus with IIC3 on pins 110 (SCL) + 112 (SDA), select I2C0 at runtime, and
287 * instantiate the slave device at runtime according to the documentation.
288 * You can then communicate with the slave via IIC3.
1e26fcf3
SH
289 *
290 * IIC0/I2C0 does not appear to support fallback to GPIO.
880cb570 291 */
1e26fcf3 292 i2cexio0: i2c-10 {
880cb570
WS
293 compatible = "i2c-demux-pinctrl";
294 i2c-parent = <&iic0>, <&i2c0>;
1e26fcf3 295 i2c-bus-name = "i2c-exio0";
880cb570
WS
296 #address-cells = <1>;
297 #size-cells = <0>;
298 };
b2f15ca6
SH
299
300 /*
301 * IIC1/I2C1 is routed to EXIO connector A, pins 78 (SCL) + 80 (SDA).
302 * This is similar to the arangement described for i2cexio0 (above)
303 * with a fallback to GPIO also provided.
304 */
305 i2cexio1: i2c-11 {
306 compatible = "i2c-demux-pinctrl";
307 i2c-parent = <&iic1>, <&i2c1>, <&gpioi2c1>;
308 i2c-bus-name = "i2c-exio1";
309 #address-cells = <1>;
310 #size-cells = <0>;
311 };
3edd18ff
LP
312};
313
314&du {
315 pinctrl-0 = <&du_pins>;
316 pinctrl-names = "default";
317 status = "okay";
318
26c00ab4
LP
319 clocks = <&mstp7_clks R8A7790_CLK_DU0>,
320 <&mstp7_clks R8A7790_CLK_DU1>,
321 <&mstp7_clks R8A7790_CLK_DU2>,
322 <&mstp7_clks R8A7790_CLK_LVDS0>,
323 <&mstp7_clks R8A7790_CLK_LVDS1>,
324 <&x13_clk>, <&x2_clk>;
325 clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1",
326 "dclkin.0", "dclkin.1";
327
3edd18ff
LP
328 ports {
329 port@0 {
330 endpoint {
331 remote-endpoint = <&adv7123_in>;
332 };
333 };
fd25cdd1
LP
334 port@1 {
335 endpoint {
336 remote-endpoint = <&adv7511_in>;
337 };
338 };
3edd18ff
LP
339 port@2 {
340 lvds_connector: endpoint {
341 };
342 };
343 };
39fa511b
LP
344};
345
62e43056
LP
346&extal_clk {
347 clock-frequency = <20000000>;
348};
349
39fa511b 350&pfc {
1781460c
GU
351 pinctrl-0 = <&scif_clk_pins>;
352 pinctrl-names = "default";
353
3024f507 354 du_pins: du {
2ffc224f
SH
355 groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
356 function = "du";
3024f507
LP
357 };
358
ca348298 359 scif0_pins: scif0 {
2ffc224f
SH
360 groups = "scif0_data";
361 function = "scif0";
39fa511b
LP
362 };
363
1781460c 364 scif_clk_pins: scif_clk {
2ffc224f
SH
365 groups = "scif_clk";
366 function = "scif_clk";
1781460c
GU
367 };
368
da4ea951 369 ether_pins: ether {
2ffc224f
SH
370 groups = "eth_link", "eth_mdio", "eth_rmii";
371 function = "eth";
da4ea951
SS
372 };
373
374 phy1_pins: phy1 {
2ffc224f
SH
375 groups = "intc_irq0";
376 function = "intc";
da4ea951
SS
377 };
378
ca348298 379 scifa1_pins: scifa1 {
2ffc224f
SH
380 groups = "scifa1_data";
381 function = "scifa1";
39fa511b
LP
382 };
383
c6119944 384 sdhi0_pins: sd0 {
2ffc224f
SH
385 groups = "sdhi0_data4", "sdhi0_ctrl";
386 function = "sdhi0";
1ca79699
WS
387 power-source = <3300>;
388 };
389
390 sdhi0_pins_uhs: sd0_uhs {
391 groups = "sdhi0_data4", "sdhi0_ctrl";
392 function = "sdhi0";
393 power-source = <1800>;
c6119944
KM
394 };
395
396 sdhi2_pins: sd2 {
2ffc224f
SH
397 groups = "sdhi2_data4", "sdhi2_ctrl";
398 function = "sdhi2";
1ca79699
WS
399 power-source = <3300>;
400 };
401
402 sdhi2_pins_uhs: sd2_uhs {
403 groups = "sdhi2_data4", "sdhi2_ctrl";
404 function = "sdhi2";
405 power-source = <1800>;
c6119944
KM
406 };
407
39fa511b 408 mmc1_pins: mmc1 {
2ffc224f
SH
409 groups = "mmc1_data8", "mmc1_ctrl";
410 function = "mmc1";
39fa511b 411 };
9fe7c4f8 412
85c5e4c4 413 qspi_pins: qspi {
2ffc224f
SH
414 groups = "qspi_ctrl", "qspi_data4";
415 function = "qspi";
9fe7c4f8 416 };
b0403b91 417
85c5e4c4 418 msiof1_pins: msiof1 {
2ffc224f 419 groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
b0403b91 420 "msiof1_tx";
2ffc224f 421 function = "msiof1";
b0403b91 422 };
05f72e03 423
880cb570 424 i2c0_pins: i2c0 {
2ffc224f
SH
425 groups = "i2c0";
426 function = "i2c0";
880cb570
WS
427 };
428
535118ca 429 iic0_pins: iic0 {
2ffc224f
SH
430 groups = "iic0";
431 function = "iic0";
535118ca
WS
432 };
433
b2f15ca6
SH
434 i2c1_pins: i2c1 {
435 groups = "i2c1";
436 function = "i2c1";
437 };
438
cb9a2b12 439 iic1_pins: iic1 {
2ffc224f
SH
440 groups = "iic1";
441 function = "iic1";
d90bf60c
SH
442 };
443
cb9a2b12 444 iic2_pins: iic2 {
2ffc224f
SH
445 groups = "iic2";
446 function = "iic2";
d90bf60c
SH
447 };
448
5179ffd0 449 iic3_pins: iic3 {
2ffc224f
SH
450 groups = "iic3";
451 function = "iic3";
05f72e03 452 };
d8584660 453
e03074a7 454 hsusb_pins: hsusb {
2ffc224f
SH
455 groups = "usb0_ovc_vbus";
456 function = "usb0";
e03074a7
YS
457 };
458
d8584660 459 usb0_pins: usb0 {
2ffc224f
SH
460 groups = "usb0";
461 function = "usb0";
d8584660
BD
462 };
463
464 usb1_pins: usb1 {
2ffc224f
SH
465 groups = "usb1";
466 function = "usb1";
d8584660
BD
467 };
468
469 usb2_pins: usb2 {
2ffc224f
SH
470 groups = "usb2";
471 function = "usb2";
d8584660 472 };
d594c977 473
56548d0c
WT
474 vin0_pins: vin0 {
475 groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
476 function = "vin0";
477 };
478
da84fd93 479 vin1_pins: vin1 {
2ffc224f
SH
480 groups = "vin1_data8", "vin1_clk";
481 function = "vin1";
d594c977 482 };
8ea7a44a
KM
483
484 sound_pins: sound {
2ffc224f
SH
485 groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
486 function = "ssi";
8ea7a44a
KM
487 };
488
489 sound_clk_pins: sound_clk {
2ffc224f
SH
490 groups = "audio_clk_a";
491 function = "audio_clk";
8ea7a44a 492 };
39fa511b
LP
493};
494
da4ea951
SS
495&ether {
496 pinctrl-0 = <&ether_pins &phy1_pins>;
497 pinctrl-names = "default";
498
499 phy-handle = <&phy1>;
500 renesas,ether-link-active-low;
fd7a8cbf 501 status = "okay";
da4ea951
SS
502
503 phy1: ethernet-phy@1 {
504 reg = <1>;
505 interrupt-parent = <&irqc0>;
506 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1c47a6aa 507 micrel,led-mode = <1>;
da4ea951
SS
508 };
509};
510
247fd5ec 511&cmt0 {
fd7a8cbf 512 status = "okay";
247fd5ec
LP
513};
514
39fa511b
LP
515&mmcif1 {
516 pinctrl-0 = <&mmc1_pins>;
517 pinctrl-names = "default";
518
519 vmmc-supply = <&fixedregulator3v3>;
520 bus-width = <8>;
521 non-removable;
522 status = "okay";
3cc828fd 523};
c6181b9f
VB
524
525&sata1 {
526 status = "okay";
527};
9fe7c4f8 528
fad6d45c 529&qspi {
9fe7c4f8
GU
530 pinctrl-0 = <&qspi_pins>;
531 pinctrl-names = "default";
532
533 status = "okay";
534
535 flash: flash@0 {
755185b2 536 compatible = "spansion,s25fl512s", "jedec,spi-nor";
9fe7c4f8
GU
537 reg = <0>;
538 spi-max-frequency = <30000000>;
9909d2cb
GU
539 spi-tx-bus-width = <4>;
540 spi-rx-bus-width = <4>;
cbf41168
HN
541 spi-cpha;
542 spi-cpol;
9fe7c4f8
GU
543 m25p,fast-read;
544
f58bac70 545 partitions {
b88ddbdd 546 compatible = "fixed-partitions";
f58bac70
GU
547 #address-cells = <1>;
548 #size-cells = <1>;
549
550 partition@0 {
551 label = "loader";
552 reg = <0x00000000 0x00040000>;
553 read-only;
554 };
555 partition@40000 {
556 label = "user";
557 reg = <0x00040000 0x00400000>;
558 read-only;
559 };
560 partition@440000 {
561 label = "flash";
562 reg = <0x00440000 0x03bc0000>;
563 };
9fe7c4f8
GU
564 };
565 };
566};
c6119944 567
430d7bad
UH
568&scif0 {
569 pinctrl-0 = <&scif0_pins>;
4e9c4877
LP
570 pinctrl-names = "default";
571
572 status = "okay";
573};
574
7c055894
WS
575&scifa1 {
576 pinctrl-0 = <&scifa1_pins>;
4e9c4877
LP
577 pinctrl-names = "default";
578
579 status = "okay";
580};
581
1781460c
GU
582&scif_clk {
583 clock-frequency = <14745600>;
584 status = "okay";
585};
586
b0403b91
GU
587&msiof1 {
588 pinctrl-0 = <&msiof1_pins>;
589 pinctrl-names = "default";
590
591 status = "okay";
592
593 pmic: pmic@0 {
594 compatible = "renesas,r2a11302ft";
595 reg = <0>;
596 spi-max-frequency = <6000000>;
597 spi-cpol;
598 spi-cpha;
599 };
b0403b91
GU
600};
601
c6119944
KM
602&sdhi0 {
603 pinctrl-0 = <&sdhi0_pins>;
1ca79699
WS
604 pinctrl-1 = <&sdhi0_pins_uhs>;
605 pinctrl-names = "default", "state_uhs";
c6119944
KM
606
607 vmmc-supply = <&vcc_sdhi0>;
608 vqmmc-supply = <&vccq_sdhi0>;
609 cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
1ca79699 610 sd-uhs-sdr50;
dcc2fe78 611 sd-uhs-sdr104;
c6119944
KM
612 status = "okay";
613};
614
615&sdhi2 {
616 pinctrl-0 = <&sdhi2_pins>;
1ca79699
WS
617 pinctrl-1 = <&sdhi2_pins_uhs>;
618 pinctrl-names = "default", "state_uhs";
c6119944
KM
619
620 vmmc-supply = <&vcc_sdhi2>;
621 vqmmc-supply = <&vccq_sdhi2>;
622 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
1ca79699 623 sd-uhs-sdr50;
c6119944
KM
624 status = "okay";
625};
05f72e03 626
b989e138
BC
627&cpu0 {
628 cpu0-supply = <&vdd_dvfs>;
629};
e489c2a9 630
880cb570
WS
631&i2c0 {
632 pinctrl-0 = <&i2c0_pins>;
1e26fcf3 633 pinctrl-names = "i2c-exio0";
880cb570
WS
634};
635
cb9a2b12 636&iic0 {
535118ca 637 pinctrl-0 = <&iic0_pins>;
1e26fcf3 638 pinctrl-names = "i2c-exio0";
e489c2a9
BD
639};
640
b2f15ca6
SH
641&i2c1 {
642 pinctrl-0 = <&i2c1_pins>;
643 pinctrl-names = "i2c-exio1";
644};
645
cb9a2b12 646&iic1 {
cb9a2b12 647 pinctrl-0 = <&iic1_pins>;
b2f15ca6 648 pinctrl-names = "i2c-exio1";
e489c2a9
BD
649};
650
cb9a2b12 651&iic2 {
fd7a8cbf 652 status = "okay";
cb9a2b12 653 pinctrl-0 = <&iic2_pins>;
e1a2c4eb 654 pinctrl-names = "default";
d594c977 655
177d8bea
KM
656 clock-frequency = <100000>;
657
d22b1687 658 ak4643: codec@12 {
8ea7a44a
KM
659 compatible = "asahi-kasei,ak4643";
660 #sound-dai-cells = <0>;
661 reg = <0x12>;
662 };
663
d594c977
BD
664 composite-in@20 {
665 compatible = "adi,adv7180";
666 reg = <0x20>;
667 remote = <&vin1>;
668
669 port {
670 adv7180: endpoint {
671 bus-width = <8>;
672 remote-endpoint = <&vin1ep0>;
673 };
674 };
675 };
fd25cdd1
LP
676
677 hdmi@39 {
678 compatible = "adi,adv7511w";
679 reg = <0x39>;
680 interrupt-parent = <&gpio1>;
850346ec 681 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
fd25cdd1
LP
682
683 adi,input-depth = <8>;
684 adi,input-colorspace = "rgb";
685 adi,input-clock = "1x";
686 adi,input-style = <1>;
687 adi,input-justification = "evenly";
688
689 ports {
690 #address-cells = <1>;
691 #size-cells = <0>;
692
693 port@0 {
694 reg = <0>;
695 adv7511_in: endpoint {
696 remote-endpoint = <&du_out_lvds0>;
697 };
698 };
699
700 port@1 {
701 reg = <1>;
702 adv7511_out: endpoint {
56548d0c
WT
703 remote-endpoint = <&hdmi_con_out>;
704 };
705 };
706 };
707 };
708
709 hdmi-in@4c {
710 compatible = "adi,adv7612";
711 reg = <0x4c>;
712 interrupt-parent = <&gpio1>;
713 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
714 default-input = <0>;
715
716 ports {
717 #address-cells = <1>;
718 #size-cells = <0>;
719
720 port@0 {
721 reg = <0>;
722 adv7612_in: endpoint {
723 remote-endpoint = <&hdmi_con_in>;
724 };
725 };
726
727 port@2 {
728 reg = <2>;
729 adv7612_out: endpoint {
730 remote-endpoint = <&vin0ep2>;
fd25cdd1
LP
731 };
732 };
733 };
734 };
e489c2a9
BD
735};
736
5179ffd0 737&iic3 {
aca4ec44 738 pinctrl-names = "default";
5179ffd0 739 pinctrl-0 = <&iic3_pins>;
aca4ec44
SH
740 status = "okay";
741
46dd8a80
GU
742 pmic@58 {
743 compatible = "dlg,da9063";
744 reg = <0x58>;
745 interrupt-parent = <&irqc0>;
746 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
747 interrupt-controller;
748
749 rtc {
750 compatible = "dlg,da9063-rtc";
751 };
752
753 wdt {
754 compatible = "dlg,da9063-watchdog";
755 };
756 };
757
aca4ec44 758 vdd_dvfs: regulator@68 {
bd597f47 759 compatible = "dlg,da9210";
aca4ec44 760 reg = <0x68>;
ceb77479
GU
761 interrupt-parent = <&irqc0>;
762 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
aca4ec44
SH
763
764 regulator-min-microvolt = <1000000>;
765 regulator-max-microvolt = <1000000>;
766 regulator-boot-on;
767 regulator-always-on;
768 };
e489c2a9 769};
d8584660
BD
770
771&pci0 {
772 status = "okay";
773 pinctrl-0 = <&usb0_pins>;
774 pinctrl-names = "default";
775};
776
777&pci1 {
778 status = "okay";
779 pinctrl-0 = <&usb1_pins>;
780 pinctrl-names = "default";
781};
782
37f7c1b0
YS
783&xhci {
784 status = "okay";
785 pinctrl-0 = <&usb2_pins>;
786 pinctrl-names = "default";
787};
788
d8584660
BD
789&pci2 {
790 status = "okay";
791 pinctrl-0 = <&usb2_pins>;
792 pinctrl-names = "default";
793};
d594c977 794
e03074a7
YS
795&hsusb {
796 status = "okay";
797 pinctrl-0 = <&hsusb_pins>;
798 pinctrl-names = "default";
799 renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>;
800};
801
6742cafb
SS
802&usbphy {
803 status = "okay";
804};
805
56548d0c
WT
806/* HDMI video input */
807&vin0 {
808 pinctrl-0 = <&vin0_pins>;
809 pinctrl-names = "default";
810
811 status = "okay";
812
813 port {
814 vin0ep2: endpoint {
815 remote-endpoint = <&adv7612_out>;
816 bus-width = <24>;
817 hsync-active = <0>;
818 vsync-active = <0>;
819 pclk-sample = <1>;
820 data-active = <1>;
821 };
822 };
823};
824
d594c977
BD
825/* composite video input */
826&vin1 {
827 pinctrl-0 = <&vin1_pins>;
828 pinctrl-names = "default";
829
fd7a8cbf 830 status = "okay";
d594c977
BD
831
832 port {
833 #address-cells = <1>;
834 #size-cells = <0>;
835
836 vin1ep0: endpoint {
837 remote-endpoint = <&adv7180>;
838 bus-width = <8>;
839 };
840 };
841};
8ea7a44a
KM
842
843&rcar_sound {
844 pinctrl-0 = <&sound_pins &sound_clk_pins>;
845 pinctrl-names = "default";
846
ad63241c 847 /* Single DAI */
8ea7a44a
KM
848 #sound-dai-cells = <0>;
849
850 status = "okay";
851
852 rcar_sound,dai {
853 dai0 {
e110c541
KM
854 playback = <&ssi0 &src2 &dvc0>;
855 capture = <&ssi1 &src3 &dvc1>;
8ea7a44a
KM
856 };
857 };
858};
859
8ea7a44a 860&ssi1 {
8ea7a44a
KM
861 shared-pin;
862};