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Commit | Line | Data |
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0468b2d6 MD |
1 | /* |
2 | * Device Tree Source for the r8a7790 SoC | |
3 | * | |
b621f6d4 | 4 | * Copyright (C) 2015 Renesas Electronics Corporation |
d8913c67 SS |
5 | * Copyright (C) 2013-2014 Renesas Solutions Corp. |
6 | * Copyright (C) 2014 Cogent Embedded Inc. | |
0468b2d6 MD |
7 | * |
8 | * This file is licensed under the terms of the GNU General Public License | |
9 | * version 2. This program is licensed "as is" without any warranty of any | |
10 | * kind, whether express or implied. | |
11 | */ | |
12 | ||
22a1f595 | 13 | #include <dt-bindings/clock/r8a7790-clock.h> |
5f75e73c LP |
14 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
15 | #include <dt-bindings/interrupt-controller/irq.h> | |
4c8eb3c8 | 16 | #include <dt-bindings/power/r8a7790-sysc.h> |
5f75e73c | 17 | |
0468b2d6 MD |
18 | / { |
19 | compatible = "renesas,r8a7790"; | |
20 | interrupt-parent = <&gic>; | |
8585deb1 TY |
21 | #address-cells = <2>; |
22 | #size-cells = <2>; | |
0468b2d6 | 23 | |
6b1d7c68 WS |
24 | aliases { |
25 | i2c0 = &i2c0; | |
26 | i2c1 = &i2c1; | |
27 | i2c2 = &i2c2; | |
28 | i2c3 = &i2c3; | |
05f39916 WS |
29 | i2c4 = &iic0; |
30 | i2c5 = &iic1; | |
31 | i2c6 = &iic2; | |
32 | i2c7 = &iic3; | |
fad6d45c | 33 | spi0 = &qspi; |
ae8a6146 GU |
34 | spi1 = &msiof0; |
35 | spi2 = &msiof1; | |
36 | spi3 = &msiof2; | |
37 | spi4 = &msiof3; | |
9f685bfc BD |
38 | vin0 = &vin0; |
39 | vin1 = &vin1; | |
40 | vin2 = &vin2; | |
41 | vin3 = &vin3; | |
6b1d7c68 WS |
42 | }; |
43 | ||
0468b2d6 MD |
44 | cpus { |
45 | #address-cells = <1>; | |
46 | #size-cells = <0>; | |
dc378795 | 47 | enable-method = "renesas,apmu"; |
0468b2d6 MD |
48 | |
49 | cpu0: cpu@0 { | |
50 | device_type = "cpu"; | |
51 | compatible = "arm,cortex-a15"; | |
52 | reg = <0>; | |
53 | clock-frequency = <1300000000>; | |
b989e138 BC |
54 | voltage-tolerance = <1>; /* 1% */ |
55 | clocks = <&cpg_clocks R8A7790_CLK_Z>; | |
56 | clock-latency = <300000>; /* 300 us */ | |
4c8eb3c8 | 57 | power-domains = <&sysc R8A7790_PD_CA15_CPU0>; |
fb1cecd4 | 58 | next-level-cache = <&L2_CA15>; |
b989e138 BC |
59 | |
60 | /* kHz - uV - OPPs unknown yet */ | |
61 | operating-points = <1400000 1000000>, | |
62 | <1225000 1000000>, | |
63 | <1050000 1000000>, | |
64 | < 875000 1000000>, | |
65 | < 700000 1000000>, | |
66 | < 350000 1000000>; | |
0468b2d6 | 67 | }; |
c1f95979 MD |
68 | |
69 | cpu1: cpu@1 { | |
70 | device_type = "cpu"; | |
71 | compatible = "arm,cortex-a15"; | |
72 | reg = <1>; | |
73 | clock-frequency = <1300000000>; | |
4c8eb3c8 | 74 | power-domains = <&sysc R8A7790_PD_CA15_CPU1>; |
fb1cecd4 | 75 | next-level-cache = <&L2_CA15>; |
c1f95979 MD |
76 | }; |
77 | ||
78 | cpu2: cpu@2 { | |
79 | device_type = "cpu"; | |
80 | compatible = "arm,cortex-a15"; | |
81 | reg = <2>; | |
82 | clock-frequency = <1300000000>; | |
4c8eb3c8 | 83 | power-domains = <&sysc R8A7790_PD_CA15_CPU2>; |
fb1cecd4 | 84 | next-level-cache = <&L2_CA15>; |
c1f95979 MD |
85 | }; |
86 | ||
87 | cpu3: cpu@3 { | |
88 | device_type = "cpu"; | |
89 | compatible = "arm,cortex-a15"; | |
90 | reg = <3>; | |
91 | clock-frequency = <1300000000>; | |
4c8eb3c8 | 92 | power-domains = <&sysc R8A7790_PD_CA15_CPU3>; |
fb1cecd4 | 93 | next-level-cache = <&L2_CA15>; |
c1f95979 | 94 | }; |
2007e74c | 95 | |
1eed15e4 | 96 | cpu4: cpu@100 { |
2007e74c MD |
97 | device_type = "cpu"; |
98 | compatible = "arm,cortex-a7"; | |
99 | reg = <0x100>; | |
100 | clock-frequency = <780000000>; | |
4c8eb3c8 | 101 | power-domains = <&sysc R8A7790_PD_CA7_CPU0>; |
fb1cecd4 | 102 | next-level-cache = <&L2_CA7>; |
2007e74c MD |
103 | }; |
104 | ||
1eed15e4 | 105 | cpu5: cpu@101 { |
2007e74c MD |
106 | device_type = "cpu"; |
107 | compatible = "arm,cortex-a7"; | |
108 | reg = <0x101>; | |
109 | clock-frequency = <780000000>; | |
4c8eb3c8 | 110 | power-domains = <&sysc R8A7790_PD_CA7_CPU1>; |
fb1cecd4 | 111 | next-level-cache = <&L2_CA7>; |
2007e74c MD |
112 | }; |
113 | ||
1eed15e4 | 114 | cpu6: cpu@102 { |
2007e74c MD |
115 | device_type = "cpu"; |
116 | compatible = "arm,cortex-a7"; | |
117 | reg = <0x102>; | |
118 | clock-frequency = <780000000>; | |
4c8eb3c8 | 119 | power-domains = <&sysc R8A7790_PD_CA7_CPU2>; |
fb1cecd4 | 120 | next-level-cache = <&L2_CA7>; |
2007e74c MD |
121 | }; |
122 | ||
1eed15e4 | 123 | cpu7: cpu@103 { |
2007e74c MD |
124 | device_type = "cpu"; |
125 | compatible = "arm,cortex-a7"; | |
126 | reg = <0x103>; | |
127 | clock-frequency = <780000000>; | |
4c8eb3c8 | 128 | power-domains = <&sysc R8A7790_PD_CA7_CPU3>; |
fb1cecd4 | 129 | next-level-cache = <&L2_CA7>; |
2007e74c | 130 | }; |
2c3de367 | 131 | |
d492909c | 132 | L2_CA15: cache-controller-0 { |
2c3de367 | 133 | compatible = "cache"; |
2c3de367 GU |
134 | power-domains = <&sysc R8A7790_PD_CA15_SCU>; |
135 | cache-unified; | |
136 | cache-level = <2>; | |
137 | }; | |
138 | ||
d492909c | 139 | L2_CA7: cache-controller-1 { |
2c3de367 | 140 | compatible = "cache"; |
2c3de367 GU |
141 | power-domains = <&sysc R8A7790_PD_CA7_SCU>; |
142 | cache-unified; | |
143 | cache-level = <2>; | |
144 | }; | |
0468b2d6 MD |
145 | }; |
146 | ||
a8b805f3 KM |
147 | thermal-zones { |
148 | cpu_thermal: cpu-thermal { | |
149 | polling-delay-passive = <0>; | |
150 | polling-delay = <0>; | |
151 | ||
152 | thermal-sensors = <&thermal>; | |
153 | ||
154 | trips { | |
155 | cpu-crit { | |
156 | temperature = <115000>; | |
157 | hysteresis = <0>; | |
158 | type = "critical"; | |
159 | }; | |
160 | }; | |
161 | cooling-maps { | |
162 | }; | |
163 | }; | |
164 | }; | |
165 | ||
dc378795 MD |
166 | apmu@e6151000 { |
167 | compatible = "renesas,r8a7790-apmu", "renesas,apmu"; | |
168 | reg = <0 0xe6151000 0 0x188>; | |
169 | cpus = <&cpu4 &cpu5 &cpu6 &cpu7>; | |
170 | }; | |
171 | ||
172 | apmu@e6152000 { | |
173 | compatible = "renesas,r8a7790-apmu", "renesas,apmu"; | |
174 | reg = <0 0xe6152000 0 0x188>; | |
175 | cpus = <&cpu0 &cpu1 &cpu2 &cpu3>; | |
176 | }; | |
177 | ||
0468b2d6 | 178 | gic: interrupt-controller@f1001000 { |
e715e9c5 | 179 | compatible = "arm,gic-400"; |
0468b2d6 MD |
180 | #interrupt-cells = <3>; |
181 | #address-cells = <0>; | |
182 | interrupt-controller; | |
8585deb1 | 183 | reg = <0 0xf1001000 0 0x1000>, |
387720c9 | 184 | <0 0xf1002000 0 0x2000>, |
8585deb1 TY |
185 | <0 0xf1004000 0 0x2000>, |
186 | <0 0xf1006000 0 0x2000>; | |
3abb4d5f | 187 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
9e585236 GU |
188 | clocks = <&mstp4_clks R8A7790_CLK_INTC_SYS>; |
189 | clock-names = "clk"; | |
190 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; | |
0468b2d6 MD |
191 | }; |
192 | ||
23de2278 | 193 | gpio0: gpio@e6050000 { |
f98e10c8 | 194 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
23de2278 | 195 | reg = <0 0xe6050000 0 0x50>; |
3abb4d5f | 196 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
197 | #gpio-cells = <2>; |
198 | gpio-controller; | |
199 | gpio-ranges = <&pfc 0 0 32>; | |
200 | #interrupt-cells = <2>; | |
201 | interrupt-controller; | |
81f6883f | 202 | clocks = <&mstp9_clks R8A7790_CLK_GPIO0>; |
36ee3c27 | 203 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
f98e10c8 LP |
204 | }; |
205 | ||
23de2278 | 206 | gpio1: gpio@e6051000 { |
f98e10c8 | 207 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
23de2278 | 208 | reg = <0 0xe6051000 0 0x50>; |
3abb4d5f | 209 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
210 | #gpio-cells = <2>; |
211 | gpio-controller; | |
56a2182f | 212 | gpio-ranges = <&pfc 0 32 30>; |
f98e10c8 LP |
213 | #interrupt-cells = <2>; |
214 | interrupt-controller; | |
81f6883f | 215 | clocks = <&mstp9_clks R8A7790_CLK_GPIO1>; |
36ee3c27 | 216 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
f98e10c8 LP |
217 | }; |
218 | ||
23de2278 | 219 | gpio2: gpio@e6052000 { |
f98e10c8 | 220 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
23de2278 | 221 | reg = <0 0xe6052000 0 0x50>; |
3abb4d5f | 222 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
223 | #gpio-cells = <2>; |
224 | gpio-controller; | |
56a2182f | 225 | gpio-ranges = <&pfc 0 64 30>; |
f98e10c8 LP |
226 | #interrupt-cells = <2>; |
227 | interrupt-controller; | |
81f6883f | 228 | clocks = <&mstp9_clks R8A7790_CLK_GPIO2>; |
36ee3c27 | 229 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
f98e10c8 LP |
230 | }; |
231 | ||
23de2278 | 232 | gpio3: gpio@e6053000 { |
f98e10c8 | 233 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
23de2278 | 234 | reg = <0 0xe6053000 0 0x50>; |
3abb4d5f | 235 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
236 | #gpio-cells = <2>; |
237 | gpio-controller; | |
238 | gpio-ranges = <&pfc 0 96 32>; | |
239 | #interrupt-cells = <2>; | |
240 | interrupt-controller; | |
81f6883f | 241 | clocks = <&mstp9_clks R8A7790_CLK_GPIO3>; |
36ee3c27 | 242 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
f98e10c8 LP |
243 | }; |
244 | ||
23de2278 | 245 | gpio4: gpio@e6054000 { |
f98e10c8 | 246 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
23de2278 | 247 | reg = <0 0xe6054000 0 0x50>; |
3abb4d5f | 248 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
249 | #gpio-cells = <2>; |
250 | gpio-controller; | |
251 | gpio-ranges = <&pfc 0 128 32>; | |
252 | #interrupt-cells = <2>; | |
253 | interrupt-controller; | |
81f6883f | 254 | clocks = <&mstp9_clks R8A7790_CLK_GPIO4>; |
36ee3c27 | 255 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
f98e10c8 LP |
256 | }; |
257 | ||
23de2278 | 258 | gpio5: gpio@e6055000 { |
f98e10c8 | 259 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
23de2278 | 260 | reg = <0 0xe6055000 0 0x50>; |
3abb4d5f | 261 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
262 | #gpio-cells = <2>; |
263 | gpio-controller; | |
264 | gpio-ranges = <&pfc 0 160 32>; | |
265 | #interrupt-cells = <2>; | |
266 | interrupt-controller; | |
81f6883f | 267 | clocks = <&mstp9_clks R8A7790_CLK_GPIO5>; |
36ee3c27 | 268 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
f98e10c8 LP |
269 | }; |
270 | ||
a8b805f3 KM |
271 | thermal: thermal@e61f0000 { |
272 | compatible = "renesas,thermal-r8a7790", | |
273 | "renesas,rcar-gen2-thermal", | |
274 | "renesas,rcar-thermal"; | |
03e2f56b | 275 | reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; |
3abb4d5f | 276 | interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; |
d3a439db | 277 | clocks = <&mstp5_clks R8A7790_CLK_THERMAL>; |
36ee3c27 | 278 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
a8b805f3 | 279 | #thermal-sensor-cells = <0>; |
03e2f56b MD |
280 | }; |
281 | ||
0468b2d6 MD |
282 | timer { |
283 | compatible = "arm,armv7-timer"; | |
3abb4d5f SH |
284 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
285 | <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
286 | <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
287 | <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; | |
0468b2d6 | 288 | }; |
8f5ec0a5 | 289 | |
39cf6d73 | 290 | cmt0: timer@ffca0000 { |
37757030 | 291 | compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2"; |
39cf6d73 | 292 | reg = <0 0xffca0000 0 0x1004>; |
3abb4d5f SH |
293 | interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, |
294 | <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; | |
39cf6d73 LP |
295 | clocks = <&mstp1_clks R8A7790_CLK_CMT0>; |
296 | clock-names = "fck"; | |
36ee3c27 | 297 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
39cf6d73 LP |
298 | |
299 | renesas,channels-mask = <0x60>; | |
300 | ||
301 | status = "disabled"; | |
302 | }; | |
303 | ||
304 | cmt1: timer@e6130000 { | |
37757030 | 305 | compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2"; |
39cf6d73 | 306 | reg = <0 0xe6130000 0 0x1004>; |
3abb4d5f SH |
307 | interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, |
308 | <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, | |
309 | <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, | |
310 | <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, | |
311 | <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, | |
312 | <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, | |
313 | <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, | |
314 | <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; | |
39cf6d73 LP |
315 | clocks = <&mstp3_clks R8A7790_CLK_CMT1>; |
316 | clock-names = "fck"; | |
36ee3c27 | 317 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
39cf6d73 LP |
318 | |
319 | renesas,channels-mask = <0xff>; | |
320 | ||
321 | status = "disabled"; | |
322 | }; | |
323 | ||
8f5ec0a5 | 324 | irqc0: interrupt-controller@e61c0000 { |
220fc352 | 325 | compatible = "renesas,irqc-r8a7790", "renesas,irqc"; |
8f5ec0a5 MD |
326 | #interrupt-cells = <2>; |
327 | interrupt-controller; | |
8585deb1 | 328 | reg = <0 0xe61c0000 0 0x200>; |
3abb4d5f SH |
329 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, |
330 | <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, | |
331 | <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, | |
332 | <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; | |
61624caf | 333 | clocks = <&mstp4_clks R8A7790_CLK_IRQC>; |
36ee3c27 | 334 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
8f5ec0a5 | 335 | }; |
8c9b1aa4 | 336 | |
b9fea49c | 337 | dmac0: dma-controller@e6700000 { |
4af0a664 | 338 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
b9fea49c | 339 | reg = <0 0xe6700000 0 0x20000>; |
3abb4d5f SH |
340 | interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH |
341 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH | |
342 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH | |
343 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH | |
344 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH | |
345 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH | |
346 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH | |
347 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH | |
348 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH | |
349 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH | |
350 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH | |
351 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH | |
352 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH | |
353 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH | |
354 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH | |
355 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; | |
b9fea49c LP |
356 | interrupt-names = "error", |
357 | "ch0", "ch1", "ch2", "ch3", | |
358 | "ch4", "ch5", "ch6", "ch7", | |
359 | "ch8", "ch9", "ch10", "ch11", | |
360 | "ch12", "ch13", "ch14"; | |
361 | clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>; | |
362 | clock-names = "fck"; | |
36ee3c27 | 363 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
b9fea49c LP |
364 | #dma-cells = <1>; |
365 | dma-channels = <15>; | |
366 | }; | |
367 | ||
368 | dmac1: dma-controller@e6720000 { | |
4af0a664 | 369 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
b9fea49c | 370 | reg = <0 0xe6720000 0 0x20000>; |
3abb4d5f SH |
371 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH |
372 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH | |
373 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH | |
374 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH | |
375 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH | |
376 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH | |
377 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH | |
378 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH | |
379 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH | |
380 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH | |
381 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH | |
382 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH | |
383 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH | |
384 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH | |
385 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH | |
386 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; | |
b9fea49c LP |
387 | interrupt-names = "error", |
388 | "ch0", "ch1", "ch2", "ch3", | |
389 | "ch4", "ch5", "ch6", "ch7", | |
390 | "ch8", "ch9", "ch10", "ch11", | |
391 | "ch12", "ch13", "ch14"; | |
392 | clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>; | |
393 | clock-names = "fck"; | |
36ee3c27 | 394 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
b9fea49c LP |
395 | #dma-cells = <1>; |
396 | dma-channels = <15>; | |
397 | }; | |
ba3240be KM |
398 | |
399 | audma0: dma-controller@ec700000 { | |
4af0a664 | 400 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
ba3240be | 401 | reg = <0 0xec700000 0 0x10000>; |
3abb4d5f SH |
402 | interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH |
403 | GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH | |
404 | GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH | |
405 | GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH | |
406 | GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH | |
407 | GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH | |
408 | GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH | |
409 | GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH | |
410 | GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH | |
411 | GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH | |
412 | GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH | |
413 | GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH | |
414 | GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH | |
415 | GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; | |
ba3240be KM |
416 | interrupt-names = "error", |
417 | "ch0", "ch1", "ch2", "ch3", | |
418 | "ch4", "ch5", "ch6", "ch7", | |
419 | "ch8", "ch9", "ch10", "ch11", | |
420 | "ch12"; | |
421 | clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>; | |
422 | clock-names = "fck"; | |
36ee3c27 | 423 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ba3240be KM |
424 | #dma-cells = <1>; |
425 | dma-channels = <13>; | |
426 | }; | |
427 | ||
428 | audma1: dma-controller@ec720000 { | |
4af0a664 | 429 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
ba3240be | 430 | reg = <0 0xec720000 0 0x10000>; |
3abb4d5f SH |
431 | interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH |
432 | GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH | |
433 | GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH | |
434 | GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH | |
435 | GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH | |
436 | GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH | |
437 | GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH | |
438 | GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH | |
439 | GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH | |
440 | GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH | |
441 | GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH | |
442 | GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH | |
443 | GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH | |
444 | GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; | |
ba3240be KM |
445 | interrupt-names = "error", |
446 | "ch0", "ch1", "ch2", "ch3", | |
447 | "ch4", "ch5", "ch6", "ch7", | |
448 | "ch8", "ch9", "ch10", "ch11", | |
449 | "ch12"; | |
450 | clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>; | |
451 | clock-names = "fck"; | |
36ee3c27 | 452 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ba3240be KM |
453 | #dma-cells = <1>; |
454 | dma-channels = <13>; | |
455 | }; | |
456 | ||
a3ff2090 | 457 | usb_dmac0: dma-controller@e65a0000 { |
d01c8bec | 458 | compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; |
a3ff2090 | 459 | reg = <0 0xe65a0000 0 0x100>; |
3abb4d5f SH |
460 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH |
461 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
a3ff2090 YS |
462 | interrupt-names = "ch0", "ch1"; |
463 | clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>; | |
36ee3c27 | 464 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
a3ff2090 YS |
465 | #dma-cells = <1>; |
466 | dma-channels = <2>; | |
467 | }; | |
468 | ||
469 | usb_dmac1: dma-controller@e65b0000 { | |
d01c8bec | 470 | compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; |
a3ff2090 | 471 | reg = <0 0xe65b0000 0 0x100>; |
3abb4d5f SH |
472 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH |
473 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
a3ff2090 YS |
474 | interrupt-names = "ch0", "ch1"; |
475 | clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>; | |
36ee3c27 | 476 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
a3ff2090 YS |
477 | #dma-cells = <1>; |
478 | dma-channels = <2>; | |
479 | }; | |
480 | ||
edd2b9f4 GL |
481 | i2c0: i2c@e6508000 { |
482 | #address-cells = <1>; | |
483 | #size-cells = <0>; | |
82f8bfbe | 484 | compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; |
edd2b9f4 | 485 | reg = <0 0xe6508000 0 0x40>; |
3abb4d5f | 486 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; |
2450badf | 487 | clocks = <&mstp9_clks R8A7790_CLK_I2C0>; |
36ee3c27 | 488 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ac8e7f31 | 489 | i2c-scl-internal-delay-ns = <110>; |
edd2b9f4 GL |
490 | status = "disabled"; |
491 | }; | |
492 | ||
493 | i2c1: i2c@e6518000 { | |
494 | #address-cells = <1>; | |
495 | #size-cells = <0>; | |
82f8bfbe | 496 | compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; |
edd2b9f4 | 497 | reg = <0 0xe6518000 0 0x40>; |
3abb4d5f | 498 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; |
2450badf | 499 | clocks = <&mstp9_clks R8A7790_CLK_I2C1>; |
36ee3c27 | 500 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ac8e7f31 | 501 | i2c-scl-internal-delay-ns = <6>; |
edd2b9f4 GL |
502 | status = "disabled"; |
503 | }; | |
504 | ||
505 | i2c2: i2c@e6530000 { | |
506 | #address-cells = <1>; | |
507 | #size-cells = <0>; | |
82f8bfbe | 508 | compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; |
edd2b9f4 | 509 | reg = <0 0xe6530000 0 0x40>; |
3abb4d5f | 510 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; |
2450badf | 511 | clocks = <&mstp9_clks R8A7790_CLK_I2C2>; |
36ee3c27 | 512 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ac8e7f31 | 513 | i2c-scl-internal-delay-ns = <6>; |
edd2b9f4 GL |
514 | status = "disabled"; |
515 | }; | |
516 | ||
517 | i2c3: i2c@e6540000 { | |
518 | #address-cells = <1>; | |
519 | #size-cells = <0>; | |
82f8bfbe | 520 | compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; |
edd2b9f4 | 521 | reg = <0 0xe6540000 0 0x40>; |
3abb4d5f | 522 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; |
2450badf | 523 | clocks = <&mstp9_clks R8A7790_CLK_I2C3>; |
36ee3c27 | 524 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ac8e7f31 | 525 | i2c-scl-internal-delay-ns = <110>; |
edd2b9f4 GL |
526 | status = "disabled"; |
527 | }; | |
528 | ||
05f39916 WS |
529 | iic0: i2c@e6500000 { |
530 | #address-cells = <1>; | |
531 | #size-cells = <0>; | |
b8075eea SH |
532 | compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", |
533 | "renesas,rmobile-iic"; | |
05f39916 | 534 | reg = <0 0xe6500000 0 0x425>; |
3abb4d5f | 535 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; |
05f39916 | 536 | clocks = <&mstp3_clks R8A7790_CLK_IIC0>; |
badf8570 NS |
537 | dmas = <&dmac0 0x61>, <&dmac0 0x62>, |
538 | <&dmac1 0x61>, <&dmac1 0x62>; | |
539 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 540 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
05f39916 WS |
541 | status = "disabled"; |
542 | }; | |
543 | ||
544 | iic1: i2c@e6510000 { | |
545 | #address-cells = <1>; | |
546 | #size-cells = <0>; | |
b8075eea SH |
547 | compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", |
548 | "renesas,rmobile-iic"; | |
05f39916 | 549 | reg = <0 0xe6510000 0 0x425>; |
3abb4d5f | 550 | interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; |
05f39916 | 551 | clocks = <&mstp3_clks R8A7790_CLK_IIC1>; |
badf8570 NS |
552 | dmas = <&dmac0 0x65>, <&dmac0 0x66>, |
553 | <&dmac1 0x65>, <&dmac1 0x66>; | |
554 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 555 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
05f39916 WS |
556 | status = "disabled"; |
557 | }; | |
558 | ||
559 | iic2: i2c@e6520000 { | |
560 | #address-cells = <1>; | |
561 | #size-cells = <0>; | |
b8075eea SH |
562 | compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", |
563 | "renesas,rmobile-iic"; | |
05f39916 | 564 | reg = <0 0xe6520000 0 0x425>; |
3abb4d5f | 565 | interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; |
05f39916 | 566 | clocks = <&mstp3_clks R8A7790_CLK_IIC2>; |
badf8570 NS |
567 | dmas = <&dmac0 0x69>, <&dmac0 0x6a>, |
568 | <&dmac1 0x69>, <&dmac1 0x6a>; | |
569 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 570 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
05f39916 WS |
571 | status = "disabled"; |
572 | }; | |
573 | ||
574 | iic3: i2c@e60b0000 { | |
575 | #address-cells = <1>; | |
576 | #size-cells = <0>; | |
b8075eea SH |
577 | compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", |
578 | "renesas,rmobile-iic"; | |
05f39916 | 579 | reg = <0 0xe60b0000 0 0x425>; |
3abb4d5f | 580 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; |
05f39916 | 581 | clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>; |
badf8570 NS |
582 | dmas = <&dmac0 0x77>, <&dmac0 0x78>, |
583 | <&dmac1 0x77>, <&dmac1 0x78>; | |
584 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 585 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
05f39916 WS |
586 | status = "disabled"; |
587 | }; | |
588 | ||
22c2b78d | 589 | mmcif0: mmc@ee200000 { |
063e8560 | 590 | compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; |
8c9b1aa4 | 591 | reg = <0 0xee200000 0 0x80>; |
3abb4d5f | 592 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; |
72197ca7 | 593 | clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>; |
badf8570 NS |
594 | dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, |
595 | <&dmac1 0xd1>, <&dmac1 0xd2>; | |
596 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 597 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
8c9b1aa4 GL |
598 | reg-io-width = <4>; |
599 | status = "disabled"; | |
96370057 | 600 | max-frequency = <97500000>; |
8c9b1aa4 GL |
601 | }; |
602 | ||
b718aa44 | 603 | mmcif1: mmc@ee220000 { |
063e8560 | 604 | compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; |
8c9b1aa4 | 605 | reg = <0 0xee220000 0 0x80>; |
3abb4d5f | 606 | interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; |
72197ca7 | 607 | clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>; |
badf8570 NS |
608 | dmas = <&dmac0 0xe1>, <&dmac0 0xe2>, |
609 | <&dmac1 0xe1>, <&dmac1 0xe2>; | |
610 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 611 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
8c9b1aa4 GL |
612 | reg-io-width = <4>; |
613 | status = "disabled"; | |
96370057 | 614 | max-frequency = <97500000>; |
8c9b1aa4 GL |
615 | }; |
616 | ||
a5f4ae3c | 617 | pfc: pin-controller@e6060000 { |
9694c778 LP |
618 | compatible = "renesas,pfc-r8a7790"; |
619 | reg = <0 0xe6060000 0 0x250>; | |
620 | }; | |
55689bfa | 621 | |
b718aa44 | 622 | sdhi0: sd@ee100000 { |
df1d0584 | 623 | compatible = "renesas,sdhi-r8a7790"; |
66f47ed0 | 624 | reg = <0 0xee100000 0 0x328>; |
3abb4d5f | 625 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; |
72197ca7 | 626 | clocks = <&mstp3_clks R8A7790_CLK_SDHI0>; |
badf8570 NS |
627 | dmas = <&dmac0 0xcd>, <&dmac0 0xce>, |
628 | <&dmac1 0xcd>, <&dmac1 0xce>; | |
629 | dma-names = "tx", "rx", "tx", "rx"; | |
21c7d0fc | 630 | max-frequency = <195000000>; |
36ee3c27 | 631 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
8c9b1aa4 GL |
632 | status = "disabled"; |
633 | }; | |
634 | ||
b718aa44 | 635 | sdhi1: sd@ee120000 { |
df1d0584 | 636 | compatible = "renesas,sdhi-r8a7790"; |
66f47ed0 | 637 | reg = <0 0xee120000 0 0x328>; |
3abb4d5f | 638 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; |
72197ca7 | 639 | clocks = <&mstp3_clks R8A7790_CLK_SDHI1>; |
badf8570 NS |
640 | dmas = <&dmac0 0xc9>, <&dmac0 0xca>, |
641 | <&dmac1 0xc9>, <&dmac1 0xca>; | |
642 | dma-names = "tx", "rx", "tx", "rx"; | |
21c7d0fc | 643 | max-frequency = <195000000>; |
36ee3c27 | 644 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
8c9b1aa4 GL |
645 | status = "disabled"; |
646 | }; | |
647 | ||
b718aa44 | 648 | sdhi2: sd@ee140000 { |
df1d0584 | 649 | compatible = "renesas,sdhi-r8a7790"; |
8c9b1aa4 | 650 | reg = <0 0xee140000 0 0x100>; |
3abb4d5f | 651 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; |
72197ca7 | 652 | clocks = <&mstp3_clks R8A7790_CLK_SDHI2>; |
badf8570 NS |
653 | dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, |
654 | <&dmac1 0xc1>, <&dmac1 0xc2>; | |
655 | dma-names = "tx", "rx", "tx", "rx"; | |
22f708b0 | 656 | max-frequency = <97500000>; |
36ee3c27 | 657 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
8c9b1aa4 GL |
658 | status = "disabled"; |
659 | }; | |
660 | ||
b718aa44 | 661 | sdhi3: sd@ee160000 { |
df1d0584 | 662 | compatible = "renesas,sdhi-r8a7790"; |
8c9b1aa4 | 663 | reg = <0 0xee160000 0 0x100>; |
3abb4d5f | 664 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; |
72197ca7 | 665 | clocks = <&mstp3_clks R8A7790_CLK_SDHI3>; |
badf8570 NS |
666 | dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, |
667 | <&dmac1 0xd3>, <&dmac1 0xd4>; | |
668 | dma-names = "tx", "rx", "tx", "rx"; | |
22f708b0 | 669 | max-frequency = <97500000>; |
36ee3c27 | 670 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
8c9b1aa4 GL |
671 | status = "disabled"; |
672 | }; | |
22a1f595 | 673 | |
597af20f | 674 | scifa0: serial@e6c40000 { |
a20dc9f2 GU |
675 | compatible = "renesas,scifa-r8a7790", |
676 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
597af20f | 677 | reg = <0 0xe6c40000 0 64>; |
3abb4d5f | 678 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; |
597af20f | 679 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>; |
6c6e12a1 | 680 | clock-names = "fck"; |
badf8570 NS |
681 | dmas = <&dmac0 0x21>, <&dmac0 0x22>, |
682 | <&dmac1 0x21>, <&dmac1 0x22>; | |
683 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 684 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
685 | status = "disabled"; |
686 | }; | |
687 | ||
688 | scifa1: serial@e6c50000 { | |
a20dc9f2 GU |
689 | compatible = "renesas,scifa-r8a7790", |
690 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
597af20f | 691 | reg = <0 0xe6c50000 0 64>; |
3abb4d5f | 692 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; |
597af20f | 693 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>; |
6c6e12a1 | 694 | clock-names = "fck"; |
badf8570 NS |
695 | dmas = <&dmac0 0x25>, <&dmac0 0x26>, |
696 | <&dmac1 0x25>, <&dmac1 0x26>; | |
697 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 698 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
699 | status = "disabled"; |
700 | }; | |
701 | ||
702 | scifa2: serial@e6c60000 { | |
a20dc9f2 GU |
703 | compatible = "renesas,scifa-r8a7790", |
704 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
597af20f | 705 | reg = <0 0xe6c60000 0 64>; |
3abb4d5f | 706 | interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; |
597af20f | 707 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>; |
6c6e12a1 | 708 | clock-names = "fck"; |
badf8570 NS |
709 | dmas = <&dmac0 0x27>, <&dmac0 0x28>, |
710 | <&dmac1 0x27>, <&dmac1 0x28>; | |
711 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 712 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
713 | status = "disabled"; |
714 | }; | |
715 | ||
716 | scifb0: serial@e6c20000 { | |
a20dc9f2 GU |
717 | compatible = "renesas,scifb-r8a7790", |
718 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
f31fbe83 | 719 | reg = <0 0xe6c20000 0 0x100>; |
3abb4d5f | 720 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; |
597af20f | 721 | clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>; |
6c6e12a1 | 722 | clock-names = "fck"; |
badf8570 NS |
723 | dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, |
724 | <&dmac1 0x3d>, <&dmac1 0x3e>; | |
725 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 726 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
727 | status = "disabled"; |
728 | }; | |
729 | ||
730 | scifb1: serial@e6c30000 { | |
a20dc9f2 GU |
731 | compatible = "renesas,scifb-r8a7790", |
732 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
f31fbe83 | 733 | reg = <0 0xe6c30000 0 0x100>; |
3abb4d5f | 734 | interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; |
597af20f | 735 | clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>; |
6c6e12a1 | 736 | clock-names = "fck"; |
badf8570 NS |
737 | dmas = <&dmac0 0x19>, <&dmac0 0x1a>, |
738 | <&dmac1 0x19>, <&dmac1 0x1a>; | |
739 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 740 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
741 | status = "disabled"; |
742 | }; | |
743 | ||
744 | scifb2: serial@e6ce0000 { | |
a20dc9f2 GU |
745 | compatible = "renesas,scifb-r8a7790", |
746 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
f31fbe83 | 747 | reg = <0 0xe6ce0000 0 0x100>; |
3abb4d5f | 748 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; |
597af20f | 749 | clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>; |
6c6e12a1 | 750 | clock-names = "fck"; |
badf8570 NS |
751 | dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, |
752 | <&dmac1 0x1d>, <&dmac1 0x1e>; | |
753 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 754 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
755 | status = "disabled"; |
756 | }; | |
757 | ||
758 | scif0: serial@e6e60000 { | |
a20dc9f2 GU |
759 | compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", |
760 | "renesas,scif"; | |
597af20f | 761 | reg = <0 0xe6e60000 0 64>; |
3abb4d5f | 762 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; |
42af65e8 GU |
763 | clocks = <&mstp7_clks R8A7790_CLK_SCIF0>, <&zs_clk>, |
764 | <&scif_clk>; | |
765 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
766 | dmas = <&dmac0 0x29>, <&dmac0 0x2a>, |
767 | <&dmac1 0x29>, <&dmac1 0x2a>; | |
768 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 769 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
770 | status = "disabled"; |
771 | }; | |
772 | ||
773 | scif1: serial@e6e68000 { | |
a20dc9f2 GU |
774 | compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", |
775 | "renesas,scif"; | |
597af20f | 776 | reg = <0 0xe6e68000 0 64>; |
3abb4d5f | 777 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; |
42af65e8 GU |
778 | clocks = <&mstp7_clks R8A7790_CLK_SCIF1>, <&zs_clk>, |
779 | <&scif_clk>; | |
780 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
781 | dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, |
782 | <&dmac1 0x2d>, <&dmac1 0x2e>; | |
783 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 784 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
785 | status = "disabled"; |
786 | }; | |
787 | ||
022869a2 GU |
788 | scif2: serial@e6e56000 { |
789 | compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", | |
790 | "renesas,scif"; | |
791 | reg = <0 0xe6e56000 0 64>; | |
792 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
793 | clocks = <&mstp3_clks R8A7790_CLK_SCIF2>, <&zs_clk>, | |
794 | <&scif_clk>; | |
795 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
796 | dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, |
797 | <&dmac1 0x2b>, <&dmac1 0x2c>; | |
798 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 799 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
022869a2 GU |
800 | status = "disabled"; |
801 | }; | |
802 | ||
597af20f | 803 | hscif0: serial@e62c0000 { |
a20dc9f2 GU |
804 | compatible = "renesas,hscif-r8a7790", |
805 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
597af20f | 806 | reg = <0 0xe62c0000 0 96>; |
3abb4d5f | 807 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; |
42af65e8 GU |
808 | clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>, <&zs_clk>, |
809 | <&scif_clk>; | |
810 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
811 | dmas = <&dmac0 0x39>, <&dmac0 0x3a>, |
812 | <&dmac1 0x39>, <&dmac1 0x3a>; | |
813 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 814 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
815 | status = "disabled"; |
816 | }; | |
817 | ||
818 | hscif1: serial@e62c8000 { | |
a20dc9f2 GU |
819 | compatible = "renesas,hscif-r8a7790", |
820 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
597af20f | 821 | reg = <0 0xe62c8000 0 96>; |
3abb4d5f | 822 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; |
42af65e8 GU |
823 | clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>, <&zs_clk>, |
824 | <&scif_clk>; | |
825 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
826 | dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, |
827 | <&dmac1 0x4d>, <&dmac1 0x4e>; | |
828 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 829 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
830 | status = "disabled"; |
831 | }; | |
832 | ||
c90715a3 GU |
833 | icram0: sram@e63a0000 { |
834 | compatible = "mmio-sram"; | |
835 | reg = <0 0xe63a0000 0 0x12000>; | |
836 | }; | |
837 | ||
838 | icram1: sram@e63c0000 { | |
839 | compatible = "mmio-sram"; | |
840 | reg = <0 0xe63c0000 0 0x1000>; | |
e6693869 GU |
841 | #address-cells = <1>; |
842 | #size-cells = <1>; | |
843 | ranges = <0 0 0xe63c0000 0x1000>; | |
844 | ||
845 | smp-sram@0 { | |
846 | compatible = "renesas,smp-sram"; | |
847 | reg = <0 0x10>; | |
848 | }; | |
c90715a3 GU |
849 | }; |
850 | ||
d8913c67 SS |
851 | ether: ethernet@ee700000 { |
852 | compatible = "renesas,ether-r8a7790"; | |
853 | reg = <0 0xee700000 0 0x400>; | |
3abb4d5f | 854 | interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; |
d8913c67 | 855 | clocks = <&mstp8_clks R8A7790_CLK_ETHER>; |
36ee3c27 | 856 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
d8913c67 SS |
857 | phy-mode = "rmii"; |
858 | #address-cells = <1>; | |
859 | #size-cells = <0>; | |
860 | status = "disabled"; | |
861 | }; | |
862 | ||
f25d6b97 | 863 | avb: ethernet@e6800000 { |
d92df7e5 SH |
864 | compatible = "renesas,etheravb-r8a7790", |
865 | "renesas,etheravb-rcar-gen2"; | |
f25d6b97 | 866 | reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; |
3abb4d5f | 867 | interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; |
f25d6b97 | 868 | clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>; |
36ee3c27 | 869 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
f25d6b97 SS |
870 | #address-cells = <1>; |
871 | #size-cells = <0>; | |
872 | status = "disabled"; | |
873 | }; | |
874 | ||
cde630f7 | 875 | sata0: sata@ee300000 { |
faa63e83 | 876 | compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata"; |
cde630f7 | 877 | reg = <0 0xee300000 0 0x2000>; |
3abb4d5f | 878 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; |
cde630f7 | 879 | clocks = <&mstp8_clks R8A7790_CLK_SATA0>; |
36ee3c27 | 880 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
cde630f7 VB |
881 | status = "disabled"; |
882 | }; | |
883 | ||
884 | sata1: sata@ee500000 { | |
faa63e83 | 885 | compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata"; |
cde630f7 | 886 | reg = <0 0xee500000 0 0x2000>; |
3abb4d5f | 887 | interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; |
cde630f7 | 888 | clocks = <&mstp8_clks R8A7790_CLK_SATA1>; |
36ee3c27 | 889 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
cde630f7 VB |
890 | status = "disabled"; |
891 | }; | |
892 | ||
ae0a555b | 893 | hsusb: usb@e6590000 { |
d87ec94a | 894 | compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs"; |
ae0a555b | 895 | reg = <0 0xe6590000 0 0x100>; |
3abb4d5f | 896 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; |
ae0a555b | 897 | clocks = <&mstp7_clks R8A7790_CLK_HSUSB>; |
e8295dc3 YS |
898 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, |
899 | <&usb_dmac1 0>, <&usb_dmac1 1>; | |
900 | dma-names = "ch0", "ch1", "ch2", "ch3"; | |
36ee3c27 | 901 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
484adb00 GU |
902 | renesas,buswait = <4>; |
903 | phys = <&usb0 1>; | |
904 | phy-names = "usb"; | |
ae0a555b YS |
905 | status = "disabled"; |
906 | }; | |
907 | ||
e089f657 | 908 | usbphy: usb-phy@e6590100 { |
3b0922c5 SH |
909 | compatible = "renesas,usb-phy-r8a7790", |
910 | "renesas,rcar-gen2-usb-phy"; | |
e089f657 SS |
911 | reg = <0 0xe6590100 0 0x100>; |
912 | #address-cells = <1>; | |
913 | #size-cells = <0>; | |
914 | clocks = <&mstp7_clks R8A7790_CLK_HSUSB>; | |
915 | clock-names = "usbhs"; | |
36ee3c27 | 916 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
e089f657 SS |
917 | status = "disabled"; |
918 | ||
919 | usb0: usb-channel@0 { | |
920 | reg = <0>; | |
921 | #phy-cells = <1>; | |
922 | }; | |
923 | usb2: usb-channel@2 { | |
924 | reg = <2>; | |
925 | #phy-cells = <1>; | |
926 | }; | |
927 | }; | |
928 | ||
9f685bfc | 929 | vin0: video@e6ef0000 { |
a94b9e56 | 930 | compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin"; |
9f685bfc | 931 | reg = <0 0xe6ef0000 0 0x1000>; |
3abb4d5f | 932 | interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; |
484adb00 | 933 | clocks = <&mstp8_clks R8A7790_CLK_VIN0>; |
36ee3c27 | 934 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
9f685bfc BD |
935 | status = "disabled"; |
936 | }; | |
937 | ||
938 | vin1: video@e6ef1000 { | |
a94b9e56 | 939 | compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin"; |
9f685bfc | 940 | reg = <0 0xe6ef1000 0 0x1000>; |
3abb4d5f | 941 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; |
484adb00 | 942 | clocks = <&mstp8_clks R8A7790_CLK_VIN1>; |
36ee3c27 | 943 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
9f685bfc BD |
944 | status = "disabled"; |
945 | }; | |
946 | ||
947 | vin2: video@e6ef2000 { | |
a94b9e56 | 948 | compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin"; |
9f685bfc | 949 | reg = <0 0xe6ef2000 0 0x1000>; |
3abb4d5f | 950 | interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; |
484adb00 | 951 | clocks = <&mstp8_clks R8A7790_CLK_VIN2>; |
36ee3c27 | 952 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
9f685bfc BD |
953 | status = "disabled"; |
954 | }; | |
955 | ||
956 | vin3: video@e6ef3000 { | |
a94b9e56 | 957 | compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin"; |
9f685bfc | 958 | reg = <0 0xe6ef3000 0 0x1000>; |
3abb4d5f | 959 | interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; |
484adb00 | 960 | clocks = <&mstp8_clks R8A7790_CLK_VIN3>; |
36ee3c27 | 961 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
9f685bfc BD |
962 | status = "disabled"; |
963 | }; | |
964 | ||
3ac6a83c LP |
965 | vsp1@fe920000 { |
966 | compatible = "renesas,vsp1"; | |
967 | reg = <0 0xfe920000 0 0x8000>; | |
3abb4d5f | 968 | interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; |
3ac6a83c | 969 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>; |
36ee3c27 | 970 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
3ac6a83c LP |
971 | }; |
972 | ||
973 | vsp1@fe928000 { | |
974 | compatible = "renesas,vsp1"; | |
975 | reg = <0 0xfe928000 0 0x8000>; | |
3abb4d5f | 976 | interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; |
3ac6a83c | 977 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>; |
36ee3c27 | 978 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
3ac6a83c LP |
979 | }; |
980 | ||
981 | vsp1@fe930000 { | |
982 | compatible = "renesas,vsp1"; | |
983 | reg = <0 0xfe930000 0 0x8000>; | |
3abb4d5f | 984 | interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; |
3ac6a83c | 985 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>; |
36ee3c27 | 986 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
3ac6a83c LP |
987 | }; |
988 | ||
989 | vsp1@fe938000 { | |
990 | compatible = "renesas,vsp1"; | |
991 | reg = <0 0xfe938000 0 0x8000>; | |
3abb4d5f | 992 | interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; |
3ac6a83c | 993 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>; |
36ee3c27 | 994 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
3ac6a83c LP |
995 | }; |
996 | ||
997 | du: display@feb00000 { | |
998 | compatible = "renesas,du-r8a7790"; | |
999 | reg = <0 0xfeb00000 0 0x70000>, | |
1000 | <0 0xfeb90000 0 0x1c>, | |
1001 | <0 0xfeb94000 0 0x1c>; | |
1002 | reg-names = "du", "lvds.0", "lvds.1"; | |
3abb4d5f SH |
1003 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, |
1004 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, | |
1005 | <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; | |
3ac6a83c LP |
1006 | clocks = <&mstp7_clks R8A7790_CLK_DU0>, |
1007 | <&mstp7_clks R8A7790_CLK_DU1>, | |
1008 | <&mstp7_clks R8A7790_CLK_DU2>, | |
1009 | <&mstp7_clks R8A7790_CLK_LVDS0>, | |
1010 | <&mstp7_clks R8A7790_CLK_LVDS1>; | |
1011 | clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1"; | |
1012 | status = "disabled"; | |
1013 | ||
1014 | ports { | |
1015 | #address-cells = <1>; | |
1016 | #size-cells = <0>; | |
1017 | ||
1018 | port@0 { | |
1019 | reg = <0>; | |
1020 | du_out_rgb: endpoint { | |
1021 | }; | |
1022 | }; | |
1023 | port@1 { | |
1024 | reg = <1>; | |
1025 | du_out_lvds0: endpoint { | |
1026 | }; | |
1027 | }; | |
1028 | port@2 { | |
1029 | reg = <2>; | |
1030 | du_out_lvds1: endpoint { | |
1031 | }; | |
1032 | }; | |
1033 | }; | |
1034 | }; | |
1035 | ||
6a7742b4 | 1036 | can0: can@e6e80000 { |
28e941de | 1037 | compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can"; |
6a7742b4 | 1038 | reg = <0 0xe6e80000 0 0x1000>; |
3abb4d5f | 1039 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; |
6a7742b4 SS |
1040 | clocks = <&mstp9_clks R8A7790_CLK_RCAN0>, |
1041 | <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>; | |
1042 | clock-names = "clkp1", "clkp2", "can_clk"; | |
36ee3c27 | 1043 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
6a7742b4 SS |
1044 | status = "disabled"; |
1045 | }; | |
1046 | ||
1047 | can1: can@e6e88000 { | |
28e941de | 1048 | compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can"; |
6a7742b4 | 1049 | reg = <0 0xe6e88000 0 0x1000>; |
3abb4d5f | 1050 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; |
6a7742b4 SS |
1051 | clocks = <&mstp9_clks R8A7790_CLK_RCAN1>, |
1052 | <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>; | |
1053 | clock-names = "clkp1", "clkp2", "can_clk"; | |
36ee3c27 | 1054 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
6a7742b4 SS |
1055 | status = "disabled"; |
1056 | }; | |
1057 | ||
fb847575 | 1058 | jpu: jpeg-codec@fe980000 { |
1c4b68fd | 1059 | compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu"; |
fb847575 | 1060 | reg = <0 0xfe980000 0 0x10300>; |
3abb4d5f | 1061 | interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; |
fb847575 | 1062 | clocks = <&mstp1_clks R8A7790_CLK_JPU>; |
36ee3c27 | 1063 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
fb847575 MU |
1064 | }; |
1065 | ||
22a1f595 LP |
1066 | clocks { |
1067 | #address-cells = <2>; | |
1068 | #size-cells = <2>; | |
1069 | ranges; | |
1070 | ||
1071 | /* External root clock */ | |
b19dd47b | 1072 | extal_clk: extal { |
22a1f595 LP |
1073 | compatible = "fixed-clock"; |
1074 | #clock-cells = <0>; | |
1075 | /* This value must be overriden by the board. */ | |
1076 | clock-frequency = <0>; | |
22a1f595 LP |
1077 | }; |
1078 | ||
51d17918 | 1079 | /* External PCIe clock - can be overridden by the board */ |
b19dd47b | 1080 | pcie_bus_clk: pcie_bus { |
51d17918 PE |
1081 | compatible = "fixed-clock"; |
1082 | #clock-cells = <0>; | |
03adc181 | 1083 | clock-frequency = <0>; |
51d17918 PE |
1084 | }; |
1085 | ||
c7c2ec3a KM |
1086 | /* |
1087 | * The external audio clocks are configured as 0 Hz fixed frequency clocks by | |
1088 | * default. Boards that provide audio clocks should override them. | |
1089 | */ | |
1090 | audio_clk_a: audio_clk_a { | |
1091 | compatible = "fixed-clock"; | |
1092 | #clock-cells = <0>; | |
1093 | clock-frequency = <0>; | |
c7c2ec3a KM |
1094 | }; |
1095 | audio_clk_b: audio_clk_b { | |
1096 | compatible = "fixed-clock"; | |
1097 | #clock-cells = <0>; | |
1098 | clock-frequency = <0>; | |
c7c2ec3a KM |
1099 | }; |
1100 | audio_clk_c: audio_clk_c { | |
1101 | compatible = "fixed-clock"; | |
1102 | #clock-cells = <0>; | |
1103 | clock-frequency = <0>; | |
c7c2ec3a KM |
1104 | }; |
1105 | ||
42af65e8 GU |
1106 | /* External SCIF clock */ |
1107 | scif_clk: scif { | |
1108 | compatible = "fixed-clock"; | |
1109 | #clock-cells = <0>; | |
1110 | /* This value must be overridden by the board. */ | |
1111 | clock-frequency = <0>; | |
42af65e8 GU |
1112 | }; |
1113 | ||
41650f40 | 1114 | /* External USB clock - can be overridden by the board */ |
b19dd47b | 1115 | usb_extal_clk: usb_extal { |
41650f40 SS |
1116 | compatible = "fixed-clock"; |
1117 | #clock-cells = <0>; | |
1118 | clock-frequency = <48000000>; | |
41650f40 SS |
1119 | }; |
1120 | ||
1121 | /* External CAN clock */ | |
5b476a96 | 1122 | can_clk: can { |
41650f40 SS |
1123 | compatible = "fixed-clock"; |
1124 | #clock-cells = <0>; | |
1125 | /* This value must be overridden by the board. */ | |
1126 | clock-frequency = <0>; | |
41650f40 SS |
1127 | }; |
1128 | ||
22a1f595 LP |
1129 | /* Special CPG clocks */ |
1130 | cpg_clocks: cpg_clocks@e6150000 { | |
1131 | compatible = "renesas,r8a7790-cpg-clocks", | |
1132 | "renesas,rcar-gen2-cpg-clocks"; | |
1133 | reg = <0 0xe6150000 0 0x1000>; | |
41650f40 | 1134 | clocks = <&extal_clk &usb_extal_clk>; |
22a1f595 LP |
1135 | #clock-cells = <1>; |
1136 | clock-output-names = "main", "pll0", "pll1", "pll3", | |
1137 | "lb", "qspi", "sdh", "sd0", "sd1", | |
3453ca9e | 1138 | "z", "rcan", "adsp"; |
484adb00 | 1139 | #power-domain-cells = <0>; |
22a1f595 LP |
1140 | }; |
1141 | ||
1142 | /* Variable factor clocks */ | |
b19dd47b | 1143 | sd2_clk: sd2@e6150078 { |
22a1f595 LP |
1144 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
1145 | reg = <0 0xe6150078 0 4>; | |
1146 | clocks = <&pll1_div2_clk>; | |
1147 | #clock-cells = <0>; | |
22a1f595 | 1148 | }; |
b19dd47b | 1149 | sd3_clk: sd3@e615026c { |
22a1f595 | 1150 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
edd7b938 | 1151 | reg = <0 0xe615026c 0 4>; |
22a1f595 LP |
1152 | clocks = <&pll1_div2_clk>; |
1153 | #clock-cells = <0>; | |
22a1f595 | 1154 | }; |
b19dd47b | 1155 | mmc0_clk: mmc0@e6150240 { |
22a1f595 LP |
1156 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
1157 | reg = <0 0xe6150240 0 4>; | |
1158 | clocks = <&pll1_div2_clk>; | |
1159 | #clock-cells = <0>; | |
22a1f595 | 1160 | }; |
b19dd47b | 1161 | mmc1_clk: mmc1@e6150244 { |
22a1f595 LP |
1162 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
1163 | reg = <0 0xe6150244 0 4>; | |
1164 | clocks = <&pll1_div2_clk>; | |
1165 | #clock-cells = <0>; | |
22a1f595 | 1166 | }; |
b19dd47b | 1167 | ssp_clk: ssp@e6150248 { |
22a1f595 LP |
1168 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
1169 | reg = <0 0xe6150248 0 4>; | |
1170 | clocks = <&pll1_div2_clk>; | |
1171 | #clock-cells = <0>; | |
22a1f595 | 1172 | }; |
b19dd47b | 1173 | ssprs_clk: ssprs@e615024c { |
22a1f595 LP |
1174 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
1175 | reg = <0 0xe615024c 0 4>; | |
1176 | clocks = <&pll1_div2_clk>; | |
1177 | #clock-cells = <0>; | |
22a1f595 LP |
1178 | }; |
1179 | ||
1180 | /* Fixed factor clocks */ | |
b19dd47b | 1181 | pll1_div2_clk: pll1_div2 { |
22a1f595 LP |
1182 | compatible = "fixed-factor-clock"; |
1183 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1184 | #clock-cells = <0>; | |
1185 | clock-div = <2>; | |
1186 | clock-mult = <1>; | |
22a1f595 | 1187 | }; |
b19dd47b | 1188 | z2_clk: z2 { |
22a1f595 LP |
1189 | compatible = "fixed-factor-clock"; |
1190 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1191 | #clock-cells = <0>; | |
1192 | clock-div = <2>; | |
1193 | clock-mult = <1>; | |
22a1f595 | 1194 | }; |
b19dd47b | 1195 | zg_clk: zg { |
22a1f595 LP |
1196 | compatible = "fixed-factor-clock"; |
1197 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1198 | #clock-cells = <0>; | |
1199 | clock-div = <3>; | |
1200 | clock-mult = <1>; | |
22a1f595 | 1201 | }; |
b19dd47b | 1202 | zx_clk: zx { |
22a1f595 LP |
1203 | compatible = "fixed-factor-clock"; |
1204 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1205 | #clock-cells = <0>; | |
1206 | clock-div = <3>; | |
1207 | clock-mult = <1>; | |
22a1f595 | 1208 | }; |
b19dd47b | 1209 | zs_clk: zs { |
22a1f595 LP |
1210 | compatible = "fixed-factor-clock"; |
1211 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1212 | #clock-cells = <0>; | |
1213 | clock-div = <6>; | |
1214 | clock-mult = <1>; | |
22a1f595 | 1215 | }; |
b19dd47b | 1216 | hp_clk: hp { |
22a1f595 LP |
1217 | compatible = "fixed-factor-clock"; |
1218 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1219 | #clock-cells = <0>; | |
1220 | clock-div = <12>; | |
1221 | clock-mult = <1>; | |
22a1f595 | 1222 | }; |
b19dd47b | 1223 | i_clk: i { |
22a1f595 LP |
1224 | compatible = "fixed-factor-clock"; |
1225 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1226 | #clock-cells = <0>; | |
1227 | clock-div = <2>; | |
1228 | clock-mult = <1>; | |
22a1f595 | 1229 | }; |
b19dd47b | 1230 | b_clk: b { |
22a1f595 LP |
1231 | compatible = "fixed-factor-clock"; |
1232 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1233 | #clock-cells = <0>; | |
1234 | clock-div = <12>; | |
1235 | clock-mult = <1>; | |
22a1f595 | 1236 | }; |
b19dd47b | 1237 | p_clk: p { |
22a1f595 LP |
1238 | compatible = "fixed-factor-clock"; |
1239 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1240 | #clock-cells = <0>; | |
1241 | clock-div = <24>; | |
1242 | clock-mult = <1>; | |
22a1f595 | 1243 | }; |
b19dd47b | 1244 | cl_clk: cl { |
22a1f595 LP |
1245 | compatible = "fixed-factor-clock"; |
1246 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1247 | #clock-cells = <0>; | |
1248 | clock-div = <48>; | |
1249 | clock-mult = <1>; | |
22a1f595 | 1250 | }; |
b19dd47b | 1251 | m2_clk: m2 { |
22a1f595 LP |
1252 | compatible = "fixed-factor-clock"; |
1253 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1254 | #clock-cells = <0>; | |
1255 | clock-div = <8>; | |
1256 | clock-mult = <1>; | |
22a1f595 | 1257 | }; |
b19dd47b | 1258 | imp_clk: imp { |
22a1f595 LP |
1259 | compatible = "fixed-factor-clock"; |
1260 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1261 | #clock-cells = <0>; | |
1262 | clock-div = <4>; | |
1263 | clock-mult = <1>; | |
22a1f595 | 1264 | }; |
b19dd47b | 1265 | rclk_clk: rclk { |
22a1f595 LP |
1266 | compatible = "fixed-factor-clock"; |
1267 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1268 | #clock-cells = <0>; | |
1269 | clock-div = <(48 * 1024)>; | |
1270 | clock-mult = <1>; | |
22a1f595 | 1271 | }; |
b19dd47b | 1272 | oscclk_clk: oscclk { |
22a1f595 LP |
1273 | compatible = "fixed-factor-clock"; |
1274 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1275 | #clock-cells = <0>; | |
1276 | clock-div = <(12 * 1024)>; | |
1277 | clock-mult = <1>; | |
22a1f595 | 1278 | }; |
b19dd47b | 1279 | zb3_clk: zb3 { |
22a1f595 LP |
1280 | compatible = "fixed-factor-clock"; |
1281 | clocks = <&cpg_clocks R8A7790_CLK_PLL3>; | |
1282 | #clock-cells = <0>; | |
1283 | clock-div = <4>; | |
1284 | clock-mult = <1>; | |
22a1f595 | 1285 | }; |
b19dd47b | 1286 | zb3d2_clk: zb3d2 { |
22a1f595 LP |
1287 | compatible = "fixed-factor-clock"; |
1288 | clocks = <&cpg_clocks R8A7790_CLK_PLL3>; | |
1289 | #clock-cells = <0>; | |
1290 | clock-div = <8>; | |
1291 | clock-mult = <1>; | |
22a1f595 | 1292 | }; |
b19dd47b | 1293 | ddr_clk: ddr { |
22a1f595 LP |
1294 | compatible = "fixed-factor-clock"; |
1295 | clocks = <&cpg_clocks R8A7790_CLK_PLL3>; | |
1296 | #clock-cells = <0>; | |
1297 | clock-div = <8>; | |
1298 | clock-mult = <1>; | |
22a1f595 | 1299 | }; |
b19dd47b | 1300 | mp_clk: mp { |
22a1f595 LP |
1301 | compatible = "fixed-factor-clock"; |
1302 | clocks = <&pll1_div2_clk>; | |
1303 | #clock-cells = <0>; | |
1304 | clock-div = <15>; | |
1305 | clock-mult = <1>; | |
22a1f595 | 1306 | }; |
b19dd47b | 1307 | cp_clk: cp { |
22a1f595 LP |
1308 | compatible = "fixed-factor-clock"; |
1309 | clocks = <&extal_clk>; | |
1310 | #clock-cells = <0>; | |
1311 | clock-div = <2>; | |
1312 | clock-mult = <1>; | |
22a1f595 LP |
1313 | }; |
1314 | ||
1315 | /* Gate clocks */ | |
9d90951a LP |
1316 | mstp0_clks: mstp0_clks@e6150130 { |
1317 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1318 | reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>; | |
1319 | clocks = <&mp_clk>; | |
1320 | #clock-cells = <1>; | |
b54010af | 1321 | clock-indices = <R8A7790_CLK_MSIOF0>; |
9d90951a LP |
1322 | clock-output-names = "msiof0"; |
1323 | }; | |
22a1f595 LP |
1324 | mstp1_clks: mstp1_clks@e6150134 { |
1325 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1326 | reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; | |
4ba8f246 YH |
1327 | clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&m2_clk>, |
1328 | <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>, <&zs_clk>, | |
1329 | <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, | |
1330 | <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>; | |
22a1f595 | 1331 | #clock-cells = <1>; |
b54010af | 1332 | clock-indices = < |
4ba8f246 YH |
1333 | R8A7790_CLK_VCP1 R8A7790_CLK_VCP0 R8A7790_CLK_VPC1 |
1334 | R8A7790_CLK_VPC0 R8A7790_CLK_JPU R8A7790_CLK_SSP1 | |
1335 | R8A7790_CLK_TMU1 R8A7790_CLK_3DG R8A7790_CLK_2DDMAC | |
1336 | R8A7790_CLK_FDP1_2 R8A7790_CLK_FDP1_1 R8A7790_CLK_FDP1_0 | |
1337 | R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 R8A7790_CLK_CMT0 | |
1338 | R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 R8A7790_CLK_VSP1_DU0 | |
1339 | R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S | |
22a1f595 LP |
1340 | >; |
1341 | clock-output-names = | |
4ba8f246 YH |
1342 | "vcp1", "vcp0", "vpc1", "vpc0", "jpu", "ssp1", |
1343 | "tmu1", "3dg", "2ddmac", "fdp1-2", "fdp1-1", | |
1344 | "fdp1-0", "tmu3", "tmu2", "cmt0", "tmu0", | |
2284ff5f | 1345 | "vsp1-du1", "vsp1-du0", "vsp1-rt", "vsp1-sy"; |
22a1f595 LP |
1346 | }; |
1347 | mstp2_clks: mstp2_clks@e6150138 { | |
1348 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1349 | reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; | |
1350 | clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, | |
c819acda LP |
1351 | <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&zs_clk>, |
1352 | <&zs_clk>; | |
22a1f595 | 1353 | #clock-cells = <1>; |
b54010af | 1354 | clock-indices = < |
22a1f595 | 1355 | R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0 |
9d90951a LP |
1356 | R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1 |
1357 | R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3 R8A7790_CLK_SCIFB2 | |
c819acda | 1358 | R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0 |
22a1f595 LP |
1359 | >; |
1360 | clock-output-names = | |
9d90951a | 1361 | "scifa2", "scifa1", "scifa0", "msiof2", "scifb0", |
c819acda LP |
1362 | "scifb1", "msiof1", "msiof3", "scifb2", |
1363 | "sys-dmac1", "sys-dmac0"; | |
22a1f595 LP |
1364 | }; |
1365 | mstp3_clks: mstp3_clks@e615013c { | |
1366 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1367 | reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; | |
38805823 | 1368 | clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&p_clk>, <&sd3_clk>, |
17465149 | 1369 | <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>, |
b02ce79f YS |
1370 | <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>, |
1371 | <&hp_clk>, <&hp_clk>; | |
22a1f595 | 1372 | #clock-cells = <1>; |
b54010af | 1373 | clock-indices = < |
38805823 | 1374 | R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SCIF2 R8A7790_CLK_SDHI3 |
17465149 | 1375 | R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0 |
ecafea8c | 1376 | R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1 |
b02ce79f | 1377 | R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1 |
22a1f595 LP |
1378 | >; |
1379 | clock-output-names = | |
38805823 | 1380 | "iic2", "tpu0", "mmcif1", "scif2", "sdhi3", |
17465149 | 1381 | "sdhi2", "sdhi1", "sdhi0", "mmcif0", |
b02ce79f YS |
1382 | "iic0", "pciec", "iic1", "ssusb", "cmt1", |
1383 | "usbdmac0", "usbdmac1"; | |
22a1f595 | 1384 | }; |
61624caf GU |
1385 | mstp4_clks: mstp4_clks@e6150140 { |
1386 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1387 | reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>; | |
9e585236 | 1388 | clocks = <&cp_clk>, <&zs_clk>; |
61624caf | 1389 | #clock-cells = <1>; |
9e585236 GU |
1390 | clock-indices = <R8A7790_CLK_IRQC R8A7790_CLK_INTC_SYS>; |
1391 | clock-output-names = "irqc", "intc-sys"; | |
61624caf | 1392 | }; |
22a1f595 LP |
1393 | mstp5_clks: mstp5_clks@e6150144 { |
1394 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1395 | reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; | |
3453ca9e SS |
1396 | clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7790_CLK_ADSP>, |
1397 | <&extal_clk>, <&p_clk>; | |
22a1f595 | 1398 | #clock-cells = <1>; |
b54010af BD |
1399 | clock-indices = < |
1400 | R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1 | |
3453ca9e SS |
1401 | R8A7790_CLK_ADSP_MOD R8A7790_CLK_THERMAL |
1402 | R8A7790_CLK_PWM | |
b54010af | 1403 | >; |
3453ca9e SS |
1404 | clock-output-names = "audmac0", "audmac1", "adsp_mod", |
1405 | "thermal", "pwm"; | |
22a1f595 LP |
1406 | }; |
1407 | mstp7_clks: mstp7_clks@e615014c { | |
1408 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1409 | reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; | |
b621f6d4 | 1410 | clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>, |
22a1f595 LP |
1411 | <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, |
1412 | <&zx_clk>; | |
1413 | #clock-cells = <1>; | |
b54010af | 1414 | clock-indices = < |
22a1f595 LP |
1415 | R8A7790_CLK_EHCI R8A7790_CLK_HSUSB R8A7790_CLK_HSCIF1 |
1416 | R8A7790_CLK_HSCIF0 R8A7790_CLK_SCIF1 R8A7790_CLK_SCIF0 | |
1417 | R8A7790_CLK_DU2 R8A7790_CLK_DU1 R8A7790_CLK_DU0 | |
1418 | R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0 | |
1419 | >; | |
1420 | clock-output-names = | |
1421 | "ehci", "hsusb", "hscif1", "hscif0", "scif1", | |
1422 | "scif0", "du2", "du1", "du0", "lvds1", "lvds0"; | |
1423 | }; | |
1424 | mstp8_clks: mstp8_clks@e6150990 { | |
1425 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1426 | reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; | |
f6b5dd40 | 1427 | clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, |
63d2d750 SS |
1428 | <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>, |
1429 | <&zs_clk>; | |
22a1f595 | 1430 | #clock-cells = <1>; |
b54010af | 1431 | clock-indices = < |
f6b5dd40 | 1432 | R8A7790_CLK_MLB R8A7790_CLK_VIN3 R8A7790_CLK_VIN2 |
63d2d750 SS |
1433 | R8A7790_CLK_VIN1 R8A7790_CLK_VIN0 |
1434 | R8A7790_CLK_ETHERAVB R8A7790_CLK_ETHER | |
f6b5dd40 | 1435 | R8A7790_CLK_SATA1 R8A7790_CLK_SATA0 |
3f2beaa9 | 1436 | >; |
bccccc3d | 1437 | clock-output-names = |
63d2d750 SS |
1438 | "mlb", "vin3", "vin2", "vin1", "vin0", |
1439 | "etheravb", "ether", "sata1", "sata0"; | |
22a1f595 LP |
1440 | }; |
1441 | mstp9_clks: mstp9_clks@e6150994 { | |
1442 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1443 | reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; | |
81f6883f GU |
1444 | clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, |
1445 | <&cp_clk>, <&cp_clk>, <&cp_clk>, | |
1446 | <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>, | |
3672b059 | 1447 | <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; |
22a1f595 | 1448 | #clock-cells = <1>; |
b54010af | 1449 | clock-indices = < |
81f6883f GU |
1450 | R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3 |
1451 | R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0 | |
17465149 WS |
1452 | R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS |
1453 | R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0 | |
22a1f595 | 1454 | >; |
91b56ca1 | 1455 | clock-output-names = |
81f6883f | 1456 | "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", |
17465149 WS |
1457 | "rcan1", "rcan0", "qspi_mod", "iic3", |
1458 | "i2c3", "i2c2", "i2c1", "i2c0"; | |
22a1f595 | 1459 | }; |
bcde3722 KM |
1460 | mstp10_clks: mstp10_clks@e6150998 { |
1461 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1462 | reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; | |
1463 | clocks = <&p_clk>, | |
d13d4e06 GU |
1464 | <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>, |
1465 | <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>, | |
1466 | <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>, | |
1467 | <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>, | |
1468 | <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>, | |
bcde3722 KM |
1469 | <&p_clk>, |
1470 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
1471 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
1472 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
1473 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
1474 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
a7163784 | 1475 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, |
bcde3722 KM |
1476 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>; |
1477 | ||
1478 | #clock-cells = <1>; | |
1479 | clock-indices = < | |
1480 | R8A7790_CLK_SSI_ALL | |
1481 | R8A7790_CLK_SSI9 R8A7790_CLK_SSI8 R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5 | |
1482 | R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 R8A7790_CLK_SSI1 R8A7790_CLK_SSI0 | |
1483 | R8A7790_CLK_SCU_ALL | |
1484 | R8A7790_CLK_SCU_DVC1 R8A7790_CLK_SCU_DVC0 | |
a7163784 | 1485 | R8A7790_CLK_SCU_CTU1_MIX1 R8A7790_CLK_SCU_CTU0_MIX0 |
bcde3722 KM |
1486 | R8A7790_CLK_SCU_SRC9 R8A7790_CLK_SCU_SRC8 R8A7790_CLK_SCU_SRC7 R8A7790_CLK_SCU_SRC6 R8A7790_CLK_SCU_SRC5 |
1487 | R8A7790_CLK_SCU_SRC4 R8A7790_CLK_SCU_SRC3 R8A7790_CLK_SCU_SRC2 R8A7790_CLK_SCU_SRC1 R8A7790_CLK_SCU_SRC0 | |
1488 | >; | |
1489 | clock-output-names = | |
1490 | "ssi-all", | |
1491 | "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", | |
1492 | "ssi4", "ssi3", "ssi2", "ssi1", "ssi0", | |
1493 | "scu-all", | |
1494 | "scu-dvc1", "scu-dvc0", | |
a7163784 | 1495 | "scu-ctu1-mix1", "scu-ctu0-mix0", |
bcde3722 KM |
1496 | "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5", |
1497 | "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0"; | |
1498 | }; | |
22a1f595 | 1499 | }; |
7053e134 | 1500 | |
328f39b8 GU |
1501 | prr: chipid@ff000044 { |
1502 | compatible = "renesas,prr"; | |
1503 | reg = <0 0xff000044 0 4>; | |
1504 | }; | |
1505 | ||
dd2b267b GU |
1506 | rst: reset-controller@e6160000 { |
1507 | compatible = "renesas,r8a7790-rst"; | |
1508 | reg = <0 0xe6160000 0 0x0100>; | |
1509 | }; | |
1510 | ||
4c8eb3c8 GU |
1511 | sysc: system-controller@e6180000 { |
1512 | compatible = "renesas,r8a7790-sysc"; | |
1513 | reg = <0 0xe6180000 0 0x0200>; | |
1514 | #power-domain-cells = <1>; | |
1515 | }; | |
1516 | ||
fad6d45c | 1517 | qspi: spi@e6b10000 { |
7053e134 GU |
1518 | compatible = "renesas,qspi-r8a7790", "renesas,qspi"; |
1519 | reg = <0 0xe6b10000 0 0x2c>; | |
3abb4d5f | 1520 | interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; |
7053e134 | 1521 | clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>; |
badf8570 NS |
1522 | dmas = <&dmac0 0x17>, <&dmac0 0x18>, |
1523 | <&dmac1 0x17>, <&dmac1 0x18>; | |
1524 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1525 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
7053e134 GU |
1526 | num-cs = <1>; |
1527 | #address-cells = <1>; | |
1528 | #size-cells = <0>; | |
1529 | status = "disabled"; | |
1530 | }; | |
ae8a6146 GU |
1531 | |
1532 | msiof0: spi@e6e20000 { | |
654450ba SH |
1533 | compatible = "renesas,msiof-r8a7790", |
1534 | "renesas,rcar-gen2-msiof"; | |
c7d1f08a | 1535 | reg = <0 0xe6e20000 0 0x0064>; |
3abb4d5f | 1536 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; |
ae8a6146 | 1537 | clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>; |
badf8570 NS |
1538 | dmas = <&dmac0 0x51>, <&dmac0 0x52>, |
1539 | <&dmac1 0x51>, <&dmac1 0x52>; | |
1540 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1541 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ae8a6146 GU |
1542 | #address-cells = <1>; |
1543 | #size-cells = <0>; | |
1544 | status = "disabled"; | |
1545 | }; | |
1546 | ||
1547 | msiof1: spi@e6e10000 { | |
654450ba SH |
1548 | compatible = "renesas,msiof-r8a7790", |
1549 | "renesas,rcar-gen2-msiof"; | |
c7d1f08a | 1550 | reg = <0 0xe6e10000 0 0x0064>; |
3abb4d5f | 1551 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; |
ae8a6146 | 1552 | clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>; |
badf8570 NS |
1553 | dmas = <&dmac0 0x55>, <&dmac0 0x56>, |
1554 | <&dmac1 0x55>, <&dmac1 0x56>; | |
1555 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1556 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ae8a6146 GU |
1557 | #address-cells = <1>; |
1558 | #size-cells = <0>; | |
1559 | status = "disabled"; | |
1560 | }; | |
1561 | ||
1562 | msiof2: spi@e6e00000 { | |
654450ba SH |
1563 | compatible = "renesas,msiof-r8a7790", |
1564 | "renesas,rcar-gen2-msiof"; | |
c7d1f08a | 1565 | reg = <0 0xe6e00000 0 0x0064>; |
3abb4d5f | 1566 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; |
ae8a6146 | 1567 | clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>; |
badf8570 NS |
1568 | dmas = <&dmac0 0x41>, <&dmac0 0x42>, |
1569 | <&dmac1 0x41>, <&dmac1 0x42>; | |
1570 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1571 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ae8a6146 GU |
1572 | #address-cells = <1>; |
1573 | #size-cells = <0>; | |
1574 | status = "disabled"; | |
1575 | }; | |
1576 | ||
1577 | msiof3: spi@e6c90000 { | |
654450ba SH |
1578 | compatible = "renesas,msiof-r8a7790", |
1579 | "renesas,rcar-gen2-msiof"; | |
c7d1f08a | 1580 | reg = <0 0xe6c90000 0 0x0064>; |
3abb4d5f | 1581 | interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; |
ae8a6146 | 1582 | clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>; |
badf8570 NS |
1583 | dmas = <&dmac0 0x45>, <&dmac0 0x46>, |
1584 | <&dmac1 0x45>, <&dmac1 0x46>; | |
1585 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1586 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ae8a6146 GU |
1587 | #address-cells = <1>; |
1588 | #size-cells = <0>; | |
1589 | status = "disabled"; | |
1590 | }; | |
7df2fd57 | 1591 | |
157fcd8a | 1592 | xhci: usb@ee000000 { |
92cc7798 | 1593 | compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci"; |
157fcd8a | 1594 | reg = <0 0xee000000 0 0xc00>; |
3abb4d5f | 1595 | interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; |
157fcd8a | 1596 | clocks = <&mstp3_clks R8A7790_CLK_SSUSB>; |
36ee3c27 | 1597 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
157fcd8a YS |
1598 | phys = <&usb2 1>; |
1599 | phy-names = "usb"; | |
1600 | status = "disabled"; | |
1601 | }; | |
1602 | ||
ff4f3eb8 | 1603 | pci0: pci@ee090000 { |
2d82c144 | 1604 | compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; |
ff4f3eb8 | 1605 | device_type = "pci"; |
ff4f3eb8 BD |
1606 | reg = <0 0xee090000 0 0xc00>, |
1607 | <0 0xee080000 0 0x1100>; | |
3abb4d5f | 1608 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
484adb00 | 1609 | clocks = <&mstp7_clks R8A7790_CLK_EHCI>; |
36ee3c27 | 1610 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ff4f3eb8 BD |
1611 | status = "disabled"; |
1612 | ||
1613 | bus-range = <0 0>; | |
1614 | #address-cells = <3>; | |
1615 | #size-cells = <2>; | |
1616 | #interrupt-cells = <1>; | |
1617 | ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; | |
1618 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
3abb4d5f SH |
1619 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH |
1620 | 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH | |
1621 | 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
538c40e5 | 1622 | |
f7d569c1 | 1623 | usb@1,0 { |
538c40e5 | 1624 | reg = <0x800 0 0 0 0>; |
538c40e5 SS |
1625 | phys = <&usb0 0>; |
1626 | phy-names = "usb"; | |
1627 | }; | |
1628 | ||
f7d569c1 | 1629 | usb@2,0 { |
538c40e5 | 1630 | reg = <0x1000 0 0 0 0>; |
538c40e5 SS |
1631 | phys = <&usb0 0>; |
1632 | phy-names = "usb"; | |
1633 | }; | |
ff4f3eb8 BD |
1634 | }; |
1635 | ||
1636 | pci1: pci@ee0b0000 { | |
2d82c144 | 1637 | compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; |
ff4f3eb8 | 1638 | device_type = "pci"; |
ff4f3eb8 BD |
1639 | reg = <0 0xee0b0000 0 0xc00>, |
1640 | <0 0xee0a0000 0 0x1100>; | |
3abb4d5f | 1641 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; |
484adb00 | 1642 | clocks = <&mstp7_clks R8A7790_CLK_EHCI>; |
36ee3c27 | 1643 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ff4f3eb8 BD |
1644 | status = "disabled"; |
1645 | ||
1646 | bus-range = <1 1>; | |
1647 | #address-cells = <3>; | |
1648 | #size-cells = <2>; | |
1649 | #interrupt-cells = <1>; | |
1650 | ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>; | |
1651 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
3abb4d5f SH |
1652 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH |
1653 | 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH | |
1654 | 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; | |
ff4f3eb8 BD |
1655 | }; |
1656 | ||
1657 | pci2: pci@ee0d0000 { | |
2d82c144 | 1658 | compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; |
ff4f3eb8 BD |
1659 | device_type = "pci"; |
1660 | clocks = <&mstp7_clks R8A7790_CLK_EHCI>; | |
36ee3c27 | 1661 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ff4f3eb8 BD |
1662 | reg = <0 0xee0d0000 0 0xc00>, |
1663 | <0 0xee0c0000 0 0x1100>; | |
3abb4d5f | 1664 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; |
ff4f3eb8 BD |
1665 | status = "disabled"; |
1666 | ||
1667 | bus-range = <2 2>; | |
1668 | #address-cells = <3>; | |
1669 | #size-cells = <2>; | |
1670 | #interrupt-cells = <1>; | |
1671 | ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; | |
1672 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
3abb4d5f SH |
1673 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH |
1674 | 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH | |
1675 | 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; | |
538c40e5 | 1676 | |
f7d569c1 RH |
1677 | usb@1,0 { |
1678 | reg = <0x20800 0 0 0 0>; | |
538c40e5 SS |
1679 | phys = <&usb2 0>; |
1680 | phy-names = "usb"; | |
1681 | }; | |
1682 | ||
f7d569c1 RH |
1683 | usb@2,0 { |
1684 | reg = <0x21000 0 0 0 0>; | |
538c40e5 SS |
1685 | phys = <&usb2 0>; |
1686 | phy-names = "usb"; | |
1687 | }; | |
ff4f3eb8 BD |
1688 | }; |
1689 | ||
745329d2 | 1690 | pciec: pcie@fe000000 { |
e670be8d | 1691 | compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2"; |
745329d2 PE |
1692 | reg = <0 0xfe000000 0 0x80000>; |
1693 | #address-cells = <3>; | |
1694 | #size-cells = <2>; | |
1695 | bus-range = <0x00 0xff>; | |
1696 | device_type = "pci"; | |
1697 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 | |
1698 | 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 | |
1699 | 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 | |
1700 | 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; | |
1701 | /* Map all possible DDR as inbound ranges */ | |
1702 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 | |
1703 | 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>; | |
3abb4d5f SH |
1704 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, |
1705 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, | |
1706 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; | |
745329d2 PE |
1707 | #interrupt-cells = <1>; |
1708 | interrupt-map-mask = <0 0 0 0>; | |
3abb4d5f | 1709 | interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; |
745329d2 PE |
1710 | clocks = <&mstp3_clks R8A7790_CLK_PCIEC>, <&pcie_bus_clk>; |
1711 | clock-names = "pcie", "pcie_bus"; | |
36ee3c27 | 1712 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
745329d2 PE |
1713 | status = "disabled"; |
1714 | }; | |
1715 | ||
b694e380 | 1716 | rcar_sound: sound@ec500000 { |
ad63241c KM |
1717 | /* |
1718 | * #sound-dai-cells is required | |
1719 | * | |
1720 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
1721 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
1722 | */ | |
31078ecd | 1723 | compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2"; |
7df2fd57 KM |
1724 | reg = <0 0xec500000 0 0x1000>, /* SCU */ |
1725 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
1726 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
4bc4a205 | 1727 | <0 0xec541000 0 0x280>, /* SSI */ |
0c602677 KM |
1728 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ |
1729 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
46a158f2 | 1730 | |
7df2fd57 KM |
1731 | clocks = <&mstp10_clks R8A7790_CLK_SSI_ALL>, |
1732 | <&mstp10_clks R8A7790_CLK_SSI9>, <&mstp10_clks R8A7790_CLK_SSI8>, | |
1733 | <&mstp10_clks R8A7790_CLK_SSI7>, <&mstp10_clks R8A7790_CLK_SSI6>, | |
1734 | <&mstp10_clks R8A7790_CLK_SSI5>, <&mstp10_clks R8A7790_CLK_SSI4>, | |
1735 | <&mstp10_clks R8A7790_CLK_SSI3>, <&mstp10_clks R8A7790_CLK_SSI2>, | |
1736 | <&mstp10_clks R8A7790_CLK_SSI1>, <&mstp10_clks R8A7790_CLK_SSI0>, | |
1737 | <&mstp10_clks R8A7790_CLK_SCU_SRC9>, <&mstp10_clks R8A7790_CLK_SCU_SRC8>, | |
1738 | <&mstp10_clks R8A7790_CLK_SCU_SRC7>, <&mstp10_clks R8A7790_CLK_SCU_SRC6>, | |
1739 | <&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>, | |
1740 | <&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>, | |
1741 | <&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>, | |
a7163784 | 1742 | <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>, |
fc67bf42 | 1743 | <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>, |
334d69a2 | 1744 | <&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>, |
7df2fd57 KM |
1745 | <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>; |
1746 | clock-names = "ssi-all", | |
1747 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", | |
1748 | "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", | |
1749 | "src.9", "src.8", "src.7", "src.6", "src.5", | |
1750 | "src.4", "src.3", "src.2", "src.1", "src.0", | |
a7163784 | 1751 | "ctu.0", "ctu.1", |
fc67bf42 | 1752 | "mix.0", "mix.1", |
334d69a2 | 1753 | "dvc.0", "dvc.1", |
7df2fd57 | 1754 | "clk_a", "clk_b", "clk_c", "clk_i"; |
36ee3c27 | 1755 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
7df2fd57 KM |
1756 | |
1757 | status = "disabled"; | |
1758 | ||
334d69a2 | 1759 | rcar_sound,dvc { |
2c3de367 | 1760 | dvc0: dvc-0 { |
c4a59df9 | 1761 | dmas = <&audma1 0xbc>; |
118a5093 KM |
1762 | dma-names = "tx"; |
1763 | }; | |
2c3de367 | 1764 | dvc1: dvc-1 { |
c4a59df9 | 1765 | dmas = <&audma1 0xbe>; |
118a5093 KM |
1766 | dma-names = "tx"; |
1767 | }; | |
334d69a2 KM |
1768 | }; |
1769 | ||
fc67bf42 | 1770 | rcar_sound,mix { |
2c3de367 GU |
1771 | mix0: mix-0 { }; |
1772 | mix1: mix-1 { }; | |
fc67bf42 KM |
1773 | }; |
1774 | ||
a7163784 | 1775 | rcar_sound,ctu { |
2c3de367 GU |
1776 | ctu00: ctu-0 { }; |
1777 | ctu01: ctu-1 { }; | |
1778 | ctu02: ctu-2 { }; | |
1779 | ctu03: ctu-3 { }; | |
1780 | ctu10: ctu-4 { }; | |
1781 | ctu11: ctu-5 { }; | |
1782 | ctu12: ctu-6 { }; | |
1783 | ctu13: ctu-7 { }; | |
a7163784 KM |
1784 | }; |
1785 | ||
7df2fd57 | 1786 | rcar_sound,src { |
2c3de367 | 1787 | src0: src-0 { |
3abb4d5f | 1788 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1789 | dmas = <&audma0 0x85>, <&audma1 0x9a>; |
1790 | dma-names = "rx", "tx"; | |
1791 | }; | |
2c3de367 | 1792 | src1: src-1 { |
3abb4d5f | 1793 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1794 | dmas = <&audma0 0x87>, <&audma1 0x9c>; |
1795 | dma-names = "rx", "tx"; | |
1796 | }; | |
2c3de367 | 1797 | src2: src-2 { |
3abb4d5f | 1798 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1799 | dmas = <&audma0 0x89>, <&audma1 0x9e>; |
1800 | dma-names = "rx", "tx"; | |
1801 | }; | |
2c3de367 | 1802 | src3: src-3 { |
3abb4d5f | 1803 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1804 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; |
1805 | dma-names = "rx", "tx"; | |
1806 | }; | |
2c3de367 | 1807 | src4: src-4 { |
3abb4d5f | 1808 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1809 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; |
1810 | dma-names = "rx", "tx"; | |
1811 | }; | |
2c3de367 | 1812 | src5: src-5 { |
3abb4d5f | 1813 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1814 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; |
1815 | dma-names = "rx", "tx"; | |
1816 | }; | |
2c3de367 | 1817 | src6: src-6 { |
3abb4d5f | 1818 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1819 | dmas = <&audma0 0x91>, <&audma1 0xb4>; |
1820 | dma-names = "rx", "tx"; | |
1821 | }; | |
2c3de367 | 1822 | src7: src-7 { |
3abb4d5f | 1823 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1824 | dmas = <&audma0 0x93>, <&audma1 0xb6>; |
1825 | dma-names = "rx", "tx"; | |
1826 | }; | |
2c3de367 | 1827 | src8: src-8 { |
3abb4d5f | 1828 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1829 | dmas = <&audma0 0x95>, <&audma1 0xb8>; |
1830 | dma-names = "rx", "tx"; | |
1831 | }; | |
2c3de367 | 1832 | src9: src-9 { |
3abb4d5f | 1833 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1834 | dmas = <&audma0 0x97>, <&audma1 0xba>; |
1835 | dma-names = "rx", "tx"; | |
1836 | }; | |
7df2fd57 KM |
1837 | }; |
1838 | ||
1839 | rcar_sound,ssi { | |
2c3de367 | 1840 | ssi0: ssi-0 { |
3abb4d5f | 1841 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1842 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
1843 | dma-names = "rx", "tx", "rxu", "txu"; | |
1844 | }; | |
2c3de367 | 1845 | ssi1: ssi-1 { |
3abb4d5f | 1846 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1847 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
1848 | dma-names = "rx", "tx", "rxu", "txu"; | |
1849 | }; | |
2c3de367 | 1850 | ssi2: ssi-2 { |
3abb4d5f | 1851 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1852 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
1853 | dma-names = "rx", "tx", "rxu", "txu"; | |
1854 | }; | |
2c3de367 | 1855 | ssi3: ssi-3 { |
3abb4d5f | 1856 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1857 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
1858 | dma-names = "rx", "tx", "rxu", "txu"; | |
1859 | }; | |
2c3de367 | 1860 | ssi4: ssi-4 { |
3abb4d5f | 1861 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1862 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
1863 | dma-names = "rx", "tx", "rxu", "txu"; | |
1864 | }; | |
2c3de367 | 1865 | ssi5: ssi-5 { |
3abb4d5f | 1866 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1867 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
1868 | dma-names = "rx", "tx", "rxu", "txu"; | |
1869 | }; | |
2c3de367 | 1870 | ssi6: ssi-6 { |
3abb4d5f | 1871 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1872 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
1873 | dma-names = "rx", "tx", "rxu", "txu"; | |
1874 | }; | |
2c3de367 | 1875 | ssi7: ssi-7 { |
3abb4d5f | 1876 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1877 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
1878 | dma-names = "rx", "tx", "rxu", "txu"; | |
1879 | }; | |
2c3de367 | 1880 | ssi8: ssi-8 { |
3abb4d5f | 1881 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1882 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
1883 | dma-names = "rx", "tx", "rxu", "txu"; | |
1884 | }; | |
2c3de367 | 1885 | ssi9: ssi-9 { |
3abb4d5f | 1886 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1887 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
1888 | dma-names = "rx", "tx", "rxu", "txu"; | |
1889 | }; | |
7df2fd57 KM |
1890 | }; |
1891 | }; | |
70496727 LP |
1892 | |
1893 | ipmmu_sy0: mmu@e6280000 { | |
c8d6686e | 1894 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1895 | reg = <0 0xe6280000 0 0x1000>; |
3abb4d5f SH |
1896 | interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, |
1897 | <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; | |
70496727 LP |
1898 | #iommu-cells = <1>; |
1899 | status = "disabled"; | |
1900 | }; | |
1901 | ||
1902 | ipmmu_sy1: mmu@e6290000 { | |
c8d6686e | 1903 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1904 | reg = <0 0xe6290000 0 0x1000>; |
3abb4d5f | 1905 | interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; |
70496727 LP |
1906 | #iommu-cells = <1>; |
1907 | status = "disabled"; | |
1908 | }; | |
1909 | ||
1910 | ipmmu_ds: mmu@e6740000 { | |
c8d6686e | 1911 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1912 | reg = <0 0xe6740000 0 0x1000>; |
3abb4d5f SH |
1913 | interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, |
1914 | <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; | |
70496727 LP |
1915 | #iommu-cells = <1>; |
1916 | status = "disabled"; | |
1917 | }; | |
1918 | ||
1919 | ipmmu_mp: mmu@ec680000 { | |
c8d6686e | 1920 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1921 | reg = <0 0xec680000 0 0x1000>; |
3abb4d5f | 1922 | interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; |
70496727 LP |
1923 | #iommu-cells = <1>; |
1924 | status = "disabled"; | |
1925 | }; | |
1926 | ||
1927 | ipmmu_mx: mmu@fe951000 { | |
c8d6686e | 1928 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1929 | reg = <0 0xfe951000 0 0x1000>; |
3abb4d5f SH |
1930 | interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, |
1931 | <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; | |
70496727 LP |
1932 | #iommu-cells = <1>; |
1933 | status = "disabled"; | |
1934 | }; | |
1935 | ||
1936 | ipmmu_rt: mmu@ffc80000 { | |
c8d6686e | 1937 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1938 | reg = <0 0xffc80000 0 0x1000>; |
3abb4d5f | 1939 | interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; |
70496727 LP |
1940 | #iommu-cells = <1>; |
1941 | status = "disabled"; | |
1942 | }; | |
0468b2d6 | 1943 | }; |