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Commit | Line | Data |
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0468b2d6 MD |
1 | /* |
2 | * Device Tree Source for the r8a7790 SoC | |
3 | * | |
b621f6d4 | 4 | * Copyright (C) 2015 Renesas Electronics Corporation |
d8913c67 SS |
5 | * Copyright (C) 2013-2014 Renesas Solutions Corp. |
6 | * Copyright (C) 2014 Cogent Embedded Inc. | |
0468b2d6 MD |
7 | * |
8 | * This file is licensed under the terms of the GNU General Public License | |
9 | * version 2. This program is licensed "as is" without any warranty of any | |
10 | * kind, whether express or implied. | |
11 | */ | |
12 | ||
5802c420 | 13 | #include <dt-bindings/clock/r8a7790-cpg-mssr.h> |
5f75e73c LP |
14 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
15 | #include <dt-bindings/interrupt-controller/irq.h> | |
4c8eb3c8 | 16 | #include <dt-bindings/power/r8a7790-sysc.h> |
5f75e73c | 17 | |
0468b2d6 MD |
18 | / { |
19 | compatible = "renesas,r8a7790"; | |
20 | interrupt-parent = <&gic>; | |
8585deb1 TY |
21 | #address-cells = <2>; |
22 | #size-cells = <2>; | |
0468b2d6 | 23 | |
6b1d7c68 WS |
24 | aliases { |
25 | i2c0 = &i2c0; | |
26 | i2c1 = &i2c1; | |
27 | i2c2 = &i2c2; | |
28 | i2c3 = &i2c3; | |
05f39916 WS |
29 | i2c4 = &iic0; |
30 | i2c5 = &iic1; | |
31 | i2c6 = &iic2; | |
32 | i2c7 = &iic3; | |
fad6d45c | 33 | spi0 = &qspi; |
ae8a6146 GU |
34 | spi1 = &msiof0; |
35 | spi2 = &msiof1; | |
36 | spi3 = &msiof2; | |
37 | spi4 = &msiof3; | |
9f685bfc BD |
38 | vin0 = &vin0; |
39 | vin1 = &vin1; | |
40 | vin2 = &vin2; | |
41 | vin3 = &vin3; | |
6b1d7c68 WS |
42 | }; |
43 | ||
0468b2d6 MD |
44 | cpus { |
45 | #address-cells = <1>; | |
46 | #size-cells = <0>; | |
dc378795 | 47 | enable-method = "renesas,apmu"; |
0468b2d6 MD |
48 | |
49 | cpu0: cpu@0 { | |
50 | device_type = "cpu"; | |
51 | compatible = "arm,cortex-a15"; | |
52 | reg = <0>; | |
53 | clock-frequency = <1300000000>; | |
b989e138 | 54 | voltage-tolerance = <1>; /* 1% */ |
5802c420 | 55 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; |
b989e138 | 56 | clock-latency = <300000>; /* 300 us */ |
4c8eb3c8 | 57 | power-domains = <&sysc R8A7790_PD_CA15_CPU0>; |
fb1cecd4 | 58 | next-level-cache = <&L2_CA15>; |
5bdc8125 | 59 | capacity-dmips-mhz = <1024>; |
b989e138 BC |
60 | |
61 | /* kHz - uV - OPPs unknown yet */ | |
62 | operating-points = <1400000 1000000>, | |
63 | <1225000 1000000>, | |
64 | <1050000 1000000>, | |
65 | < 875000 1000000>, | |
66 | < 700000 1000000>, | |
67 | < 350000 1000000>; | |
0468b2d6 | 68 | }; |
c1f95979 MD |
69 | |
70 | cpu1: cpu@1 { | |
71 | device_type = "cpu"; | |
72 | compatible = "arm,cortex-a15"; | |
73 | reg = <1>; | |
74 | clock-frequency = <1300000000>; | |
aa4c2fdf | 75 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; |
4c8eb3c8 | 76 | power-domains = <&sysc R8A7790_PD_CA15_CPU1>; |
fb1cecd4 | 77 | next-level-cache = <&L2_CA15>; |
5bdc8125 | 78 | capacity-dmips-mhz = <1024>; |
c1f95979 MD |
79 | }; |
80 | ||
81 | cpu2: cpu@2 { | |
82 | device_type = "cpu"; | |
83 | compatible = "arm,cortex-a15"; | |
84 | reg = <2>; | |
85 | clock-frequency = <1300000000>; | |
aa4c2fdf | 86 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; |
4c8eb3c8 | 87 | power-domains = <&sysc R8A7790_PD_CA15_CPU2>; |
fb1cecd4 | 88 | next-level-cache = <&L2_CA15>; |
5bdc8125 | 89 | capacity-dmips-mhz = <1024>; |
c1f95979 MD |
90 | }; |
91 | ||
92 | cpu3: cpu@3 { | |
93 | device_type = "cpu"; | |
94 | compatible = "arm,cortex-a15"; | |
95 | reg = <3>; | |
96 | clock-frequency = <1300000000>; | |
aa4c2fdf | 97 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; |
4c8eb3c8 | 98 | power-domains = <&sysc R8A7790_PD_CA15_CPU3>; |
fb1cecd4 | 99 | next-level-cache = <&L2_CA15>; |
5bdc8125 | 100 | capacity-dmips-mhz = <1024>; |
c1f95979 | 101 | }; |
2007e74c | 102 | |
1eed15e4 | 103 | cpu4: cpu@100 { |
2007e74c MD |
104 | device_type = "cpu"; |
105 | compatible = "arm,cortex-a7"; | |
106 | reg = <0x100>; | |
107 | clock-frequency = <780000000>; | |
aea0089a | 108 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; |
4c8eb3c8 | 109 | power-domains = <&sysc R8A7790_PD_CA7_CPU0>; |
fb1cecd4 | 110 | next-level-cache = <&L2_CA7>; |
5bdc8125 | 111 | capacity-dmips-mhz = <539>; |
2007e74c MD |
112 | }; |
113 | ||
1eed15e4 | 114 | cpu5: cpu@101 { |
2007e74c MD |
115 | device_type = "cpu"; |
116 | compatible = "arm,cortex-a7"; | |
117 | reg = <0x101>; | |
118 | clock-frequency = <780000000>; | |
aea0089a | 119 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; |
4c8eb3c8 | 120 | power-domains = <&sysc R8A7790_PD_CA7_CPU1>; |
fb1cecd4 | 121 | next-level-cache = <&L2_CA7>; |
5bdc8125 | 122 | capacity-dmips-mhz = <539>; |
2007e74c MD |
123 | }; |
124 | ||
1eed15e4 | 125 | cpu6: cpu@102 { |
2007e74c MD |
126 | device_type = "cpu"; |
127 | compatible = "arm,cortex-a7"; | |
128 | reg = <0x102>; | |
129 | clock-frequency = <780000000>; | |
aea0089a | 130 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; |
4c8eb3c8 | 131 | power-domains = <&sysc R8A7790_PD_CA7_CPU2>; |
fb1cecd4 | 132 | next-level-cache = <&L2_CA7>; |
5bdc8125 | 133 | capacity-dmips-mhz = <539>; |
2007e74c MD |
134 | }; |
135 | ||
1eed15e4 | 136 | cpu7: cpu@103 { |
2007e74c MD |
137 | device_type = "cpu"; |
138 | compatible = "arm,cortex-a7"; | |
139 | reg = <0x103>; | |
140 | clock-frequency = <780000000>; | |
aea0089a | 141 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; |
4c8eb3c8 | 142 | power-domains = <&sysc R8A7790_PD_CA7_CPU3>; |
fb1cecd4 | 143 | next-level-cache = <&L2_CA7>; |
5bdc8125 | 144 | capacity-dmips-mhz = <539>; |
2007e74c | 145 | }; |
2c3de367 | 146 | |
d492909c | 147 | L2_CA15: cache-controller-0 { |
2c3de367 | 148 | compatible = "cache"; |
2c3de367 GU |
149 | power-domains = <&sysc R8A7790_PD_CA15_SCU>; |
150 | cache-unified; | |
151 | cache-level = <2>; | |
152 | }; | |
153 | ||
d492909c | 154 | L2_CA7: cache-controller-1 { |
2c3de367 | 155 | compatible = "cache"; |
2c3de367 GU |
156 | power-domains = <&sysc R8A7790_PD_CA7_SCU>; |
157 | cache-unified; | |
158 | cache-level = <2>; | |
159 | }; | |
0468b2d6 MD |
160 | }; |
161 | ||
a8b805f3 KM |
162 | thermal-zones { |
163 | cpu_thermal: cpu-thermal { | |
164 | polling-delay-passive = <0>; | |
165 | polling-delay = <0>; | |
166 | ||
167 | thermal-sensors = <&thermal>; | |
168 | ||
169 | trips { | |
170 | cpu-crit { | |
171 | temperature = <115000>; | |
172 | hysteresis = <0>; | |
173 | type = "critical"; | |
174 | }; | |
175 | }; | |
176 | cooling-maps { | |
177 | }; | |
178 | }; | |
179 | }; | |
180 | ||
dc378795 MD |
181 | apmu@e6151000 { |
182 | compatible = "renesas,r8a7790-apmu", "renesas,apmu"; | |
183 | reg = <0 0xe6151000 0 0x188>; | |
184 | cpus = <&cpu4 &cpu5 &cpu6 &cpu7>; | |
185 | }; | |
186 | ||
187 | apmu@e6152000 { | |
188 | compatible = "renesas,r8a7790-apmu", "renesas,apmu"; | |
189 | reg = <0 0xe6152000 0 0x188>; | |
190 | cpus = <&cpu0 &cpu1 &cpu2 &cpu3>; | |
191 | }; | |
192 | ||
0468b2d6 | 193 | gic: interrupt-controller@f1001000 { |
e715e9c5 | 194 | compatible = "arm,gic-400"; |
0468b2d6 MD |
195 | #interrupt-cells = <3>; |
196 | #address-cells = <0>; | |
197 | interrupt-controller; | |
8585deb1 | 198 | reg = <0 0xf1001000 0 0x1000>, |
387720c9 | 199 | <0 0xf1002000 0 0x2000>, |
8585deb1 TY |
200 | <0 0xf1004000 0 0x2000>, |
201 | <0 0xf1006000 0 0x2000>; | |
3abb4d5f | 202 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
5802c420 | 203 | clocks = <&cpg CPG_MOD 408>; |
9e585236 GU |
204 | clock-names = "clk"; |
205 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; | |
34fbd2b1 | 206 | resets = <&cpg 408>; |
0468b2d6 MD |
207 | }; |
208 | ||
23de2278 | 209 | gpio0: gpio@e6050000 { |
26742a19 | 210 | compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio"; |
23de2278 | 211 | reg = <0 0xe6050000 0 0x50>; |
3abb4d5f | 212 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
213 | #gpio-cells = <2>; |
214 | gpio-controller; | |
215 | gpio-ranges = <&pfc 0 0 32>; | |
216 | #interrupt-cells = <2>; | |
217 | interrupt-controller; | |
5802c420 | 218 | clocks = <&cpg CPG_MOD 912>; |
36ee3c27 | 219 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 220 | resets = <&cpg 912>; |
f98e10c8 LP |
221 | }; |
222 | ||
23de2278 | 223 | gpio1: gpio@e6051000 { |
26742a19 | 224 | compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio"; |
23de2278 | 225 | reg = <0 0xe6051000 0 0x50>; |
3abb4d5f | 226 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
227 | #gpio-cells = <2>; |
228 | gpio-controller; | |
56a2182f | 229 | gpio-ranges = <&pfc 0 32 30>; |
f98e10c8 LP |
230 | #interrupt-cells = <2>; |
231 | interrupt-controller; | |
5802c420 | 232 | clocks = <&cpg CPG_MOD 911>; |
36ee3c27 | 233 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 234 | resets = <&cpg 911>; |
f98e10c8 LP |
235 | }; |
236 | ||
23de2278 | 237 | gpio2: gpio@e6052000 { |
26742a19 | 238 | compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio"; |
23de2278 | 239 | reg = <0 0xe6052000 0 0x50>; |
3abb4d5f | 240 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
241 | #gpio-cells = <2>; |
242 | gpio-controller; | |
56a2182f | 243 | gpio-ranges = <&pfc 0 64 30>; |
f98e10c8 LP |
244 | #interrupt-cells = <2>; |
245 | interrupt-controller; | |
5802c420 | 246 | clocks = <&cpg CPG_MOD 910>; |
36ee3c27 | 247 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 248 | resets = <&cpg 910>; |
f98e10c8 LP |
249 | }; |
250 | ||
23de2278 | 251 | gpio3: gpio@e6053000 { |
26742a19 | 252 | compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio"; |
23de2278 | 253 | reg = <0 0xe6053000 0 0x50>; |
3abb4d5f | 254 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
255 | #gpio-cells = <2>; |
256 | gpio-controller; | |
257 | gpio-ranges = <&pfc 0 96 32>; | |
258 | #interrupt-cells = <2>; | |
259 | interrupt-controller; | |
5802c420 | 260 | clocks = <&cpg CPG_MOD 909>; |
36ee3c27 | 261 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 262 | resets = <&cpg 909>; |
f98e10c8 LP |
263 | }; |
264 | ||
23de2278 | 265 | gpio4: gpio@e6054000 { |
26742a19 | 266 | compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio"; |
23de2278 | 267 | reg = <0 0xe6054000 0 0x50>; |
3abb4d5f | 268 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
269 | #gpio-cells = <2>; |
270 | gpio-controller; | |
271 | gpio-ranges = <&pfc 0 128 32>; | |
272 | #interrupt-cells = <2>; | |
273 | interrupt-controller; | |
5802c420 | 274 | clocks = <&cpg CPG_MOD 908>; |
36ee3c27 | 275 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 276 | resets = <&cpg 908>; |
f98e10c8 LP |
277 | }; |
278 | ||
23de2278 | 279 | gpio5: gpio@e6055000 { |
26742a19 | 280 | compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio"; |
23de2278 | 281 | reg = <0 0xe6055000 0 0x50>; |
3abb4d5f | 282 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
283 | #gpio-cells = <2>; |
284 | gpio-controller; | |
285 | gpio-ranges = <&pfc 0 160 32>; | |
286 | #interrupt-cells = <2>; | |
287 | interrupt-controller; | |
5802c420 | 288 | clocks = <&cpg CPG_MOD 907>; |
36ee3c27 | 289 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 290 | resets = <&cpg 907>; |
f98e10c8 LP |
291 | }; |
292 | ||
a8b805f3 KM |
293 | thermal: thermal@e61f0000 { |
294 | compatible = "renesas,thermal-r8a7790", | |
295 | "renesas,rcar-gen2-thermal", | |
296 | "renesas,rcar-thermal"; | |
03e2f56b | 297 | reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; |
3abb4d5f | 298 | interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 299 | clocks = <&cpg CPG_MOD 522>; |
36ee3c27 | 300 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 301 | resets = <&cpg 522>; |
a8b805f3 | 302 | #thermal-sensor-cells = <0>; |
03e2f56b MD |
303 | }; |
304 | ||
0468b2d6 MD |
305 | timer { |
306 | compatible = "arm,armv7-timer"; | |
3abb4d5f SH |
307 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
308 | <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
309 | <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
310 | <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; | |
0468b2d6 | 311 | }; |
8f5ec0a5 | 312 | |
39cf6d73 | 313 | cmt0: timer@ffca0000 { |
37757030 | 314 | compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2"; |
39cf6d73 | 315 | reg = <0 0xffca0000 0 0x1004>; |
3abb4d5f SH |
316 | interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, |
317 | <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; | |
5802c420 | 318 | clocks = <&cpg CPG_MOD 124>; |
39cf6d73 | 319 | clock-names = "fck"; |
36ee3c27 | 320 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 321 | resets = <&cpg 124>; |
39cf6d73 LP |
322 | |
323 | renesas,channels-mask = <0x60>; | |
324 | ||
325 | status = "disabled"; | |
326 | }; | |
327 | ||
328 | cmt1: timer@e6130000 { | |
37757030 | 329 | compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2"; |
39cf6d73 | 330 | reg = <0 0xe6130000 0 0x1004>; |
3abb4d5f SH |
331 | interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, |
332 | <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, | |
333 | <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, | |
334 | <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, | |
335 | <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, | |
336 | <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, | |
337 | <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, | |
338 | <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; | |
5802c420 | 339 | clocks = <&cpg CPG_MOD 329>; |
39cf6d73 | 340 | clock-names = "fck"; |
36ee3c27 | 341 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 342 | resets = <&cpg 329>; |
39cf6d73 LP |
343 | |
344 | renesas,channels-mask = <0xff>; | |
345 | ||
346 | status = "disabled"; | |
347 | }; | |
348 | ||
8f5ec0a5 | 349 | irqc0: interrupt-controller@e61c0000 { |
220fc352 | 350 | compatible = "renesas,irqc-r8a7790", "renesas,irqc"; |
8f5ec0a5 MD |
351 | #interrupt-cells = <2>; |
352 | interrupt-controller; | |
8585deb1 | 353 | reg = <0 0xe61c0000 0 0x200>; |
3abb4d5f SH |
354 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, |
355 | <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, | |
356 | <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, | |
357 | <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; | |
5802c420 | 358 | clocks = <&cpg CPG_MOD 407>; |
36ee3c27 | 359 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 360 | resets = <&cpg 407>; |
8f5ec0a5 | 361 | }; |
8c9b1aa4 | 362 | |
b9fea49c | 363 | dmac0: dma-controller@e6700000 { |
4af0a664 | 364 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
b9fea49c | 365 | reg = <0 0xe6700000 0 0x20000>; |
3abb4d5f SH |
366 | interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH |
367 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH | |
368 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH | |
369 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH | |
370 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH | |
371 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH | |
372 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH | |
373 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH | |
374 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH | |
375 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH | |
376 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH | |
377 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH | |
378 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH | |
379 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH | |
380 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH | |
381 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; | |
b9fea49c LP |
382 | interrupt-names = "error", |
383 | "ch0", "ch1", "ch2", "ch3", | |
384 | "ch4", "ch5", "ch6", "ch7", | |
385 | "ch8", "ch9", "ch10", "ch11", | |
386 | "ch12", "ch13", "ch14"; | |
5802c420 | 387 | clocks = <&cpg CPG_MOD 219>; |
b9fea49c | 388 | clock-names = "fck"; |
36ee3c27 | 389 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 390 | resets = <&cpg 219>; |
b9fea49c LP |
391 | #dma-cells = <1>; |
392 | dma-channels = <15>; | |
393 | }; | |
394 | ||
395 | dmac1: dma-controller@e6720000 { | |
4af0a664 | 396 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
b9fea49c | 397 | reg = <0 0xe6720000 0 0x20000>; |
3abb4d5f SH |
398 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH |
399 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH | |
400 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH | |
401 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH | |
402 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH | |
403 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH | |
404 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH | |
405 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH | |
406 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH | |
407 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH | |
408 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH | |
409 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH | |
410 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH | |
411 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH | |
412 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH | |
413 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; | |
b9fea49c LP |
414 | interrupt-names = "error", |
415 | "ch0", "ch1", "ch2", "ch3", | |
416 | "ch4", "ch5", "ch6", "ch7", | |
417 | "ch8", "ch9", "ch10", "ch11", | |
418 | "ch12", "ch13", "ch14"; | |
5802c420 | 419 | clocks = <&cpg CPG_MOD 218>; |
b9fea49c | 420 | clock-names = "fck"; |
36ee3c27 | 421 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 422 | resets = <&cpg 218>; |
b9fea49c LP |
423 | #dma-cells = <1>; |
424 | dma-channels = <15>; | |
425 | }; | |
ba3240be KM |
426 | |
427 | audma0: dma-controller@ec700000 { | |
4af0a664 | 428 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
ba3240be | 429 | reg = <0 0xec700000 0 0x10000>; |
3abb4d5f SH |
430 | interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH |
431 | GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH | |
432 | GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH | |
433 | GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH | |
434 | GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH | |
435 | GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH | |
436 | GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH | |
437 | GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH | |
438 | GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH | |
439 | GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH | |
440 | GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH | |
441 | GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH | |
442 | GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH | |
443 | GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; | |
ba3240be KM |
444 | interrupt-names = "error", |
445 | "ch0", "ch1", "ch2", "ch3", | |
446 | "ch4", "ch5", "ch6", "ch7", | |
447 | "ch8", "ch9", "ch10", "ch11", | |
448 | "ch12"; | |
5802c420 | 449 | clocks = <&cpg CPG_MOD 502>; |
ba3240be | 450 | clock-names = "fck"; |
36ee3c27 | 451 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 452 | resets = <&cpg 502>; |
ba3240be KM |
453 | #dma-cells = <1>; |
454 | dma-channels = <13>; | |
455 | }; | |
456 | ||
457 | audma1: dma-controller@ec720000 { | |
4af0a664 | 458 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
ba3240be | 459 | reg = <0 0xec720000 0 0x10000>; |
3abb4d5f SH |
460 | interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH |
461 | GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH | |
462 | GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH | |
463 | GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH | |
464 | GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH | |
465 | GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH | |
466 | GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH | |
467 | GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH | |
468 | GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH | |
469 | GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH | |
470 | GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH | |
471 | GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH | |
472 | GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH | |
473 | GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; | |
ba3240be KM |
474 | interrupt-names = "error", |
475 | "ch0", "ch1", "ch2", "ch3", | |
476 | "ch4", "ch5", "ch6", "ch7", | |
477 | "ch8", "ch9", "ch10", "ch11", | |
478 | "ch12"; | |
5802c420 | 479 | clocks = <&cpg CPG_MOD 501>; |
ba3240be | 480 | clock-names = "fck"; |
36ee3c27 | 481 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 482 | resets = <&cpg 501>; |
ba3240be KM |
483 | #dma-cells = <1>; |
484 | dma-channels = <13>; | |
485 | }; | |
486 | ||
a3ff2090 | 487 | usb_dmac0: dma-controller@e65a0000 { |
d01c8bec | 488 | compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; |
a3ff2090 | 489 | reg = <0 0xe65a0000 0 0x100>; |
3abb4d5f SH |
490 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH |
491 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
a3ff2090 | 492 | interrupt-names = "ch0", "ch1"; |
5802c420 | 493 | clocks = <&cpg CPG_MOD 330>; |
36ee3c27 | 494 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 495 | resets = <&cpg 330>; |
a3ff2090 YS |
496 | #dma-cells = <1>; |
497 | dma-channels = <2>; | |
498 | }; | |
499 | ||
500 | usb_dmac1: dma-controller@e65b0000 { | |
d01c8bec | 501 | compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; |
a3ff2090 | 502 | reg = <0 0xe65b0000 0 0x100>; |
3abb4d5f SH |
503 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH |
504 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
a3ff2090 | 505 | interrupt-names = "ch0", "ch1"; |
5802c420 | 506 | clocks = <&cpg CPG_MOD 331>; |
36ee3c27 | 507 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 508 | resets = <&cpg 331>; |
a3ff2090 YS |
509 | #dma-cells = <1>; |
510 | dma-channels = <2>; | |
511 | }; | |
512 | ||
edd2b9f4 GL |
513 | i2c0: i2c@e6508000 { |
514 | #address-cells = <1>; | |
515 | #size-cells = <0>; | |
82f8bfbe | 516 | compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; |
edd2b9f4 | 517 | reg = <0 0xe6508000 0 0x40>; |
3abb4d5f | 518 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 519 | clocks = <&cpg CPG_MOD 931>; |
36ee3c27 | 520 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 521 | resets = <&cpg 931>; |
ac8e7f31 | 522 | i2c-scl-internal-delay-ns = <110>; |
edd2b9f4 GL |
523 | status = "disabled"; |
524 | }; | |
525 | ||
526 | i2c1: i2c@e6518000 { | |
527 | #address-cells = <1>; | |
528 | #size-cells = <0>; | |
82f8bfbe | 529 | compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; |
edd2b9f4 | 530 | reg = <0 0xe6518000 0 0x40>; |
3abb4d5f | 531 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 532 | clocks = <&cpg CPG_MOD 930>; |
36ee3c27 | 533 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 534 | resets = <&cpg 930>; |
ac8e7f31 | 535 | i2c-scl-internal-delay-ns = <6>; |
edd2b9f4 GL |
536 | status = "disabled"; |
537 | }; | |
538 | ||
539 | i2c2: i2c@e6530000 { | |
540 | #address-cells = <1>; | |
541 | #size-cells = <0>; | |
82f8bfbe | 542 | compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; |
edd2b9f4 | 543 | reg = <0 0xe6530000 0 0x40>; |
3abb4d5f | 544 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 545 | clocks = <&cpg CPG_MOD 929>; |
36ee3c27 | 546 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 547 | resets = <&cpg 929>; |
ac8e7f31 | 548 | i2c-scl-internal-delay-ns = <6>; |
edd2b9f4 GL |
549 | status = "disabled"; |
550 | }; | |
551 | ||
552 | i2c3: i2c@e6540000 { | |
553 | #address-cells = <1>; | |
554 | #size-cells = <0>; | |
82f8bfbe | 555 | compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; |
edd2b9f4 | 556 | reg = <0 0xe6540000 0 0x40>; |
3abb4d5f | 557 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 558 | clocks = <&cpg CPG_MOD 928>; |
36ee3c27 | 559 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 560 | resets = <&cpg 928>; |
ac8e7f31 | 561 | i2c-scl-internal-delay-ns = <110>; |
edd2b9f4 GL |
562 | status = "disabled"; |
563 | }; | |
564 | ||
05f39916 WS |
565 | iic0: i2c@e6500000 { |
566 | #address-cells = <1>; | |
567 | #size-cells = <0>; | |
b8075eea SH |
568 | compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", |
569 | "renesas,rmobile-iic"; | |
05f39916 | 570 | reg = <0 0xe6500000 0 0x425>; |
3abb4d5f | 571 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 572 | clocks = <&cpg CPG_MOD 318>; |
badf8570 NS |
573 | dmas = <&dmac0 0x61>, <&dmac0 0x62>, |
574 | <&dmac1 0x61>, <&dmac1 0x62>; | |
575 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 576 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 577 | resets = <&cpg 318>; |
05f39916 WS |
578 | status = "disabled"; |
579 | }; | |
580 | ||
581 | iic1: i2c@e6510000 { | |
582 | #address-cells = <1>; | |
583 | #size-cells = <0>; | |
b8075eea SH |
584 | compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", |
585 | "renesas,rmobile-iic"; | |
05f39916 | 586 | reg = <0 0xe6510000 0 0x425>; |
3abb4d5f | 587 | interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 588 | clocks = <&cpg CPG_MOD 323>; |
badf8570 NS |
589 | dmas = <&dmac0 0x65>, <&dmac0 0x66>, |
590 | <&dmac1 0x65>, <&dmac1 0x66>; | |
591 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 592 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 593 | resets = <&cpg 323>; |
05f39916 WS |
594 | status = "disabled"; |
595 | }; | |
596 | ||
597 | iic2: i2c@e6520000 { | |
598 | #address-cells = <1>; | |
599 | #size-cells = <0>; | |
b8075eea SH |
600 | compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", |
601 | "renesas,rmobile-iic"; | |
05f39916 | 602 | reg = <0 0xe6520000 0 0x425>; |
3abb4d5f | 603 | interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 604 | clocks = <&cpg CPG_MOD 300>; |
badf8570 NS |
605 | dmas = <&dmac0 0x69>, <&dmac0 0x6a>, |
606 | <&dmac1 0x69>, <&dmac1 0x6a>; | |
607 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 608 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 609 | resets = <&cpg 300>; |
05f39916 WS |
610 | status = "disabled"; |
611 | }; | |
612 | ||
613 | iic3: i2c@e60b0000 { | |
614 | #address-cells = <1>; | |
615 | #size-cells = <0>; | |
b8075eea SH |
616 | compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", |
617 | "renesas,rmobile-iic"; | |
05f39916 | 618 | reg = <0 0xe60b0000 0 0x425>; |
3abb4d5f | 619 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 620 | clocks = <&cpg CPG_MOD 926>; |
badf8570 NS |
621 | dmas = <&dmac0 0x77>, <&dmac0 0x78>, |
622 | <&dmac1 0x77>, <&dmac1 0x78>; | |
623 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 624 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 625 | resets = <&cpg 926>; |
05f39916 WS |
626 | status = "disabled"; |
627 | }; | |
628 | ||
22c2b78d | 629 | mmcif0: mmc@ee200000 { |
063e8560 | 630 | compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; |
8c9b1aa4 | 631 | reg = <0 0xee200000 0 0x80>; |
3abb4d5f | 632 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 633 | clocks = <&cpg CPG_MOD 315>; |
badf8570 NS |
634 | dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, |
635 | <&dmac1 0xd1>, <&dmac1 0xd2>; | |
636 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 637 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 638 | resets = <&cpg 315>; |
8c9b1aa4 GL |
639 | reg-io-width = <4>; |
640 | status = "disabled"; | |
96370057 | 641 | max-frequency = <97500000>; |
8c9b1aa4 GL |
642 | }; |
643 | ||
b718aa44 | 644 | mmcif1: mmc@ee220000 { |
063e8560 | 645 | compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; |
8c9b1aa4 | 646 | reg = <0 0xee220000 0 0x80>; |
3abb4d5f | 647 | interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 648 | clocks = <&cpg CPG_MOD 305>; |
badf8570 NS |
649 | dmas = <&dmac0 0xe1>, <&dmac0 0xe2>, |
650 | <&dmac1 0xe1>, <&dmac1 0xe2>; | |
651 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 652 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 653 | resets = <&cpg 305>; |
8c9b1aa4 GL |
654 | reg-io-width = <4>; |
655 | status = "disabled"; | |
96370057 | 656 | max-frequency = <97500000>; |
8c9b1aa4 GL |
657 | }; |
658 | ||
a5f4ae3c | 659 | pfc: pin-controller@e6060000 { |
9694c778 LP |
660 | compatible = "renesas,pfc-r8a7790"; |
661 | reg = <0 0xe6060000 0 0x250>; | |
662 | }; | |
55689bfa | 663 | |
b718aa44 | 664 | sdhi0: sd@ee100000 { |
df1d0584 | 665 | compatible = "renesas,sdhi-r8a7790"; |
66f47ed0 | 666 | reg = <0 0xee100000 0 0x328>; |
3abb4d5f | 667 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 668 | clocks = <&cpg CPG_MOD 314>; |
badf8570 NS |
669 | dmas = <&dmac0 0xcd>, <&dmac0 0xce>, |
670 | <&dmac1 0xcd>, <&dmac1 0xce>; | |
671 | dma-names = "tx", "rx", "tx", "rx"; | |
21c7d0fc | 672 | max-frequency = <195000000>; |
36ee3c27 | 673 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 674 | resets = <&cpg 314>; |
8c9b1aa4 GL |
675 | status = "disabled"; |
676 | }; | |
677 | ||
b718aa44 | 678 | sdhi1: sd@ee120000 { |
df1d0584 | 679 | compatible = "renesas,sdhi-r8a7790"; |
66f47ed0 | 680 | reg = <0 0xee120000 0 0x328>; |
3abb4d5f | 681 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 682 | clocks = <&cpg CPG_MOD 313>; |
badf8570 NS |
683 | dmas = <&dmac0 0xc9>, <&dmac0 0xca>, |
684 | <&dmac1 0xc9>, <&dmac1 0xca>; | |
685 | dma-names = "tx", "rx", "tx", "rx"; | |
21c7d0fc | 686 | max-frequency = <195000000>; |
36ee3c27 | 687 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 688 | resets = <&cpg 313>; |
8c9b1aa4 GL |
689 | status = "disabled"; |
690 | }; | |
691 | ||
b718aa44 | 692 | sdhi2: sd@ee140000 { |
df1d0584 | 693 | compatible = "renesas,sdhi-r8a7790"; |
8c9b1aa4 | 694 | reg = <0 0xee140000 0 0x100>; |
3abb4d5f | 695 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 696 | clocks = <&cpg CPG_MOD 312>; |
badf8570 NS |
697 | dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, |
698 | <&dmac1 0xc1>, <&dmac1 0xc2>; | |
699 | dma-names = "tx", "rx", "tx", "rx"; | |
22f708b0 | 700 | max-frequency = <97500000>; |
36ee3c27 | 701 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 702 | resets = <&cpg 312>; |
8c9b1aa4 GL |
703 | status = "disabled"; |
704 | }; | |
705 | ||
b718aa44 | 706 | sdhi3: sd@ee160000 { |
df1d0584 | 707 | compatible = "renesas,sdhi-r8a7790"; |
8c9b1aa4 | 708 | reg = <0 0xee160000 0 0x100>; |
3abb4d5f | 709 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 710 | clocks = <&cpg CPG_MOD 311>; |
badf8570 NS |
711 | dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, |
712 | <&dmac1 0xd3>, <&dmac1 0xd4>; | |
713 | dma-names = "tx", "rx", "tx", "rx"; | |
22f708b0 | 714 | max-frequency = <97500000>; |
36ee3c27 | 715 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 716 | resets = <&cpg 311>; |
8c9b1aa4 GL |
717 | status = "disabled"; |
718 | }; | |
22a1f595 | 719 | |
597af20f | 720 | scifa0: serial@e6c40000 { |
a20dc9f2 GU |
721 | compatible = "renesas,scifa-r8a7790", |
722 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
597af20f | 723 | reg = <0 0xe6c40000 0 64>; |
3abb4d5f | 724 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 725 | clocks = <&cpg CPG_MOD 204>; |
6c6e12a1 | 726 | clock-names = "fck"; |
badf8570 NS |
727 | dmas = <&dmac0 0x21>, <&dmac0 0x22>, |
728 | <&dmac1 0x21>, <&dmac1 0x22>; | |
729 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 730 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 731 | resets = <&cpg 204>; |
597af20f LP |
732 | status = "disabled"; |
733 | }; | |
734 | ||
735 | scifa1: serial@e6c50000 { | |
a20dc9f2 GU |
736 | compatible = "renesas,scifa-r8a7790", |
737 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
597af20f | 738 | reg = <0 0xe6c50000 0 64>; |
3abb4d5f | 739 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 740 | clocks = <&cpg CPG_MOD 203>; |
6c6e12a1 | 741 | clock-names = "fck"; |
badf8570 NS |
742 | dmas = <&dmac0 0x25>, <&dmac0 0x26>, |
743 | <&dmac1 0x25>, <&dmac1 0x26>; | |
744 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 745 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 746 | resets = <&cpg 203>; |
597af20f LP |
747 | status = "disabled"; |
748 | }; | |
749 | ||
750 | scifa2: serial@e6c60000 { | |
a20dc9f2 GU |
751 | compatible = "renesas,scifa-r8a7790", |
752 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
597af20f | 753 | reg = <0 0xe6c60000 0 64>; |
3abb4d5f | 754 | interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 755 | clocks = <&cpg CPG_MOD 202>; |
6c6e12a1 | 756 | clock-names = "fck"; |
badf8570 NS |
757 | dmas = <&dmac0 0x27>, <&dmac0 0x28>, |
758 | <&dmac1 0x27>, <&dmac1 0x28>; | |
759 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 760 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 761 | resets = <&cpg 202>; |
597af20f LP |
762 | status = "disabled"; |
763 | }; | |
764 | ||
765 | scifb0: serial@e6c20000 { | |
a20dc9f2 GU |
766 | compatible = "renesas,scifb-r8a7790", |
767 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
f31fbe83 | 768 | reg = <0 0xe6c20000 0 0x100>; |
3abb4d5f | 769 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 770 | clocks = <&cpg CPG_MOD 206>; |
6c6e12a1 | 771 | clock-names = "fck"; |
badf8570 NS |
772 | dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, |
773 | <&dmac1 0x3d>, <&dmac1 0x3e>; | |
774 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 775 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 776 | resets = <&cpg 206>; |
597af20f LP |
777 | status = "disabled"; |
778 | }; | |
779 | ||
780 | scifb1: serial@e6c30000 { | |
a20dc9f2 GU |
781 | compatible = "renesas,scifb-r8a7790", |
782 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
f31fbe83 | 783 | reg = <0 0xe6c30000 0 0x100>; |
3abb4d5f | 784 | interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 785 | clocks = <&cpg CPG_MOD 207>; |
6c6e12a1 | 786 | clock-names = "fck"; |
badf8570 NS |
787 | dmas = <&dmac0 0x19>, <&dmac0 0x1a>, |
788 | <&dmac1 0x19>, <&dmac1 0x1a>; | |
789 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 790 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 791 | resets = <&cpg 207>; |
597af20f LP |
792 | status = "disabled"; |
793 | }; | |
794 | ||
795 | scifb2: serial@e6ce0000 { | |
a20dc9f2 GU |
796 | compatible = "renesas,scifb-r8a7790", |
797 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
f31fbe83 | 798 | reg = <0 0xe6ce0000 0 0x100>; |
3abb4d5f | 799 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 800 | clocks = <&cpg CPG_MOD 216>; |
6c6e12a1 | 801 | clock-names = "fck"; |
badf8570 NS |
802 | dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, |
803 | <&dmac1 0x1d>, <&dmac1 0x1e>; | |
804 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 805 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 806 | resets = <&cpg 216>; |
597af20f LP |
807 | status = "disabled"; |
808 | }; | |
809 | ||
810 | scif0: serial@e6e60000 { | |
a20dc9f2 GU |
811 | compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", |
812 | "renesas,scif"; | |
597af20f | 813 | reg = <0 0xe6e60000 0 64>; |
3abb4d5f | 814 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 815 | clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7790_CLK_ZS>, |
42af65e8 GU |
816 | <&scif_clk>; |
817 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
818 | dmas = <&dmac0 0x29>, <&dmac0 0x2a>, |
819 | <&dmac1 0x29>, <&dmac1 0x2a>; | |
820 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 821 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 822 | resets = <&cpg 721>; |
597af20f LP |
823 | status = "disabled"; |
824 | }; | |
825 | ||
826 | scif1: serial@e6e68000 { | |
a20dc9f2 GU |
827 | compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", |
828 | "renesas,scif"; | |
597af20f | 829 | reg = <0 0xe6e68000 0 64>; |
3abb4d5f | 830 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 831 | clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7790_CLK_ZS>, |
42af65e8 GU |
832 | <&scif_clk>; |
833 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
834 | dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, |
835 | <&dmac1 0x2d>, <&dmac1 0x2e>; | |
836 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 837 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 838 | resets = <&cpg 720>; |
597af20f LP |
839 | status = "disabled"; |
840 | }; | |
841 | ||
022869a2 GU |
842 | scif2: serial@e6e56000 { |
843 | compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", | |
844 | "renesas,scif"; | |
845 | reg = <0 0xe6e56000 0 64>; | |
846 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
5802c420 | 847 | clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A7790_CLK_ZS>, |
022869a2 GU |
848 | <&scif_clk>; |
849 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
850 | dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, |
851 | <&dmac1 0x2b>, <&dmac1 0x2c>; | |
852 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 853 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 854 | resets = <&cpg 310>; |
022869a2 GU |
855 | status = "disabled"; |
856 | }; | |
857 | ||
597af20f | 858 | hscif0: serial@e62c0000 { |
a20dc9f2 GU |
859 | compatible = "renesas,hscif-r8a7790", |
860 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
597af20f | 861 | reg = <0 0xe62c0000 0 96>; |
3abb4d5f | 862 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 863 | clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7790_CLK_ZS>, |
42af65e8 GU |
864 | <&scif_clk>; |
865 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
866 | dmas = <&dmac0 0x39>, <&dmac0 0x3a>, |
867 | <&dmac1 0x39>, <&dmac1 0x3a>; | |
868 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 869 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 870 | resets = <&cpg 717>; |
597af20f LP |
871 | status = "disabled"; |
872 | }; | |
873 | ||
874 | hscif1: serial@e62c8000 { | |
a20dc9f2 GU |
875 | compatible = "renesas,hscif-r8a7790", |
876 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
597af20f | 877 | reg = <0 0xe62c8000 0 96>; |
3abb4d5f | 878 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 879 | clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7790_CLK_ZS>, |
42af65e8 GU |
880 | <&scif_clk>; |
881 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
882 | dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, |
883 | <&dmac1 0x4d>, <&dmac1 0x4e>; | |
884 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 885 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 886 | resets = <&cpg 716>; |
597af20f LP |
887 | status = "disabled"; |
888 | }; | |
889 | ||
c90715a3 GU |
890 | icram0: sram@e63a0000 { |
891 | compatible = "mmio-sram"; | |
892 | reg = <0 0xe63a0000 0 0x12000>; | |
893 | }; | |
894 | ||
895 | icram1: sram@e63c0000 { | |
896 | compatible = "mmio-sram"; | |
897 | reg = <0 0xe63c0000 0 0x1000>; | |
e6693869 GU |
898 | #address-cells = <1>; |
899 | #size-cells = <1>; | |
900 | ranges = <0 0 0xe63c0000 0x1000>; | |
901 | ||
902 | smp-sram@0 { | |
903 | compatible = "renesas,smp-sram"; | |
904 | reg = <0 0x10>; | |
905 | }; | |
c90715a3 GU |
906 | }; |
907 | ||
d8913c67 SS |
908 | ether: ethernet@ee700000 { |
909 | compatible = "renesas,ether-r8a7790"; | |
910 | reg = <0 0xee700000 0 0x400>; | |
3abb4d5f | 911 | interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 912 | clocks = <&cpg CPG_MOD 813>; |
36ee3c27 | 913 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 914 | resets = <&cpg 813>; |
d8913c67 SS |
915 | phy-mode = "rmii"; |
916 | #address-cells = <1>; | |
917 | #size-cells = <0>; | |
918 | status = "disabled"; | |
919 | }; | |
920 | ||
f25d6b97 | 921 | avb: ethernet@e6800000 { |
d92df7e5 SH |
922 | compatible = "renesas,etheravb-r8a7790", |
923 | "renesas,etheravb-rcar-gen2"; | |
f25d6b97 | 924 | reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; |
3abb4d5f | 925 | interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 926 | clocks = <&cpg CPG_MOD 812>; |
36ee3c27 | 927 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 928 | resets = <&cpg 812>; |
f25d6b97 SS |
929 | #address-cells = <1>; |
930 | #size-cells = <0>; | |
931 | status = "disabled"; | |
932 | }; | |
933 | ||
cde630f7 | 934 | sata0: sata@ee300000 { |
faa63e83 | 935 | compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata"; |
cde630f7 | 936 | reg = <0 0xee300000 0 0x2000>; |
3abb4d5f | 937 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 938 | clocks = <&cpg CPG_MOD 815>; |
36ee3c27 | 939 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 940 | resets = <&cpg 815>; |
cde630f7 VB |
941 | status = "disabled"; |
942 | }; | |
943 | ||
944 | sata1: sata@ee500000 { | |
faa63e83 | 945 | compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata"; |
cde630f7 | 946 | reg = <0 0xee500000 0 0x2000>; |
3abb4d5f | 947 | interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 948 | clocks = <&cpg CPG_MOD 814>; |
36ee3c27 | 949 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 950 | resets = <&cpg 814>; |
cde630f7 VB |
951 | status = "disabled"; |
952 | }; | |
953 | ||
ae0a555b | 954 | hsusb: usb@e6590000 { |
d87ec94a | 955 | compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs"; |
ae0a555b | 956 | reg = <0 0xe6590000 0 0x100>; |
3abb4d5f | 957 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 958 | clocks = <&cpg CPG_MOD 704>; |
e8295dc3 YS |
959 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, |
960 | <&usb_dmac1 0>, <&usb_dmac1 1>; | |
961 | dma-names = "ch0", "ch1", "ch2", "ch3"; | |
36ee3c27 | 962 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 963 | resets = <&cpg 704>; |
484adb00 GU |
964 | renesas,buswait = <4>; |
965 | phys = <&usb0 1>; | |
966 | phy-names = "usb"; | |
ae0a555b YS |
967 | status = "disabled"; |
968 | }; | |
969 | ||
e089f657 | 970 | usbphy: usb-phy@e6590100 { |
3b0922c5 SH |
971 | compatible = "renesas,usb-phy-r8a7790", |
972 | "renesas,rcar-gen2-usb-phy"; | |
e089f657 SS |
973 | reg = <0 0xe6590100 0 0x100>; |
974 | #address-cells = <1>; | |
975 | #size-cells = <0>; | |
5802c420 | 976 | clocks = <&cpg CPG_MOD 704>; |
e089f657 | 977 | clock-names = "usbhs"; |
36ee3c27 | 978 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 979 | resets = <&cpg 704>; |
e089f657 SS |
980 | status = "disabled"; |
981 | ||
982 | usb0: usb-channel@0 { | |
983 | reg = <0>; | |
984 | #phy-cells = <1>; | |
985 | }; | |
986 | usb2: usb-channel@2 { | |
987 | reg = <2>; | |
988 | #phy-cells = <1>; | |
989 | }; | |
990 | }; | |
991 | ||
9f685bfc | 992 | vin0: video@e6ef0000 { |
a94b9e56 | 993 | compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin"; |
9f685bfc | 994 | reg = <0 0xe6ef0000 0 0x1000>; |
3abb4d5f | 995 | interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 996 | clocks = <&cpg CPG_MOD 811>; |
36ee3c27 | 997 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 998 | resets = <&cpg 811>; |
9f685bfc BD |
999 | status = "disabled"; |
1000 | }; | |
1001 | ||
1002 | vin1: video@e6ef1000 { | |
a94b9e56 | 1003 | compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin"; |
9f685bfc | 1004 | reg = <0 0xe6ef1000 0 0x1000>; |
3abb4d5f | 1005 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1006 | clocks = <&cpg CPG_MOD 810>; |
36ee3c27 | 1007 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1008 | resets = <&cpg 810>; |
9f685bfc BD |
1009 | status = "disabled"; |
1010 | }; | |
1011 | ||
1012 | vin2: video@e6ef2000 { | |
a94b9e56 | 1013 | compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin"; |
9f685bfc | 1014 | reg = <0 0xe6ef2000 0 0x1000>; |
3abb4d5f | 1015 | interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1016 | clocks = <&cpg CPG_MOD 809>; |
36ee3c27 | 1017 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1018 | resets = <&cpg 809>; |
9f685bfc BD |
1019 | status = "disabled"; |
1020 | }; | |
1021 | ||
1022 | vin3: video@e6ef3000 { | |
a94b9e56 | 1023 | compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin"; |
9f685bfc | 1024 | reg = <0 0xe6ef3000 0 0x1000>; |
3abb4d5f | 1025 | interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1026 | clocks = <&cpg CPG_MOD 808>; |
36ee3c27 | 1027 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1028 | resets = <&cpg 808>; |
9f685bfc BD |
1029 | status = "disabled"; |
1030 | }; | |
1031 | ||
9f77b480 | 1032 | vsp@fe920000 { |
3ac6a83c LP |
1033 | compatible = "renesas,vsp1"; |
1034 | reg = <0 0xfe920000 0 0x8000>; | |
3abb4d5f | 1035 | interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1036 | clocks = <&cpg CPG_MOD 130>; |
36ee3c27 | 1037 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1038 | resets = <&cpg 130>; |
3ac6a83c LP |
1039 | }; |
1040 | ||
9f77b480 | 1041 | vsp@fe928000 { |
3ac6a83c LP |
1042 | compatible = "renesas,vsp1"; |
1043 | reg = <0 0xfe928000 0 0x8000>; | |
3abb4d5f | 1044 | interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1045 | clocks = <&cpg CPG_MOD 131>; |
36ee3c27 | 1046 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1047 | resets = <&cpg 131>; |
3ac6a83c LP |
1048 | }; |
1049 | ||
9f77b480 | 1050 | vsp@fe930000 { |
3ac6a83c LP |
1051 | compatible = "renesas,vsp1"; |
1052 | reg = <0 0xfe930000 0 0x8000>; | |
3abb4d5f | 1053 | interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1054 | clocks = <&cpg CPG_MOD 128>; |
36ee3c27 | 1055 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1056 | resets = <&cpg 128>; |
3ac6a83c LP |
1057 | }; |
1058 | ||
9f77b480 | 1059 | vsp@fe938000 { |
3ac6a83c LP |
1060 | compatible = "renesas,vsp1"; |
1061 | reg = <0 0xfe938000 0 0x8000>; | |
3abb4d5f | 1062 | interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1063 | clocks = <&cpg CPG_MOD 127>; |
36ee3c27 | 1064 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1065 | resets = <&cpg 127>; |
3ac6a83c LP |
1066 | }; |
1067 | ||
1068 | du: display@feb00000 { | |
1069 | compatible = "renesas,du-r8a7790"; | |
1070 | reg = <0 0xfeb00000 0 0x70000>, | |
1071 | <0 0xfeb90000 0 0x1c>, | |
1072 | <0 0xfeb94000 0 0x1c>; | |
1073 | reg-names = "du", "lvds.0", "lvds.1"; | |
3abb4d5f SH |
1074 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, |
1075 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, | |
1076 | <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; | |
5802c420 GU |
1077 | clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, |
1078 | <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>, | |
1079 | <&cpg CPG_MOD 725>; | |
3ac6a83c LP |
1080 | clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1"; |
1081 | status = "disabled"; | |
1082 | ||
1083 | ports { | |
1084 | #address-cells = <1>; | |
1085 | #size-cells = <0>; | |
1086 | ||
1087 | port@0 { | |
1088 | reg = <0>; | |
1089 | du_out_rgb: endpoint { | |
1090 | }; | |
1091 | }; | |
1092 | port@1 { | |
1093 | reg = <1>; | |
1094 | du_out_lvds0: endpoint { | |
1095 | }; | |
1096 | }; | |
1097 | port@2 { | |
1098 | reg = <2>; | |
1099 | du_out_lvds1: endpoint { | |
1100 | }; | |
1101 | }; | |
1102 | }; | |
1103 | }; | |
1104 | ||
6a7742b4 | 1105 | can0: can@e6e80000 { |
28e941de | 1106 | compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can"; |
6a7742b4 | 1107 | reg = <0 0xe6e80000 0 0x1000>; |
3abb4d5f | 1108 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 GU |
1109 | clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7790_CLK_RCAN>, |
1110 | <&can_clk>; | |
6a7742b4 | 1111 | clock-names = "clkp1", "clkp2", "can_clk"; |
36ee3c27 | 1112 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1113 | resets = <&cpg 916>; |
6a7742b4 SS |
1114 | status = "disabled"; |
1115 | }; | |
1116 | ||
1117 | can1: can@e6e88000 { | |
28e941de | 1118 | compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can"; |
6a7742b4 | 1119 | reg = <0 0xe6e88000 0 0x1000>; |
3abb4d5f | 1120 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 GU |
1121 | clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7790_CLK_RCAN>, |
1122 | <&can_clk>; | |
6a7742b4 | 1123 | clock-names = "clkp1", "clkp2", "can_clk"; |
36ee3c27 | 1124 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1125 | resets = <&cpg 915>; |
6a7742b4 SS |
1126 | status = "disabled"; |
1127 | }; | |
1128 | ||
fb847575 | 1129 | jpu: jpeg-codec@fe980000 { |
1c4b68fd | 1130 | compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu"; |
fb847575 | 1131 | reg = <0 0xfe980000 0 0x10300>; |
3abb4d5f | 1132 | interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1133 | clocks = <&cpg CPG_MOD 106>; |
36ee3c27 | 1134 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1135 | resets = <&cpg 106>; |
fb847575 MU |
1136 | }; |
1137 | ||
80e1a5f3 GU |
1138 | /* External root clock */ |
1139 | extal_clk: extal { | |
1140 | compatible = "fixed-clock"; | |
1141 | #clock-cells = <0>; | |
1142 | /* This value must be overridden by the board. */ | |
1143 | clock-frequency = <0>; | |
1144 | }; | |
1145 | ||
1146 | /* External PCIe clock - can be overridden by the board */ | |
1147 | pcie_bus_clk: pcie_bus { | |
1148 | compatible = "fixed-clock"; | |
1149 | #clock-cells = <0>; | |
1150 | clock-frequency = <0>; | |
1151 | }; | |
1152 | ||
1153 | /* | |
1154 | * The external audio clocks are configured as 0 Hz fixed frequency | |
1155 | * clocks by default. | |
1156 | * Boards that provide audio clocks should override them. | |
1157 | */ | |
1158 | audio_clk_a: audio_clk_a { | |
1159 | compatible = "fixed-clock"; | |
1160 | #clock-cells = <0>; | |
1161 | clock-frequency = <0>; | |
1162 | }; | |
1163 | audio_clk_b: audio_clk_b { | |
1164 | compatible = "fixed-clock"; | |
1165 | #clock-cells = <0>; | |
1166 | clock-frequency = <0>; | |
1167 | }; | |
1168 | audio_clk_c: audio_clk_c { | |
1169 | compatible = "fixed-clock"; | |
1170 | #clock-cells = <0>; | |
1171 | clock-frequency = <0>; | |
1172 | }; | |
1173 | ||
1174 | /* External SCIF clock */ | |
1175 | scif_clk: scif { | |
1176 | compatible = "fixed-clock"; | |
1177 | #clock-cells = <0>; | |
1178 | /* This value must be overridden by the board. */ | |
1179 | clock-frequency = <0>; | |
1180 | }; | |
1181 | ||
1182 | /* External USB clock - can be overridden by the board */ | |
1183 | usb_extal_clk: usb_extal { | |
1184 | compatible = "fixed-clock"; | |
1185 | #clock-cells = <0>; | |
1186 | clock-frequency = <48000000>; | |
1187 | }; | |
1188 | ||
1189 | /* External CAN clock */ | |
1190 | can_clk: can { | |
1191 | compatible = "fixed-clock"; | |
1192 | #clock-cells = <0>; | |
1193 | /* This value must be overridden by the board. */ | |
1194 | clock-frequency = <0>; | |
1195 | }; | |
1196 | ||
1197 | cpg: clock-controller@e6150000 { | |
1198 | compatible = "renesas,r8a7790-cpg-mssr"; | |
1199 | reg = <0 0xe6150000 0 0x1000>; | |
1200 | clocks = <&extal_clk>, <&usb_extal_clk>; | |
1201 | clock-names = "extal", "usb_extal"; | |
1202 | #clock-cells = <2>; | |
1203 | #power-domain-cells = <0>; | |
098f5305 | 1204 | #reset-cells = <1>; |
22a1f595 | 1205 | }; |
7053e134 | 1206 | |
328f39b8 GU |
1207 | prr: chipid@ff000044 { |
1208 | compatible = "renesas,prr"; | |
1209 | reg = <0 0xff000044 0 4>; | |
1210 | }; | |
1211 | ||
dd2b267b GU |
1212 | rst: reset-controller@e6160000 { |
1213 | compatible = "renesas,r8a7790-rst"; | |
1214 | reg = <0 0xe6160000 0 0x0100>; | |
1215 | }; | |
1216 | ||
4c8eb3c8 GU |
1217 | sysc: system-controller@e6180000 { |
1218 | compatible = "renesas,r8a7790-sysc"; | |
1219 | reg = <0 0xe6180000 0 0x0200>; | |
1220 | #power-domain-cells = <1>; | |
1221 | }; | |
1222 | ||
fad6d45c | 1223 | qspi: spi@e6b10000 { |
7053e134 GU |
1224 | compatible = "renesas,qspi-r8a7790", "renesas,qspi"; |
1225 | reg = <0 0xe6b10000 0 0x2c>; | |
3abb4d5f | 1226 | interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1227 | clocks = <&cpg CPG_MOD 917>; |
badf8570 NS |
1228 | dmas = <&dmac0 0x17>, <&dmac0 0x18>, |
1229 | <&dmac1 0x17>, <&dmac1 0x18>; | |
1230 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1231 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1232 | resets = <&cpg 917>; |
7053e134 GU |
1233 | num-cs = <1>; |
1234 | #address-cells = <1>; | |
1235 | #size-cells = <0>; | |
1236 | status = "disabled"; | |
1237 | }; | |
ae8a6146 GU |
1238 | |
1239 | msiof0: spi@e6e20000 { | |
654450ba SH |
1240 | compatible = "renesas,msiof-r8a7790", |
1241 | "renesas,rcar-gen2-msiof"; | |
c7d1f08a | 1242 | reg = <0 0xe6e20000 0 0x0064>; |
3abb4d5f | 1243 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1244 | clocks = <&cpg CPG_MOD 0>; |
badf8570 NS |
1245 | dmas = <&dmac0 0x51>, <&dmac0 0x52>, |
1246 | <&dmac1 0x51>, <&dmac1 0x52>; | |
1247 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1248 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1249 | resets = <&cpg 0>; |
ae8a6146 GU |
1250 | #address-cells = <1>; |
1251 | #size-cells = <0>; | |
1252 | status = "disabled"; | |
1253 | }; | |
1254 | ||
1255 | msiof1: spi@e6e10000 { | |
654450ba SH |
1256 | compatible = "renesas,msiof-r8a7790", |
1257 | "renesas,rcar-gen2-msiof"; | |
c7d1f08a | 1258 | reg = <0 0xe6e10000 0 0x0064>; |
3abb4d5f | 1259 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1260 | clocks = <&cpg CPG_MOD 208>; |
badf8570 NS |
1261 | dmas = <&dmac0 0x55>, <&dmac0 0x56>, |
1262 | <&dmac1 0x55>, <&dmac1 0x56>; | |
1263 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1264 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1265 | resets = <&cpg 208>; |
ae8a6146 GU |
1266 | #address-cells = <1>; |
1267 | #size-cells = <0>; | |
1268 | status = "disabled"; | |
1269 | }; | |
1270 | ||
1271 | msiof2: spi@e6e00000 { | |
654450ba SH |
1272 | compatible = "renesas,msiof-r8a7790", |
1273 | "renesas,rcar-gen2-msiof"; | |
c7d1f08a | 1274 | reg = <0 0xe6e00000 0 0x0064>; |
3abb4d5f | 1275 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1276 | clocks = <&cpg CPG_MOD 205>; |
badf8570 NS |
1277 | dmas = <&dmac0 0x41>, <&dmac0 0x42>, |
1278 | <&dmac1 0x41>, <&dmac1 0x42>; | |
1279 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1280 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1281 | resets = <&cpg 205>; |
ae8a6146 GU |
1282 | #address-cells = <1>; |
1283 | #size-cells = <0>; | |
1284 | status = "disabled"; | |
1285 | }; | |
1286 | ||
1287 | msiof3: spi@e6c90000 { | |
654450ba SH |
1288 | compatible = "renesas,msiof-r8a7790", |
1289 | "renesas,rcar-gen2-msiof"; | |
c7d1f08a | 1290 | reg = <0 0xe6c90000 0 0x0064>; |
3abb4d5f | 1291 | interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1292 | clocks = <&cpg CPG_MOD 215>; |
badf8570 NS |
1293 | dmas = <&dmac0 0x45>, <&dmac0 0x46>, |
1294 | <&dmac1 0x45>, <&dmac1 0x46>; | |
1295 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1296 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1297 | resets = <&cpg 215>; |
ae8a6146 GU |
1298 | #address-cells = <1>; |
1299 | #size-cells = <0>; | |
1300 | status = "disabled"; | |
1301 | }; | |
7df2fd57 | 1302 | |
157fcd8a | 1303 | xhci: usb@ee000000 { |
92cc7798 | 1304 | compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci"; |
157fcd8a | 1305 | reg = <0 0xee000000 0 0xc00>; |
3abb4d5f | 1306 | interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1307 | clocks = <&cpg CPG_MOD 328>; |
36ee3c27 | 1308 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1309 | resets = <&cpg 328>; |
157fcd8a YS |
1310 | phys = <&usb2 1>; |
1311 | phy-names = "usb"; | |
1312 | status = "disabled"; | |
1313 | }; | |
1314 | ||
ff4f3eb8 | 1315 | pci0: pci@ee090000 { |
2d82c144 | 1316 | compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; |
ff4f3eb8 | 1317 | device_type = "pci"; |
ff4f3eb8 BD |
1318 | reg = <0 0xee090000 0 0xc00>, |
1319 | <0 0xee080000 0 0x1100>; | |
3abb4d5f | 1320 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1321 | clocks = <&cpg CPG_MOD 703>; |
36ee3c27 | 1322 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1323 | resets = <&cpg 703>; |
ff4f3eb8 BD |
1324 | status = "disabled"; |
1325 | ||
1326 | bus-range = <0 0>; | |
1327 | #address-cells = <3>; | |
1328 | #size-cells = <2>; | |
1329 | #interrupt-cells = <1>; | |
1330 | ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; | |
1331 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
3abb4d5f SH |
1332 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH |
1333 | 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH | |
1334 | 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
538c40e5 | 1335 | |
f7d569c1 | 1336 | usb@1,0 { |
538c40e5 | 1337 | reg = <0x800 0 0 0 0>; |
538c40e5 SS |
1338 | phys = <&usb0 0>; |
1339 | phy-names = "usb"; | |
1340 | }; | |
1341 | ||
f7d569c1 | 1342 | usb@2,0 { |
538c40e5 | 1343 | reg = <0x1000 0 0 0 0>; |
538c40e5 SS |
1344 | phys = <&usb0 0>; |
1345 | phy-names = "usb"; | |
1346 | }; | |
ff4f3eb8 BD |
1347 | }; |
1348 | ||
1349 | pci1: pci@ee0b0000 { | |
2d82c144 | 1350 | compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; |
ff4f3eb8 | 1351 | device_type = "pci"; |
ff4f3eb8 BD |
1352 | reg = <0 0xee0b0000 0 0xc00>, |
1353 | <0 0xee0a0000 0 0x1100>; | |
3abb4d5f | 1354 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1355 | clocks = <&cpg CPG_MOD 703>; |
36ee3c27 | 1356 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1357 | resets = <&cpg 703>; |
ff4f3eb8 BD |
1358 | status = "disabled"; |
1359 | ||
1360 | bus-range = <1 1>; | |
1361 | #address-cells = <3>; | |
1362 | #size-cells = <2>; | |
1363 | #interrupt-cells = <1>; | |
1364 | ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>; | |
1365 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
3abb4d5f SH |
1366 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH |
1367 | 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH | |
1368 | 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; | |
ff4f3eb8 BD |
1369 | }; |
1370 | ||
1371 | pci2: pci@ee0d0000 { | |
2d82c144 | 1372 | compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; |
ff4f3eb8 | 1373 | device_type = "pci"; |
5802c420 | 1374 | clocks = <&cpg CPG_MOD 703>; |
36ee3c27 | 1375 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1376 | resets = <&cpg 703>; |
ff4f3eb8 BD |
1377 | reg = <0 0xee0d0000 0 0xc00>, |
1378 | <0 0xee0c0000 0 0x1100>; | |
3abb4d5f | 1379 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; |
ff4f3eb8 BD |
1380 | status = "disabled"; |
1381 | ||
1382 | bus-range = <2 2>; | |
1383 | #address-cells = <3>; | |
1384 | #size-cells = <2>; | |
1385 | #interrupt-cells = <1>; | |
1386 | ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; | |
1387 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
3abb4d5f SH |
1388 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH |
1389 | 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH | |
1390 | 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; | |
538c40e5 | 1391 | |
f7d569c1 RH |
1392 | usb@1,0 { |
1393 | reg = <0x20800 0 0 0 0>; | |
538c40e5 SS |
1394 | phys = <&usb2 0>; |
1395 | phy-names = "usb"; | |
1396 | }; | |
1397 | ||
f7d569c1 RH |
1398 | usb@2,0 { |
1399 | reg = <0x21000 0 0 0 0>; | |
538c40e5 SS |
1400 | phys = <&usb2 0>; |
1401 | phy-names = "usb"; | |
1402 | }; | |
ff4f3eb8 BD |
1403 | }; |
1404 | ||
745329d2 | 1405 | pciec: pcie@fe000000 { |
e670be8d | 1406 | compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2"; |
745329d2 PE |
1407 | reg = <0 0xfe000000 0 0x80000>; |
1408 | #address-cells = <3>; | |
1409 | #size-cells = <2>; | |
1410 | bus-range = <0x00 0xff>; | |
1411 | device_type = "pci"; | |
1412 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 | |
1413 | 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 | |
1414 | 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 | |
1415 | 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; | |
1416 | /* Map all possible DDR as inbound ranges */ | |
1417 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 | |
1418 | 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>; | |
3abb4d5f SH |
1419 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, |
1420 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, | |
1421 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; | |
745329d2 PE |
1422 | #interrupt-cells = <1>; |
1423 | interrupt-map-mask = <0 0 0 0>; | |
3abb4d5f | 1424 | interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; |
5802c420 | 1425 | clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; |
745329d2 | 1426 | clock-names = "pcie", "pcie_bus"; |
36ee3c27 | 1427 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 | 1428 | resets = <&cpg 319>; |
745329d2 PE |
1429 | status = "disabled"; |
1430 | }; | |
1431 | ||
b694e380 | 1432 | rcar_sound: sound@ec500000 { |
ad63241c KM |
1433 | /* |
1434 | * #sound-dai-cells is required | |
1435 | * | |
1436 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
1437 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
1438 | */ | |
31078ecd | 1439 | compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2"; |
7df2fd57 KM |
1440 | reg = <0 0xec500000 0 0x1000>, /* SCU */ |
1441 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
1442 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
4bc4a205 | 1443 | <0 0xec541000 0 0x280>, /* SSI */ |
0c602677 KM |
1444 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ |
1445 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
46a158f2 | 1446 | |
5802c420 GU |
1447 | clocks = <&cpg CPG_MOD 1005>, |
1448 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, | |
1449 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, | |
1450 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, | |
1451 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, | |
1452 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, | |
1453 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, | |
1454 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, | |
1455 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, | |
1456 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, | |
1457 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, | |
1458 | <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, | |
1459 | <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, | |
1460 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, | |
1461 | <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, | |
1462 | <&cpg CPG_CORE R8A7790_CLK_M2>; | |
7df2fd57 KM |
1463 | clock-names = "ssi-all", |
1464 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", | |
1465 | "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", | |
1466 | "src.9", "src.8", "src.7", "src.6", "src.5", | |
1467 | "src.4", "src.3", "src.2", "src.1", "src.0", | |
a7163784 | 1468 | "ctu.0", "ctu.1", |
fc67bf42 | 1469 | "mix.0", "mix.1", |
334d69a2 | 1470 | "dvc.0", "dvc.1", |
7df2fd57 | 1471 | "clk_a", "clk_b", "clk_c", "clk_i"; |
36ee3c27 | 1472 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
34fbd2b1 GU |
1473 | resets = <&cpg 1005>, |
1474 | <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>, | |
1475 | <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>, | |
1476 | <&cpg 1014>, <&cpg 1015>; | |
1477 | reset-names = "ssi-all", | |
1478 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", | |
1479 | "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0"; | |
7df2fd57 KM |
1480 | |
1481 | status = "disabled"; | |
1482 | ||
334d69a2 | 1483 | rcar_sound,dvc { |
2c3de367 | 1484 | dvc0: dvc-0 { |
c4a59df9 | 1485 | dmas = <&audma1 0xbc>; |
118a5093 KM |
1486 | dma-names = "tx"; |
1487 | }; | |
2c3de367 | 1488 | dvc1: dvc-1 { |
c4a59df9 | 1489 | dmas = <&audma1 0xbe>; |
118a5093 KM |
1490 | dma-names = "tx"; |
1491 | }; | |
334d69a2 KM |
1492 | }; |
1493 | ||
fc67bf42 | 1494 | rcar_sound,mix { |
2c3de367 GU |
1495 | mix0: mix-0 { }; |
1496 | mix1: mix-1 { }; | |
fc67bf42 KM |
1497 | }; |
1498 | ||
a7163784 | 1499 | rcar_sound,ctu { |
2c3de367 GU |
1500 | ctu00: ctu-0 { }; |
1501 | ctu01: ctu-1 { }; | |
1502 | ctu02: ctu-2 { }; | |
1503 | ctu03: ctu-3 { }; | |
1504 | ctu10: ctu-4 { }; | |
1505 | ctu11: ctu-5 { }; | |
1506 | ctu12: ctu-6 { }; | |
1507 | ctu13: ctu-7 { }; | |
a7163784 KM |
1508 | }; |
1509 | ||
7df2fd57 | 1510 | rcar_sound,src { |
2c3de367 | 1511 | src0: src-0 { |
3abb4d5f | 1512 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1513 | dmas = <&audma0 0x85>, <&audma1 0x9a>; |
1514 | dma-names = "rx", "tx"; | |
1515 | }; | |
2c3de367 | 1516 | src1: src-1 { |
3abb4d5f | 1517 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1518 | dmas = <&audma0 0x87>, <&audma1 0x9c>; |
1519 | dma-names = "rx", "tx"; | |
1520 | }; | |
2c3de367 | 1521 | src2: src-2 { |
3abb4d5f | 1522 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1523 | dmas = <&audma0 0x89>, <&audma1 0x9e>; |
1524 | dma-names = "rx", "tx"; | |
1525 | }; | |
2c3de367 | 1526 | src3: src-3 { |
3abb4d5f | 1527 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1528 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; |
1529 | dma-names = "rx", "tx"; | |
1530 | }; | |
2c3de367 | 1531 | src4: src-4 { |
3abb4d5f | 1532 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1533 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; |
1534 | dma-names = "rx", "tx"; | |
1535 | }; | |
2c3de367 | 1536 | src5: src-5 { |
3abb4d5f | 1537 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1538 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; |
1539 | dma-names = "rx", "tx"; | |
1540 | }; | |
2c3de367 | 1541 | src6: src-6 { |
3abb4d5f | 1542 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1543 | dmas = <&audma0 0x91>, <&audma1 0xb4>; |
1544 | dma-names = "rx", "tx"; | |
1545 | }; | |
2c3de367 | 1546 | src7: src-7 { |
3abb4d5f | 1547 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1548 | dmas = <&audma0 0x93>, <&audma1 0xb6>; |
1549 | dma-names = "rx", "tx"; | |
1550 | }; | |
2c3de367 | 1551 | src8: src-8 { |
3abb4d5f | 1552 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1553 | dmas = <&audma0 0x95>, <&audma1 0xb8>; |
1554 | dma-names = "rx", "tx"; | |
1555 | }; | |
2c3de367 | 1556 | src9: src-9 { |
3abb4d5f | 1557 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1558 | dmas = <&audma0 0x97>, <&audma1 0xba>; |
1559 | dma-names = "rx", "tx"; | |
1560 | }; | |
7df2fd57 KM |
1561 | }; |
1562 | ||
1563 | rcar_sound,ssi { | |
2c3de367 | 1564 | ssi0: ssi-0 { |
3abb4d5f | 1565 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1566 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
1567 | dma-names = "rx", "tx", "rxu", "txu"; | |
1568 | }; | |
2c3de367 | 1569 | ssi1: ssi-1 { |
3abb4d5f | 1570 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1571 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
1572 | dma-names = "rx", "tx", "rxu", "txu"; | |
1573 | }; | |
2c3de367 | 1574 | ssi2: ssi-2 { |
3abb4d5f | 1575 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1576 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
1577 | dma-names = "rx", "tx", "rxu", "txu"; | |
1578 | }; | |
2c3de367 | 1579 | ssi3: ssi-3 { |
3abb4d5f | 1580 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1581 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
1582 | dma-names = "rx", "tx", "rxu", "txu"; | |
1583 | }; | |
2c3de367 | 1584 | ssi4: ssi-4 { |
3abb4d5f | 1585 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1586 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
1587 | dma-names = "rx", "tx", "rxu", "txu"; | |
1588 | }; | |
2c3de367 | 1589 | ssi5: ssi-5 { |
3abb4d5f | 1590 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1591 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
1592 | dma-names = "rx", "tx", "rxu", "txu"; | |
1593 | }; | |
2c3de367 | 1594 | ssi6: ssi-6 { |
3abb4d5f | 1595 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1596 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
1597 | dma-names = "rx", "tx", "rxu", "txu"; | |
1598 | }; | |
2c3de367 | 1599 | ssi7: ssi-7 { |
3abb4d5f | 1600 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1601 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
1602 | dma-names = "rx", "tx", "rxu", "txu"; | |
1603 | }; | |
2c3de367 | 1604 | ssi8: ssi-8 { |
3abb4d5f | 1605 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1606 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
1607 | dma-names = "rx", "tx", "rxu", "txu"; | |
1608 | }; | |
2c3de367 | 1609 | ssi9: ssi-9 { |
3abb4d5f | 1610 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1611 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
1612 | dma-names = "rx", "tx", "rxu", "txu"; | |
1613 | }; | |
7df2fd57 KM |
1614 | }; |
1615 | }; | |
70496727 LP |
1616 | |
1617 | ipmmu_sy0: mmu@e6280000 { | |
c8d6686e | 1618 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1619 | reg = <0 0xe6280000 0 0x1000>; |
3abb4d5f SH |
1620 | interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, |
1621 | <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; | |
70496727 LP |
1622 | #iommu-cells = <1>; |
1623 | status = "disabled"; | |
1624 | }; | |
1625 | ||
1626 | ipmmu_sy1: mmu@e6290000 { | |
c8d6686e | 1627 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1628 | reg = <0 0xe6290000 0 0x1000>; |
3abb4d5f | 1629 | interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; |
70496727 LP |
1630 | #iommu-cells = <1>; |
1631 | status = "disabled"; | |
1632 | }; | |
1633 | ||
1634 | ipmmu_ds: mmu@e6740000 { | |
c8d6686e | 1635 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1636 | reg = <0 0xe6740000 0 0x1000>; |
3abb4d5f SH |
1637 | interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, |
1638 | <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; | |
70496727 LP |
1639 | #iommu-cells = <1>; |
1640 | status = "disabled"; | |
1641 | }; | |
1642 | ||
1643 | ipmmu_mp: mmu@ec680000 { | |
c8d6686e | 1644 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1645 | reg = <0 0xec680000 0 0x1000>; |
3abb4d5f | 1646 | interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; |
70496727 LP |
1647 | #iommu-cells = <1>; |
1648 | status = "disabled"; | |
1649 | }; | |
1650 | ||
1651 | ipmmu_mx: mmu@fe951000 { | |
c8d6686e | 1652 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1653 | reg = <0 0xfe951000 0 0x1000>; |
3abb4d5f SH |
1654 | interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, |
1655 | <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; | |
70496727 LP |
1656 | #iommu-cells = <1>; |
1657 | status = "disabled"; | |
1658 | }; | |
1659 | ||
1660 | ipmmu_rt: mmu@ffc80000 { | |
c8d6686e | 1661 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1662 | reg = <0 0xffc80000 0 0x1000>; |
3abb4d5f | 1663 | interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; |
70496727 LP |
1664 | #iommu-cells = <1>; |
1665 | status = "disabled"; | |
1666 | }; | |
0468b2d6 | 1667 | }; |