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Commit | Line | Data |
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0468b2d6 MD |
1 | /* |
2 | * Device Tree Source for the r8a7790 SoC | |
3 | * | |
4 | * Copyright (C) 2013 Renesas Solutions Corp. | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
0468b2d6 MD |
11 | / { |
12 | compatible = "renesas,r8a7790"; | |
13 | interrupt-parent = <&gic>; | |
8585deb1 TY |
14 | #address-cells = <2>; |
15 | #size-cells = <2>; | |
0468b2d6 MD |
16 | |
17 | cpus { | |
18 | #address-cells = <1>; | |
19 | #size-cells = <0>; | |
20 | ||
21 | cpu0: cpu@0 { | |
22 | device_type = "cpu"; | |
23 | compatible = "arm,cortex-a15"; | |
24 | reg = <0>; | |
25 | clock-frequency = <1300000000>; | |
26 | }; | |
27 | }; | |
28 | ||
29 | gic: interrupt-controller@f1001000 { | |
30 | compatible = "arm,cortex-a15-gic"; | |
31 | #interrupt-cells = <3>; | |
32 | #address-cells = <0>; | |
33 | interrupt-controller; | |
8585deb1 TY |
34 | reg = <0 0xf1001000 0 0x1000>, |
35 | <0 0xf1002000 0 0x1000>, | |
36 | <0 0xf1004000 0 0x2000>, | |
37 | <0 0xf1006000 0 0x2000>; | |
0468b2d6 | 38 | interrupts = <1 9 0xf04>; |
0468b2d6 MD |
39 | }; |
40 | ||
f98e10c8 LP |
41 | gpio0: gpio@ffc40000 { |
42 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; | |
43 | reg = <0 0xffc40000 0 0x2c>; | |
44 | interrupt-parent = <&gic>; | |
45 | interrupts = <0 4 0x4>; | |
46 | #gpio-cells = <2>; | |
47 | gpio-controller; | |
48 | gpio-ranges = <&pfc 0 0 32>; | |
49 | #interrupt-cells = <2>; | |
50 | interrupt-controller; | |
51 | }; | |
52 | ||
53 | gpio1: gpio@ffc41000 { | |
54 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; | |
55 | reg = <0 0xffc41000 0 0x2c>; | |
56 | interrupt-parent = <&gic>; | |
57 | interrupts = <0 5 0x4>; | |
58 | #gpio-cells = <2>; | |
59 | gpio-controller; | |
60 | gpio-ranges = <&pfc 0 32 32>; | |
61 | #interrupt-cells = <2>; | |
62 | interrupt-controller; | |
63 | }; | |
64 | ||
65 | gpio2: gpio@ffc42000 { | |
66 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; | |
67 | reg = <0 0xffc42000 0 0x2c>; | |
68 | interrupt-parent = <&gic>; | |
69 | interrupts = <0 6 0x4>; | |
70 | #gpio-cells = <2>; | |
71 | gpio-controller; | |
72 | gpio-ranges = <&pfc 0 64 32>; | |
73 | #interrupt-cells = <2>; | |
74 | interrupt-controller; | |
75 | }; | |
76 | ||
77 | gpio3: gpio@ffc43000 { | |
78 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; | |
79 | reg = <0 0xffc43000 0 0x2c>; | |
80 | interrupt-parent = <&gic>; | |
81 | interrupts = <0 7 0x4>; | |
82 | #gpio-cells = <2>; | |
83 | gpio-controller; | |
84 | gpio-ranges = <&pfc 0 96 32>; | |
85 | #interrupt-cells = <2>; | |
86 | interrupt-controller; | |
87 | }; | |
88 | ||
89 | gpio4: gpio@ffc44000 { | |
90 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; | |
91 | reg = <0 0xffc44000 0 0x2c>; | |
92 | interrupt-parent = <&gic>; | |
93 | interrupts = <0 8 0x4>; | |
94 | #gpio-cells = <2>; | |
95 | gpio-controller; | |
96 | gpio-ranges = <&pfc 0 128 32>; | |
97 | #interrupt-cells = <2>; | |
98 | interrupt-controller; | |
99 | }; | |
100 | ||
101 | gpio5: gpio@ffc45000 { | |
102 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; | |
103 | reg = <0 0xffc45000 0 0x2c>; | |
104 | interrupt-parent = <&gic>; | |
105 | interrupts = <0 9 0x4>; | |
106 | #gpio-cells = <2>; | |
107 | gpio-controller; | |
108 | gpio-ranges = <&pfc 0 160 32>; | |
109 | #interrupt-cells = <2>; | |
110 | interrupt-controller; | |
111 | }; | |
112 | ||
0468b2d6 MD |
113 | timer { |
114 | compatible = "arm,armv7-timer"; | |
115 | interrupts = <1 13 0xf08>, | |
116 | <1 14 0xf08>, | |
117 | <1 11 0xf08>, | |
118 | <1 10 0xf08>; | |
119 | }; | |
8f5ec0a5 MD |
120 | |
121 | irqc0: interrupt-controller@e61c0000 { | |
122 | compatible = "renesas,irqc"; | |
123 | #interrupt-cells = <2>; | |
124 | interrupt-controller; | |
8585deb1 | 125 | reg = <0 0xe61c0000 0 0x200>; |
8f5ec0a5 MD |
126 | interrupt-parent = <&gic>; |
127 | interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>; | |
128 | }; | |
8c9b1aa4 GL |
129 | |
130 | mmcif0: mmcif@ee200000 { | |
131 | compatible = "renesas,sh-mmcif"; | |
132 | reg = <0 0xee200000 0 0x80>; | |
133 | interrupt-parent = <&gic>; | |
134 | interrupts = <0 169 0x4>; | |
135 | reg-io-width = <4>; | |
136 | status = "disabled"; | |
137 | }; | |
138 | ||
139 | mmcif1: mmcif@ee220000 { | |
140 | compatible = "renesas,sh-mmcif"; | |
141 | reg = <0 0xee220000 0 0x80>; | |
142 | interrupt-parent = <&gic>; | |
143 | interrupts = <0 170 0x4>; | |
144 | reg-io-width = <4>; | |
145 | status = "disabled"; | |
146 | }; | |
147 | ||
9694c778 LP |
148 | pfc: pfc@e6060000 { |
149 | compatible = "renesas,pfc-r8a7790"; | |
150 | reg = <0 0xe6060000 0 0x250>; | |
151 | }; | |
55689bfa | 152 | |
8c9b1aa4 | 153 | sdhi0: sdhi@ee100000 { |
df1d0584 | 154 | compatible = "renesas,sdhi-r8a7790"; |
8c9b1aa4 GL |
155 | reg = <0 0xee100000 0 0x100>; |
156 | interrupt-parent = <&gic>; | |
157 | interrupts = <0 165 4>; | |
158 | cap-sd-highspeed; | |
159 | status = "disabled"; | |
160 | }; | |
161 | ||
162 | sdhi1: sdhi@ee120000 { | |
df1d0584 | 163 | compatible = "renesas,sdhi-r8a7790"; |
8c9b1aa4 GL |
164 | reg = <0 0xee120000 0 0x100>; |
165 | interrupt-parent = <&gic>; | |
166 | interrupts = <0 166 4>; | |
167 | cap-sd-highspeed; | |
168 | status = "disabled"; | |
169 | }; | |
170 | ||
171 | sdhi2: sdhi@ee140000 { | |
df1d0584 | 172 | compatible = "renesas,sdhi-r8a7790"; |
8c9b1aa4 GL |
173 | reg = <0 0xee140000 0 0x100>; |
174 | interrupt-parent = <&gic>; | |
175 | interrupts = <0 167 4>; | |
176 | cap-sd-highspeed; | |
177 | status = "disabled"; | |
178 | }; | |
179 | ||
180 | sdhi3: sdhi@ee160000 { | |
df1d0584 | 181 | compatible = "renesas,sdhi-r8a7790"; |
8c9b1aa4 GL |
182 | reg = <0 0xee160000 0 0x100>; |
183 | interrupt-parent = <&gic>; | |
184 | interrupts = <0 168 4>; | |
185 | cap-sd-highspeed; | |
186 | status = "disabled"; | |
187 | }; | |
0468b2d6 | 188 | }; |