]>
Commit | Line | Data |
---|---|---|
0468b2d6 MD |
1 | /* |
2 | * Device Tree Source for the r8a7790 SoC | |
3 | * | |
b621f6d4 | 4 | * Copyright (C) 2015 Renesas Electronics Corporation |
d8913c67 SS |
5 | * Copyright (C) 2013-2014 Renesas Solutions Corp. |
6 | * Copyright (C) 2014 Cogent Embedded Inc. | |
0468b2d6 MD |
7 | * |
8 | * This file is licensed under the terms of the GNU General Public License | |
9 | * version 2. This program is licensed "as is" without any warranty of any | |
10 | * kind, whether express or implied. | |
11 | */ | |
12 | ||
22a1f595 | 13 | #include <dt-bindings/clock/r8a7790-clock.h> |
5f75e73c LP |
14 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
15 | #include <dt-bindings/interrupt-controller/irq.h> | |
4c8eb3c8 | 16 | #include <dt-bindings/power/r8a7790-sysc.h> |
5f75e73c | 17 | |
0468b2d6 MD |
18 | / { |
19 | compatible = "renesas,r8a7790"; | |
20 | interrupt-parent = <&gic>; | |
8585deb1 TY |
21 | #address-cells = <2>; |
22 | #size-cells = <2>; | |
0468b2d6 | 23 | |
6b1d7c68 WS |
24 | aliases { |
25 | i2c0 = &i2c0; | |
26 | i2c1 = &i2c1; | |
27 | i2c2 = &i2c2; | |
28 | i2c3 = &i2c3; | |
05f39916 WS |
29 | i2c4 = &iic0; |
30 | i2c5 = &iic1; | |
31 | i2c6 = &iic2; | |
32 | i2c7 = &iic3; | |
fad6d45c | 33 | spi0 = &qspi; |
ae8a6146 GU |
34 | spi1 = &msiof0; |
35 | spi2 = &msiof1; | |
36 | spi3 = &msiof2; | |
37 | spi4 = &msiof3; | |
9f685bfc BD |
38 | vin0 = &vin0; |
39 | vin1 = &vin1; | |
40 | vin2 = &vin2; | |
41 | vin3 = &vin3; | |
6b1d7c68 WS |
42 | }; |
43 | ||
0468b2d6 MD |
44 | cpus { |
45 | #address-cells = <1>; | |
46 | #size-cells = <0>; | |
dc378795 | 47 | enable-method = "renesas,apmu"; |
0468b2d6 MD |
48 | |
49 | cpu0: cpu@0 { | |
50 | device_type = "cpu"; | |
51 | compatible = "arm,cortex-a15"; | |
52 | reg = <0>; | |
53 | clock-frequency = <1300000000>; | |
b989e138 BC |
54 | voltage-tolerance = <1>; /* 1% */ |
55 | clocks = <&cpg_clocks R8A7790_CLK_Z>; | |
56 | clock-latency = <300000>; /* 300 us */ | |
4c8eb3c8 | 57 | power-domains = <&sysc R8A7790_PD_CA15_CPU0>; |
fb1cecd4 | 58 | next-level-cache = <&L2_CA15>; |
b989e138 BC |
59 | |
60 | /* kHz - uV - OPPs unknown yet */ | |
61 | operating-points = <1400000 1000000>, | |
62 | <1225000 1000000>, | |
63 | <1050000 1000000>, | |
64 | < 875000 1000000>, | |
65 | < 700000 1000000>, | |
66 | < 350000 1000000>; | |
0468b2d6 | 67 | }; |
c1f95979 MD |
68 | |
69 | cpu1: cpu@1 { | |
70 | device_type = "cpu"; | |
71 | compatible = "arm,cortex-a15"; | |
72 | reg = <1>; | |
73 | clock-frequency = <1300000000>; | |
4c8eb3c8 | 74 | power-domains = <&sysc R8A7790_PD_CA15_CPU1>; |
fb1cecd4 | 75 | next-level-cache = <&L2_CA15>; |
c1f95979 MD |
76 | }; |
77 | ||
78 | cpu2: cpu@2 { | |
79 | device_type = "cpu"; | |
80 | compatible = "arm,cortex-a15"; | |
81 | reg = <2>; | |
82 | clock-frequency = <1300000000>; | |
4c8eb3c8 | 83 | power-domains = <&sysc R8A7790_PD_CA15_CPU2>; |
fb1cecd4 | 84 | next-level-cache = <&L2_CA15>; |
c1f95979 MD |
85 | }; |
86 | ||
87 | cpu3: cpu@3 { | |
88 | device_type = "cpu"; | |
89 | compatible = "arm,cortex-a15"; | |
90 | reg = <3>; | |
91 | clock-frequency = <1300000000>; | |
4c8eb3c8 | 92 | power-domains = <&sysc R8A7790_PD_CA15_CPU3>; |
fb1cecd4 | 93 | next-level-cache = <&L2_CA15>; |
c1f95979 | 94 | }; |
2007e74c | 95 | |
1eed15e4 | 96 | cpu4: cpu@100 { |
2007e74c MD |
97 | device_type = "cpu"; |
98 | compatible = "arm,cortex-a7"; | |
99 | reg = <0x100>; | |
100 | clock-frequency = <780000000>; | |
4c8eb3c8 | 101 | power-domains = <&sysc R8A7790_PD_CA7_CPU0>; |
fb1cecd4 | 102 | next-level-cache = <&L2_CA7>; |
2007e74c MD |
103 | }; |
104 | ||
1eed15e4 | 105 | cpu5: cpu@101 { |
2007e74c MD |
106 | device_type = "cpu"; |
107 | compatible = "arm,cortex-a7"; | |
108 | reg = <0x101>; | |
109 | clock-frequency = <780000000>; | |
4c8eb3c8 | 110 | power-domains = <&sysc R8A7790_PD_CA7_CPU1>; |
fb1cecd4 | 111 | next-level-cache = <&L2_CA7>; |
2007e74c MD |
112 | }; |
113 | ||
1eed15e4 | 114 | cpu6: cpu@102 { |
2007e74c MD |
115 | device_type = "cpu"; |
116 | compatible = "arm,cortex-a7"; | |
117 | reg = <0x102>; | |
118 | clock-frequency = <780000000>; | |
4c8eb3c8 | 119 | power-domains = <&sysc R8A7790_PD_CA7_CPU2>; |
fb1cecd4 | 120 | next-level-cache = <&L2_CA7>; |
2007e74c MD |
121 | }; |
122 | ||
1eed15e4 | 123 | cpu7: cpu@103 { |
2007e74c MD |
124 | device_type = "cpu"; |
125 | compatible = "arm,cortex-a7"; | |
126 | reg = <0x103>; | |
127 | clock-frequency = <780000000>; | |
4c8eb3c8 | 128 | power-domains = <&sysc R8A7790_PD_CA7_CPU3>; |
fb1cecd4 | 129 | next-level-cache = <&L2_CA7>; |
2007e74c | 130 | }; |
2c3de367 | 131 | |
d492909c | 132 | L2_CA15: cache-controller-0 { |
2c3de367 | 133 | compatible = "cache"; |
2c3de367 GU |
134 | power-domains = <&sysc R8A7790_PD_CA15_SCU>; |
135 | cache-unified; | |
136 | cache-level = <2>; | |
137 | }; | |
138 | ||
d492909c | 139 | L2_CA7: cache-controller-1 { |
2c3de367 | 140 | compatible = "cache"; |
2c3de367 GU |
141 | power-domains = <&sysc R8A7790_PD_CA7_SCU>; |
142 | cache-unified; | |
143 | cache-level = <2>; | |
144 | }; | |
0468b2d6 MD |
145 | }; |
146 | ||
a8b805f3 KM |
147 | thermal-zones { |
148 | cpu_thermal: cpu-thermal { | |
149 | polling-delay-passive = <0>; | |
150 | polling-delay = <0>; | |
151 | ||
152 | thermal-sensors = <&thermal>; | |
153 | ||
154 | trips { | |
155 | cpu-crit { | |
156 | temperature = <115000>; | |
157 | hysteresis = <0>; | |
158 | type = "critical"; | |
159 | }; | |
160 | }; | |
161 | cooling-maps { | |
162 | }; | |
163 | }; | |
164 | }; | |
165 | ||
dc378795 MD |
166 | apmu@e6151000 { |
167 | compatible = "renesas,r8a7790-apmu", "renesas,apmu"; | |
168 | reg = <0 0xe6151000 0 0x188>; | |
169 | cpus = <&cpu4 &cpu5 &cpu6 &cpu7>; | |
170 | }; | |
171 | ||
172 | apmu@e6152000 { | |
173 | compatible = "renesas,r8a7790-apmu", "renesas,apmu"; | |
174 | reg = <0 0xe6152000 0 0x188>; | |
175 | cpus = <&cpu0 &cpu1 &cpu2 &cpu3>; | |
176 | }; | |
177 | ||
0468b2d6 | 178 | gic: interrupt-controller@f1001000 { |
e715e9c5 | 179 | compatible = "arm,gic-400"; |
0468b2d6 MD |
180 | #interrupt-cells = <3>; |
181 | #address-cells = <0>; | |
182 | interrupt-controller; | |
8585deb1 | 183 | reg = <0 0xf1001000 0 0x1000>, |
387720c9 | 184 | <0 0xf1002000 0 0x2000>, |
8585deb1 TY |
185 | <0 0xf1004000 0 0x2000>, |
186 | <0 0xf1006000 0 0x2000>; | |
3abb4d5f | 187 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
9e585236 GU |
188 | clocks = <&mstp4_clks R8A7790_CLK_INTC_SYS>; |
189 | clock-names = "clk"; | |
190 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; | |
0468b2d6 MD |
191 | }; |
192 | ||
23de2278 | 193 | gpio0: gpio@e6050000 { |
f98e10c8 | 194 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
23de2278 | 195 | reg = <0 0xe6050000 0 0x50>; |
3abb4d5f | 196 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
197 | #gpio-cells = <2>; |
198 | gpio-controller; | |
199 | gpio-ranges = <&pfc 0 0 32>; | |
200 | #interrupt-cells = <2>; | |
201 | interrupt-controller; | |
81f6883f | 202 | clocks = <&mstp9_clks R8A7790_CLK_GPIO0>; |
36ee3c27 | 203 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
f98e10c8 LP |
204 | }; |
205 | ||
23de2278 | 206 | gpio1: gpio@e6051000 { |
f98e10c8 | 207 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
23de2278 | 208 | reg = <0 0xe6051000 0 0x50>; |
3abb4d5f | 209 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
210 | #gpio-cells = <2>; |
211 | gpio-controller; | |
56a2182f | 212 | gpio-ranges = <&pfc 0 32 30>; |
f98e10c8 LP |
213 | #interrupt-cells = <2>; |
214 | interrupt-controller; | |
81f6883f | 215 | clocks = <&mstp9_clks R8A7790_CLK_GPIO1>; |
36ee3c27 | 216 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
f98e10c8 LP |
217 | }; |
218 | ||
23de2278 | 219 | gpio2: gpio@e6052000 { |
f98e10c8 | 220 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
23de2278 | 221 | reg = <0 0xe6052000 0 0x50>; |
3abb4d5f | 222 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
223 | #gpio-cells = <2>; |
224 | gpio-controller; | |
56a2182f | 225 | gpio-ranges = <&pfc 0 64 30>; |
f98e10c8 LP |
226 | #interrupt-cells = <2>; |
227 | interrupt-controller; | |
81f6883f | 228 | clocks = <&mstp9_clks R8A7790_CLK_GPIO2>; |
36ee3c27 | 229 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
f98e10c8 LP |
230 | }; |
231 | ||
23de2278 | 232 | gpio3: gpio@e6053000 { |
f98e10c8 | 233 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
23de2278 | 234 | reg = <0 0xe6053000 0 0x50>; |
3abb4d5f | 235 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
236 | #gpio-cells = <2>; |
237 | gpio-controller; | |
238 | gpio-ranges = <&pfc 0 96 32>; | |
239 | #interrupt-cells = <2>; | |
240 | interrupt-controller; | |
81f6883f | 241 | clocks = <&mstp9_clks R8A7790_CLK_GPIO3>; |
36ee3c27 | 242 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
f98e10c8 LP |
243 | }; |
244 | ||
23de2278 | 245 | gpio4: gpio@e6054000 { |
f98e10c8 | 246 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
23de2278 | 247 | reg = <0 0xe6054000 0 0x50>; |
3abb4d5f | 248 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
249 | #gpio-cells = <2>; |
250 | gpio-controller; | |
251 | gpio-ranges = <&pfc 0 128 32>; | |
252 | #interrupt-cells = <2>; | |
253 | interrupt-controller; | |
81f6883f | 254 | clocks = <&mstp9_clks R8A7790_CLK_GPIO4>; |
36ee3c27 | 255 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
f98e10c8 LP |
256 | }; |
257 | ||
23de2278 | 258 | gpio5: gpio@e6055000 { |
f98e10c8 | 259 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
23de2278 | 260 | reg = <0 0xe6055000 0 0x50>; |
3abb4d5f | 261 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; |
f98e10c8 LP |
262 | #gpio-cells = <2>; |
263 | gpio-controller; | |
264 | gpio-ranges = <&pfc 0 160 32>; | |
265 | #interrupt-cells = <2>; | |
266 | interrupt-controller; | |
81f6883f | 267 | clocks = <&mstp9_clks R8A7790_CLK_GPIO5>; |
36ee3c27 | 268 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
f98e10c8 LP |
269 | }; |
270 | ||
a8b805f3 KM |
271 | thermal: thermal@e61f0000 { |
272 | compatible = "renesas,thermal-r8a7790", | |
273 | "renesas,rcar-gen2-thermal", | |
274 | "renesas,rcar-thermal"; | |
03e2f56b | 275 | reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; |
3abb4d5f | 276 | interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; |
d3a439db | 277 | clocks = <&mstp5_clks R8A7790_CLK_THERMAL>; |
36ee3c27 | 278 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
a8b805f3 | 279 | #thermal-sensor-cells = <0>; |
03e2f56b MD |
280 | }; |
281 | ||
0468b2d6 MD |
282 | timer { |
283 | compatible = "arm,armv7-timer"; | |
3abb4d5f SH |
284 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
285 | <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
286 | <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
287 | <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; | |
0468b2d6 | 288 | }; |
8f5ec0a5 | 289 | |
39cf6d73 | 290 | cmt0: timer@ffca0000 { |
37757030 | 291 | compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2"; |
39cf6d73 | 292 | reg = <0 0xffca0000 0 0x1004>; |
3abb4d5f SH |
293 | interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, |
294 | <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; | |
39cf6d73 LP |
295 | clocks = <&mstp1_clks R8A7790_CLK_CMT0>; |
296 | clock-names = "fck"; | |
36ee3c27 | 297 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
39cf6d73 LP |
298 | |
299 | renesas,channels-mask = <0x60>; | |
300 | ||
301 | status = "disabled"; | |
302 | }; | |
303 | ||
304 | cmt1: timer@e6130000 { | |
37757030 | 305 | compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2"; |
39cf6d73 | 306 | reg = <0 0xe6130000 0 0x1004>; |
3abb4d5f SH |
307 | interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, |
308 | <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, | |
309 | <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, | |
310 | <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, | |
311 | <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, | |
312 | <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, | |
313 | <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, | |
314 | <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; | |
39cf6d73 LP |
315 | clocks = <&mstp3_clks R8A7790_CLK_CMT1>; |
316 | clock-names = "fck"; | |
36ee3c27 | 317 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
39cf6d73 LP |
318 | |
319 | renesas,channels-mask = <0xff>; | |
320 | ||
321 | status = "disabled"; | |
322 | }; | |
323 | ||
8f5ec0a5 | 324 | irqc0: interrupt-controller@e61c0000 { |
220fc352 | 325 | compatible = "renesas,irqc-r8a7790", "renesas,irqc"; |
8f5ec0a5 MD |
326 | #interrupt-cells = <2>; |
327 | interrupt-controller; | |
8585deb1 | 328 | reg = <0 0xe61c0000 0 0x200>; |
3abb4d5f SH |
329 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, |
330 | <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, | |
331 | <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, | |
332 | <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; | |
61624caf | 333 | clocks = <&mstp4_clks R8A7790_CLK_IRQC>; |
36ee3c27 | 334 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
8f5ec0a5 | 335 | }; |
8c9b1aa4 | 336 | |
b9fea49c | 337 | dmac0: dma-controller@e6700000 { |
4af0a664 | 338 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
b9fea49c | 339 | reg = <0 0xe6700000 0 0x20000>; |
3abb4d5f SH |
340 | interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH |
341 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH | |
342 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH | |
343 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH | |
344 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH | |
345 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH | |
346 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH | |
347 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH | |
348 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH | |
349 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH | |
350 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH | |
351 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH | |
352 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH | |
353 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH | |
354 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH | |
355 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; | |
b9fea49c LP |
356 | interrupt-names = "error", |
357 | "ch0", "ch1", "ch2", "ch3", | |
358 | "ch4", "ch5", "ch6", "ch7", | |
359 | "ch8", "ch9", "ch10", "ch11", | |
360 | "ch12", "ch13", "ch14"; | |
361 | clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>; | |
362 | clock-names = "fck"; | |
36ee3c27 | 363 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
b9fea49c LP |
364 | #dma-cells = <1>; |
365 | dma-channels = <15>; | |
366 | }; | |
367 | ||
368 | dmac1: dma-controller@e6720000 { | |
4af0a664 | 369 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
b9fea49c | 370 | reg = <0 0xe6720000 0 0x20000>; |
3abb4d5f SH |
371 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH |
372 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH | |
373 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH | |
374 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH | |
375 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH | |
376 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH | |
377 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH | |
378 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH | |
379 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH | |
380 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH | |
381 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH | |
382 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH | |
383 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH | |
384 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH | |
385 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH | |
386 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; | |
b9fea49c LP |
387 | interrupt-names = "error", |
388 | "ch0", "ch1", "ch2", "ch3", | |
389 | "ch4", "ch5", "ch6", "ch7", | |
390 | "ch8", "ch9", "ch10", "ch11", | |
391 | "ch12", "ch13", "ch14"; | |
392 | clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>; | |
393 | clock-names = "fck"; | |
36ee3c27 | 394 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
b9fea49c LP |
395 | #dma-cells = <1>; |
396 | dma-channels = <15>; | |
397 | }; | |
ba3240be KM |
398 | |
399 | audma0: dma-controller@ec700000 { | |
4af0a664 | 400 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
ba3240be | 401 | reg = <0 0xec700000 0 0x10000>; |
3abb4d5f SH |
402 | interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH |
403 | GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH | |
404 | GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH | |
405 | GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH | |
406 | GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH | |
407 | GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH | |
408 | GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH | |
409 | GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH | |
410 | GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH | |
411 | GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH | |
412 | GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH | |
413 | GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH | |
414 | GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH | |
415 | GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; | |
ba3240be KM |
416 | interrupt-names = "error", |
417 | "ch0", "ch1", "ch2", "ch3", | |
418 | "ch4", "ch5", "ch6", "ch7", | |
419 | "ch8", "ch9", "ch10", "ch11", | |
420 | "ch12"; | |
421 | clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>; | |
422 | clock-names = "fck"; | |
36ee3c27 | 423 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ba3240be KM |
424 | #dma-cells = <1>; |
425 | dma-channels = <13>; | |
426 | }; | |
427 | ||
428 | audma1: dma-controller@ec720000 { | |
4af0a664 | 429 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
ba3240be | 430 | reg = <0 0xec720000 0 0x10000>; |
3abb4d5f SH |
431 | interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH |
432 | GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH | |
433 | GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH | |
434 | GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH | |
435 | GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH | |
436 | GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH | |
437 | GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH | |
438 | GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH | |
439 | GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH | |
440 | GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH | |
441 | GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH | |
442 | GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH | |
443 | GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH | |
444 | GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; | |
ba3240be KM |
445 | interrupt-names = "error", |
446 | "ch0", "ch1", "ch2", "ch3", | |
447 | "ch4", "ch5", "ch6", "ch7", | |
448 | "ch8", "ch9", "ch10", "ch11", | |
449 | "ch12"; | |
450 | clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>; | |
451 | clock-names = "fck"; | |
36ee3c27 | 452 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ba3240be KM |
453 | #dma-cells = <1>; |
454 | dma-channels = <13>; | |
455 | }; | |
456 | ||
a3ff2090 | 457 | usb_dmac0: dma-controller@e65a0000 { |
d01c8bec | 458 | compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; |
a3ff2090 | 459 | reg = <0 0xe65a0000 0 0x100>; |
3abb4d5f SH |
460 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH |
461 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
a3ff2090 YS |
462 | interrupt-names = "ch0", "ch1"; |
463 | clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>; | |
36ee3c27 | 464 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
a3ff2090 YS |
465 | #dma-cells = <1>; |
466 | dma-channels = <2>; | |
467 | }; | |
468 | ||
469 | usb_dmac1: dma-controller@e65b0000 { | |
d01c8bec | 470 | compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; |
a3ff2090 | 471 | reg = <0 0xe65b0000 0 0x100>; |
3abb4d5f SH |
472 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH |
473 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
a3ff2090 YS |
474 | interrupt-names = "ch0", "ch1"; |
475 | clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>; | |
36ee3c27 | 476 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
a3ff2090 YS |
477 | #dma-cells = <1>; |
478 | dma-channels = <2>; | |
479 | }; | |
480 | ||
edd2b9f4 GL |
481 | i2c0: i2c@e6508000 { |
482 | #address-cells = <1>; | |
483 | #size-cells = <0>; | |
82f8bfbe | 484 | compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; |
edd2b9f4 | 485 | reg = <0 0xe6508000 0 0x40>; |
3abb4d5f | 486 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; |
2450badf | 487 | clocks = <&mstp9_clks R8A7790_CLK_I2C0>; |
36ee3c27 | 488 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ac8e7f31 | 489 | i2c-scl-internal-delay-ns = <110>; |
edd2b9f4 GL |
490 | status = "disabled"; |
491 | }; | |
492 | ||
493 | i2c1: i2c@e6518000 { | |
494 | #address-cells = <1>; | |
495 | #size-cells = <0>; | |
82f8bfbe | 496 | compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; |
edd2b9f4 | 497 | reg = <0 0xe6518000 0 0x40>; |
3abb4d5f | 498 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; |
2450badf | 499 | clocks = <&mstp9_clks R8A7790_CLK_I2C1>; |
36ee3c27 | 500 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ac8e7f31 | 501 | i2c-scl-internal-delay-ns = <6>; |
edd2b9f4 GL |
502 | status = "disabled"; |
503 | }; | |
504 | ||
505 | i2c2: i2c@e6530000 { | |
506 | #address-cells = <1>; | |
507 | #size-cells = <0>; | |
82f8bfbe | 508 | compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; |
edd2b9f4 | 509 | reg = <0 0xe6530000 0 0x40>; |
3abb4d5f | 510 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; |
2450badf | 511 | clocks = <&mstp9_clks R8A7790_CLK_I2C2>; |
36ee3c27 | 512 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ac8e7f31 | 513 | i2c-scl-internal-delay-ns = <6>; |
edd2b9f4 GL |
514 | status = "disabled"; |
515 | }; | |
516 | ||
517 | i2c3: i2c@e6540000 { | |
518 | #address-cells = <1>; | |
519 | #size-cells = <0>; | |
82f8bfbe | 520 | compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; |
edd2b9f4 | 521 | reg = <0 0xe6540000 0 0x40>; |
3abb4d5f | 522 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; |
2450badf | 523 | clocks = <&mstp9_clks R8A7790_CLK_I2C3>; |
36ee3c27 | 524 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ac8e7f31 | 525 | i2c-scl-internal-delay-ns = <110>; |
edd2b9f4 GL |
526 | status = "disabled"; |
527 | }; | |
528 | ||
05f39916 WS |
529 | iic0: i2c@e6500000 { |
530 | #address-cells = <1>; | |
531 | #size-cells = <0>; | |
b8075eea SH |
532 | compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", |
533 | "renesas,rmobile-iic"; | |
05f39916 | 534 | reg = <0 0xe6500000 0 0x425>; |
3abb4d5f | 535 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; |
05f39916 | 536 | clocks = <&mstp3_clks R8A7790_CLK_IIC0>; |
badf8570 NS |
537 | dmas = <&dmac0 0x61>, <&dmac0 0x62>, |
538 | <&dmac1 0x61>, <&dmac1 0x62>; | |
539 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 540 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
05f39916 WS |
541 | status = "disabled"; |
542 | }; | |
543 | ||
544 | iic1: i2c@e6510000 { | |
545 | #address-cells = <1>; | |
546 | #size-cells = <0>; | |
b8075eea SH |
547 | compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", |
548 | "renesas,rmobile-iic"; | |
05f39916 | 549 | reg = <0 0xe6510000 0 0x425>; |
3abb4d5f | 550 | interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; |
05f39916 | 551 | clocks = <&mstp3_clks R8A7790_CLK_IIC1>; |
badf8570 NS |
552 | dmas = <&dmac0 0x65>, <&dmac0 0x66>, |
553 | <&dmac1 0x65>, <&dmac1 0x66>; | |
554 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 555 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
05f39916 WS |
556 | status = "disabled"; |
557 | }; | |
558 | ||
559 | iic2: i2c@e6520000 { | |
560 | #address-cells = <1>; | |
561 | #size-cells = <0>; | |
b8075eea SH |
562 | compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", |
563 | "renesas,rmobile-iic"; | |
05f39916 | 564 | reg = <0 0xe6520000 0 0x425>; |
3abb4d5f | 565 | interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; |
05f39916 | 566 | clocks = <&mstp3_clks R8A7790_CLK_IIC2>; |
badf8570 NS |
567 | dmas = <&dmac0 0x69>, <&dmac0 0x6a>, |
568 | <&dmac1 0x69>, <&dmac1 0x6a>; | |
569 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 570 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
05f39916 WS |
571 | status = "disabled"; |
572 | }; | |
573 | ||
574 | iic3: i2c@e60b0000 { | |
575 | #address-cells = <1>; | |
576 | #size-cells = <0>; | |
b8075eea SH |
577 | compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", |
578 | "renesas,rmobile-iic"; | |
05f39916 | 579 | reg = <0 0xe60b0000 0 0x425>; |
3abb4d5f | 580 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; |
05f39916 | 581 | clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>; |
badf8570 NS |
582 | dmas = <&dmac0 0x77>, <&dmac0 0x78>, |
583 | <&dmac1 0x77>, <&dmac1 0x78>; | |
584 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 585 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
05f39916 WS |
586 | status = "disabled"; |
587 | }; | |
588 | ||
22c2b78d | 589 | mmcif0: mmc@ee200000 { |
063e8560 | 590 | compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; |
8c9b1aa4 | 591 | reg = <0 0xee200000 0 0x80>; |
3abb4d5f | 592 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; |
72197ca7 | 593 | clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>; |
badf8570 NS |
594 | dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, |
595 | <&dmac1 0xd1>, <&dmac1 0xd2>; | |
596 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 597 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
8c9b1aa4 GL |
598 | reg-io-width = <4>; |
599 | status = "disabled"; | |
96370057 | 600 | max-frequency = <97500000>; |
8c9b1aa4 GL |
601 | }; |
602 | ||
b718aa44 | 603 | mmcif1: mmc@ee220000 { |
063e8560 | 604 | compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; |
8c9b1aa4 | 605 | reg = <0 0xee220000 0 0x80>; |
3abb4d5f | 606 | interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; |
72197ca7 | 607 | clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>; |
badf8570 NS |
608 | dmas = <&dmac0 0xe1>, <&dmac0 0xe2>, |
609 | <&dmac1 0xe1>, <&dmac1 0xe2>; | |
610 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 611 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
8c9b1aa4 GL |
612 | reg-io-width = <4>; |
613 | status = "disabled"; | |
96370057 | 614 | max-frequency = <97500000>; |
8c9b1aa4 GL |
615 | }; |
616 | ||
a5f4ae3c | 617 | pfc: pin-controller@e6060000 { |
9694c778 LP |
618 | compatible = "renesas,pfc-r8a7790"; |
619 | reg = <0 0xe6060000 0 0x250>; | |
620 | }; | |
55689bfa | 621 | |
b718aa44 | 622 | sdhi0: sd@ee100000 { |
df1d0584 | 623 | compatible = "renesas,sdhi-r8a7790"; |
66f47ed0 | 624 | reg = <0 0xee100000 0 0x328>; |
3abb4d5f | 625 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; |
72197ca7 | 626 | clocks = <&mstp3_clks R8A7790_CLK_SDHI0>; |
badf8570 NS |
627 | dmas = <&dmac0 0xcd>, <&dmac0 0xce>, |
628 | <&dmac1 0xcd>, <&dmac1 0xce>; | |
629 | dma-names = "tx", "rx", "tx", "rx"; | |
21c7d0fc | 630 | max-frequency = <195000000>; |
36ee3c27 | 631 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
8c9b1aa4 GL |
632 | status = "disabled"; |
633 | }; | |
634 | ||
b718aa44 | 635 | sdhi1: sd@ee120000 { |
df1d0584 | 636 | compatible = "renesas,sdhi-r8a7790"; |
66f47ed0 | 637 | reg = <0 0xee120000 0 0x328>; |
3abb4d5f | 638 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; |
72197ca7 | 639 | clocks = <&mstp3_clks R8A7790_CLK_SDHI1>; |
badf8570 NS |
640 | dmas = <&dmac0 0xc9>, <&dmac0 0xca>, |
641 | <&dmac1 0xc9>, <&dmac1 0xca>; | |
642 | dma-names = "tx", "rx", "tx", "rx"; | |
21c7d0fc | 643 | max-frequency = <195000000>; |
36ee3c27 | 644 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
8c9b1aa4 GL |
645 | status = "disabled"; |
646 | }; | |
647 | ||
b718aa44 | 648 | sdhi2: sd@ee140000 { |
df1d0584 | 649 | compatible = "renesas,sdhi-r8a7790"; |
8c9b1aa4 | 650 | reg = <0 0xee140000 0 0x100>; |
3abb4d5f | 651 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; |
72197ca7 | 652 | clocks = <&mstp3_clks R8A7790_CLK_SDHI2>; |
badf8570 NS |
653 | dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, |
654 | <&dmac1 0xc1>, <&dmac1 0xc2>; | |
655 | dma-names = "tx", "rx", "tx", "rx"; | |
22f708b0 | 656 | max-frequency = <97500000>; |
36ee3c27 | 657 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
8c9b1aa4 GL |
658 | status = "disabled"; |
659 | }; | |
660 | ||
b718aa44 | 661 | sdhi3: sd@ee160000 { |
df1d0584 | 662 | compatible = "renesas,sdhi-r8a7790"; |
8c9b1aa4 | 663 | reg = <0 0xee160000 0 0x100>; |
3abb4d5f | 664 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; |
72197ca7 | 665 | clocks = <&mstp3_clks R8A7790_CLK_SDHI3>; |
badf8570 NS |
666 | dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, |
667 | <&dmac1 0xd3>, <&dmac1 0xd4>; | |
668 | dma-names = "tx", "rx", "tx", "rx"; | |
22f708b0 | 669 | max-frequency = <97500000>; |
36ee3c27 | 670 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
8c9b1aa4 GL |
671 | status = "disabled"; |
672 | }; | |
22a1f595 | 673 | |
597af20f | 674 | scifa0: serial@e6c40000 { |
a20dc9f2 GU |
675 | compatible = "renesas,scifa-r8a7790", |
676 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
597af20f | 677 | reg = <0 0xe6c40000 0 64>; |
3abb4d5f | 678 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; |
597af20f | 679 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>; |
6c6e12a1 | 680 | clock-names = "fck"; |
badf8570 NS |
681 | dmas = <&dmac0 0x21>, <&dmac0 0x22>, |
682 | <&dmac1 0x21>, <&dmac1 0x22>; | |
683 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 684 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
685 | status = "disabled"; |
686 | }; | |
687 | ||
688 | scifa1: serial@e6c50000 { | |
a20dc9f2 GU |
689 | compatible = "renesas,scifa-r8a7790", |
690 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
597af20f | 691 | reg = <0 0xe6c50000 0 64>; |
3abb4d5f | 692 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; |
597af20f | 693 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>; |
6c6e12a1 | 694 | clock-names = "fck"; |
badf8570 NS |
695 | dmas = <&dmac0 0x25>, <&dmac0 0x26>, |
696 | <&dmac1 0x25>, <&dmac1 0x26>; | |
697 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 698 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
699 | status = "disabled"; |
700 | }; | |
701 | ||
702 | scifa2: serial@e6c60000 { | |
a20dc9f2 GU |
703 | compatible = "renesas,scifa-r8a7790", |
704 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
597af20f | 705 | reg = <0 0xe6c60000 0 64>; |
3abb4d5f | 706 | interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; |
597af20f | 707 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>; |
6c6e12a1 | 708 | clock-names = "fck"; |
badf8570 NS |
709 | dmas = <&dmac0 0x27>, <&dmac0 0x28>, |
710 | <&dmac1 0x27>, <&dmac1 0x28>; | |
711 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 712 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
713 | status = "disabled"; |
714 | }; | |
715 | ||
716 | scifb0: serial@e6c20000 { | |
a20dc9f2 GU |
717 | compatible = "renesas,scifb-r8a7790", |
718 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
f31fbe83 | 719 | reg = <0 0xe6c20000 0 0x100>; |
3abb4d5f | 720 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; |
597af20f | 721 | clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>; |
6c6e12a1 | 722 | clock-names = "fck"; |
badf8570 NS |
723 | dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, |
724 | <&dmac1 0x3d>, <&dmac1 0x3e>; | |
725 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 726 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
727 | status = "disabled"; |
728 | }; | |
729 | ||
730 | scifb1: serial@e6c30000 { | |
a20dc9f2 GU |
731 | compatible = "renesas,scifb-r8a7790", |
732 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
f31fbe83 | 733 | reg = <0 0xe6c30000 0 0x100>; |
3abb4d5f | 734 | interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; |
597af20f | 735 | clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>; |
6c6e12a1 | 736 | clock-names = "fck"; |
badf8570 NS |
737 | dmas = <&dmac0 0x19>, <&dmac0 0x1a>, |
738 | <&dmac1 0x19>, <&dmac1 0x1a>; | |
739 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 740 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
741 | status = "disabled"; |
742 | }; | |
743 | ||
744 | scifb2: serial@e6ce0000 { | |
a20dc9f2 GU |
745 | compatible = "renesas,scifb-r8a7790", |
746 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
f31fbe83 | 747 | reg = <0 0xe6ce0000 0 0x100>; |
3abb4d5f | 748 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; |
597af20f | 749 | clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>; |
6c6e12a1 | 750 | clock-names = "fck"; |
badf8570 NS |
751 | dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, |
752 | <&dmac1 0x1d>, <&dmac1 0x1e>; | |
753 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 754 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
755 | status = "disabled"; |
756 | }; | |
757 | ||
758 | scif0: serial@e6e60000 { | |
a20dc9f2 GU |
759 | compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", |
760 | "renesas,scif"; | |
597af20f | 761 | reg = <0 0xe6e60000 0 64>; |
3abb4d5f | 762 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; |
42af65e8 GU |
763 | clocks = <&mstp7_clks R8A7790_CLK_SCIF0>, <&zs_clk>, |
764 | <&scif_clk>; | |
765 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
766 | dmas = <&dmac0 0x29>, <&dmac0 0x2a>, |
767 | <&dmac1 0x29>, <&dmac1 0x2a>; | |
768 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 769 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
770 | status = "disabled"; |
771 | }; | |
772 | ||
773 | scif1: serial@e6e68000 { | |
a20dc9f2 GU |
774 | compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", |
775 | "renesas,scif"; | |
597af20f | 776 | reg = <0 0xe6e68000 0 64>; |
3abb4d5f | 777 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; |
42af65e8 GU |
778 | clocks = <&mstp7_clks R8A7790_CLK_SCIF1>, <&zs_clk>, |
779 | <&scif_clk>; | |
780 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
781 | dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, |
782 | <&dmac1 0x2d>, <&dmac1 0x2e>; | |
783 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 784 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
785 | status = "disabled"; |
786 | }; | |
787 | ||
022869a2 GU |
788 | scif2: serial@e6e56000 { |
789 | compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", | |
790 | "renesas,scif"; | |
791 | reg = <0 0xe6e56000 0 64>; | |
792 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
793 | clocks = <&mstp3_clks R8A7790_CLK_SCIF2>, <&zs_clk>, | |
794 | <&scif_clk>; | |
795 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
796 | dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, |
797 | <&dmac1 0x2b>, <&dmac1 0x2c>; | |
798 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 799 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
022869a2 GU |
800 | status = "disabled"; |
801 | }; | |
802 | ||
597af20f | 803 | hscif0: serial@e62c0000 { |
a20dc9f2 GU |
804 | compatible = "renesas,hscif-r8a7790", |
805 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
597af20f | 806 | reg = <0 0xe62c0000 0 96>; |
3abb4d5f | 807 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; |
42af65e8 GU |
808 | clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>, <&zs_clk>, |
809 | <&scif_clk>; | |
810 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
811 | dmas = <&dmac0 0x39>, <&dmac0 0x3a>, |
812 | <&dmac1 0x39>, <&dmac1 0x3a>; | |
813 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 814 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
815 | status = "disabled"; |
816 | }; | |
817 | ||
818 | hscif1: serial@e62c8000 { | |
a20dc9f2 GU |
819 | compatible = "renesas,hscif-r8a7790", |
820 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
597af20f | 821 | reg = <0 0xe62c8000 0 96>; |
3abb4d5f | 822 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; |
42af65e8 GU |
823 | clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>, <&zs_clk>, |
824 | <&scif_clk>; | |
825 | clock-names = "fck", "brg_int", "scif_clk"; | |
badf8570 NS |
826 | dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, |
827 | <&dmac1 0x4d>, <&dmac1 0x4e>; | |
828 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 829 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
597af20f LP |
830 | status = "disabled"; |
831 | }; | |
832 | ||
c90715a3 GU |
833 | icram0: sram@e63a0000 { |
834 | compatible = "mmio-sram"; | |
835 | reg = <0 0xe63a0000 0 0x12000>; | |
836 | }; | |
837 | ||
838 | icram1: sram@e63c0000 { | |
839 | compatible = "mmio-sram"; | |
840 | reg = <0 0xe63c0000 0 0x1000>; | |
841 | }; | |
842 | ||
d8913c67 SS |
843 | ether: ethernet@ee700000 { |
844 | compatible = "renesas,ether-r8a7790"; | |
845 | reg = <0 0xee700000 0 0x400>; | |
3abb4d5f | 846 | interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; |
d8913c67 | 847 | clocks = <&mstp8_clks R8A7790_CLK_ETHER>; |
36ee3c27 | 848 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
d8913c67 SS |
849 | phy-mode = "rmii"; |
850 | #address-cells = <1>; | |
851 | #size-cells = <0>; | |
852 | status = "disabled"; | |
853 | }; | |
854 | ||
f25d6b97 | 855 | avb: ethernet@e6800000 { |
d92df7e5 SH |
856 | compatible = "renesas,etheravb-r8a7790", |
857 | "renesas,etheravb-rcar-gen2"; | |
f25d6b97 | 858 | reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; |
3abb4d5f | 859 | interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; |
f25d6b97 | 860 | clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>; |
36ee3c27 | 861 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
f25d6b97 SS |
862 | #address-cells = <1>; |
863 | #size-cells = <0>; | |
864 | status = "disabled"; | |
865 | }; | |
866 | ||
cde630f7 VB |
867 | sata0: sata@ee300000 { |
868 | compatible = "renesas,sata-r8a7790"; | |
869 | reg = <0 0xee300000 0 0x2000>; | |
3abb4d5f | 870 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; |
cde630f7 | 871 | clocks = <&mstp8_clks R8A7790_CLK_SATA0>; |
36ee3c27 | 872 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
cde630f7 VB |
873 | status = "disabled"; |
874 | }; | |
875 | ||
876 | sata1: sata@ee500000 { | |
877 | compatible = "renesas,sata-r8a7790"; | |
878 | reg = <0 0xee500000 0 0x2000>; | |
3abb4d5f | 879 | interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; |
cde630f7 | 880 | clocks = <&mstp8_clks R8A7790_CLK_SATA1>; |
36ee3c27 | 881 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
cde630f7 VB |
882 | status = "disabled"; |
883 | }; | |
884 | ||
ae0a555b | 885 | hsusb: usb@e6590000 { |
d87ec94a | 886 | compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs"; |
ae0a555b | 887 | reg = <0 0xe6590000 0 0x100>; |
3abb4d5f | 888 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; |
ae0a555b | 889 | clocks = <&mstp7_clks R8A7790_CLK_HSUSB>; |
e8295dc3 YS |
890 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, |
891 | <&usb_dmac1 0>, <&usb_dmac1 1>; | |
892 | dma-names = "ch0", "ch1", "ch2", "ch3"; | |
36ee3c27 | 893 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
484adb00 GU |
894 | renesas,buswait = <4>; |
895 | phys = <&usb0 1>; | |
896 | phy-names = "usb"; | |
ae0a555b YS |
897 | status = "disabled"; |
898 | }; | |
899 | ||
e089f657 | 900 | usbphy: usb-phy@e6590100 { |
3b0922c5 SH |
901 | compatible = "renesas,usb-phy-r8a7790", |
902 | "renesas,rcar-gen2-usb-phy"; | |
e089f657 SS |
903 | reg = <0 0xe6590100 0 0x100>; |
904 | #address-cells = <1>; | |
905 | #size-cells = <0>; | |
906 | clocks = <&mstp7_clks R8A7790_CLK_HSUSB>; | |
907 | clock-names = "usbhs"; | |
36ee3c27 | 908 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
e089f657 SS |
909 | status = "disabled"; |
910 | ||
911 | usb0: usb-channel@0 { | |
912 | reg = <0>; | |
913 | #phy-cells = <1>; | |
914 | }; | |
915 | usb2: usb-channel@2 { | |
916 | reg = <2>; | |
917 | #phy-cells = <1>; | |
918 | }; | |
919 | }; | |
920 | ||
9f685bfc BD |
921 | vin0: video@e6ef0000 { |
922 | compatible = "renesas,vin-r8a7790"; | |
9f685bfc | 923 | reg = <0 0xe6ef0000 0 0x1000>; |
3abb4d5f | 924 | interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; |
484adb00 | 925 | clocks = <&mstp8_clks R8A7790_CLK_VIN0>; |
36ee3c27 | 926 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
9f685bfc BD |
927 | status = "disabled"; |
928 | }; | |
929 | ||
930 | vin1: video@e6ef1000 { | |
931 | compatible = "renesas,vin-r8a7790"; | |
9f685bfc | 932 | reg = <0 0xe6ef1000 0 0x1000>; |
3abb4d5f | 933 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; |
484adb00 | 934 | clocks = <&mstp8_clks R8A7790_CLK_VIN1>; |
36ee3c27 | 935 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
9f685bfc BD |
936 | status = "disabled"; |
937 | }; | |
938 | ||
939 | vin2: video@e6ef2000 { | |
940 | compatible = "renesas,vin-r8a7790"; | |
9f685bfc | 941 | reg = <0 0xe6ef2000 0 0x1000>; |
3abb4d5f | 942 | interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; |
484adb00 | 943 | clocks = <&mstp8_clks R8A7790_CLK_VIN2>; |
36ee3c27 | 944 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
9f685bfc BD |
945 | status = "disabled"; |
946 | }; | |
947 | ||
948 | vin3: video@e6ef3000 { | |
949 | compatible = "renesas,vin-r8a7790"; | |
9f685bfc | 950 | reg = <0 0xe6ef3000 0 0x1000>; |
3abb4d5f | 951 | interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; |
484adb00 | 952 | clocks = <&mstp8_clks R8A7790_CLK_VIN3>; |
36ee3c27 | 953 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
9f685bfc BD |
954 | status = "disabled"; |
955 | }; | |
956 | ||
3ac6a83c LP |
957 | vsp1@fe920000 { |
958 | compatible = "renesas,vsp1"; | |
959 | reg = <0 0xfe920000 0 0x8000>; | |
3abb4d5f | 960 | interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; |
3ac6a83c | 961 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>; |
36ee3c27 | 962 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
3ac6a83c LP |
963 | }; |
964 | ||
965 | vsp1@fe928000 { | |
966 | compatible = "renesas,vsp1"; | |
967 | reg = <0 0xfe928000 0 0x8000>; | |
3abb4d5f | 968 | interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; |
3ac6a83c | 969 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>; |
36ee3c27 | 970 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
3ac6a83c LP |
971 | }; |
972 | ||
973 | vsp1@fe930000 { | |
974 | compatible = "renesas,vsp1"; | |
975 | reg = <0 0xfe930000 0 0x8000>; | |
3abb4d5f | 976 | interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; |
3ac6a83c | 977 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>; |
36ee3c27 | 978 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
3ac6a83c LP |
979 | }; |
980 | ||
981 | vsp1@fe938000 { | |
982 | compatible = "renesas,vsp1"; | |
983 | reg = <0 0xfe938000 0 0x8000>; | |
3abb4d5f | 984 | interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; |
3ac6a83c | 985 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>; |
36ee3c27 | 986 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
3ac6a83c LP |
987 | }; |
988 | ||
989 | du: display@feb00000 { | |
990 | compatible = "renesas,du-r8a7790"; | |
991 | reg = <0 0xfeb00000 0 0x70000>, | |
992 | <0 0xfeb90000 0 0x1c>, | |
993 | <0 0xfeb94000 0 0x1c>; | |
994 | reg-names = "du", "lvds.0", "lvds.1"; | |
3abb4d5f SH |
995 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, |
996 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, | |
997 | <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; | |
3ac6a83c LP |
998 | clocks = <&mstp7_clks R8A7790_CLK_DU0>, |
999 | <&mstp7_clks R8A7790_CLK_DU1>, | |
1000 | <&mstp7_clks R8A7790_CLK_DU2>, | |
1001 | <&mstp7_clks R8A7790_CLK_LVDS0>, | |
1002 | <&mstp7_clks R8A7790_CLK_LVDS1>; | |
1003 | clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1"; | |
1004 | status = "disabled"; | |
1005 | ||
1006 | ports { | |
1007 | #address-cells = <1>; | |
1008 | #size-cells = <0>; | |
1009 | ||
1010 | port@0 { | |
1011 | reg = <0>; | |
1012 | du_out_rgb: endpoint { | |
1013 | }; | |
1014 | }; | |
1015 | port@1 { | |
1016 | reg = <1>; | |
1017 | du_out_lvds0: endpoint { | |
1018 | }; | |
1019 | }; | |
1020 | port@2 { | |
1021 | reg = <2>; | |
1022 | du_out_lvds1: endpoint { | |
1023 | }; | |
1024 | }; | |
1025 | }; | |
1026 | }; | |
1027 | ||
6a7742b4 | 1028 | can0: can@e6e80000 { |
28e941de | 1029 | compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can"; |
6a7742b4 | 1030 | reg = <0 0xe6e80000 0 0x1000>; |
3abb4d5f | 1031 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; |
6a7742b4 SS |
1032 | clocks = <&mstp9_clks R8A7790_CLK_RCAN0>, |
1033 | <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>; | |
1034 | clock-names = "clkp1", "clkp2", "can_clk"; | |
36ee3c27 | 1035 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
6a7742b4 SS |
1036 | status = "disabled"; |
1037 | }; | |
1038 | ||
1039 | can1: can@e6e88000 { | |
28e941de | 1040 | compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can"; |
6a7742b4 | 1041 | reg = <0 0xe6e88000 0 0x1000>; |
3abb4d5f | 1042 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; |
6a7742b4 SS |
1043 | clocks = <&mstp9_clks R8A7790_CLK_RCAN1>, |
1044 | <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>; | |
1045 | clock-names = "clkp1", "clkp2", "can_clk"; | |
36ee3c27 | 1046 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
6a7742b4 SS |
1047 | status = "disabled"; |
1048 | }; | |
1049 | ||
fb847575 | 1050 | jpu: jpeg-codec@fe980000 { |
1c4b68fd | 1051 | compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu"; |
fb847575 | 1052 | reg = <0 0xfe980000 0 0x10300>; |
3abb4d5f | 1053 | interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; |
fb847575 | 1054 | clocks = <&mstp1_clks R8A7790_CLK_JPU>; |
36ee3c27 | 1055 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
fb847575 MU |
1056 | }; |
1057 | ||
22a1f595 LP |
1058 | clocks { |
1059 | #address-cells = <2>; | |
1060 | #size-cells = <2>; | |
1061 | ranges; | |
1062 | ||
1063 | /* External root clock */ | |
b19dd47b | 1064 | extal_clk: extal { |
22a1f595 LP |
1065 | compatible = "fixed-clock"; |
1066 | #clock-cells = <0>; | |
1067 | /* This value must be overriden by the board. */ | |
1068 | clock-frequency = <0>; | |
22a1f595 LP |
1069 | }; |
1070 | ||
51d17918 | 1071 | /* External PCIe clock - can be overridden by the board */ |
b19dd47b | 1072 | pcie_bus_clk: pcie_bus { |
51d17918 PE |
1073 | compatible = "fixed-clock"; |
1074 | #clock-cells = <0>; | |
03adc181 | 1075 | clock-frequency = <0>; |
51d17918 PE |
1076 | }; |
1077 | ||
c7c2ec3a KM |
1078 | /* |
1079 | * The external audio clocks are configured as 0 Hz fixed frequency clocks by | |
1080 | * default. Boards that provide audio clocks should override them. | |
1081 | */ | |
1082 | audio_clk_a: audio_clk_a { | |
1083 | compatible = "fixed-clock"; | |
1084 | #clock-cells = <0>; | |
1085 | clock-frequency = <0>; | |
c7c2ec3a KM |
1086 | }; |
1087 | audio_clk_b: audio_clk_b { | |
1088 | compatible = "fixed-clock"; | |
1089 | #clock-cells = <0>; | |
1090 | clock-frequency = <0>; | |
c7c2ec3a KM |
1091 | }; |
1092 | audio_clk_c: audio_clk_c { | |
1093 | compatible = "fixed-clock"; | |
1094 | #clock-cells = <0>; | |
1095 | clock-frequency = <0>; | |
c7c2ec3a KM |
1096 | }; |
1097 | ||
42af65e8 GU |
1098 | /* External SCIF clock */ |
1099 | scif_clk: scif { | |
1100 | compatible = "fixed-clock"; | |
1101 | #clock-cells = <0>; | |
1102 | /* This value must be overridden by the board. */ | |
1103 | clock-frequency = <0>; | |
42af65e8 GU |
1104 | }; |
1105 | ||
41650f40 | 1106 | /* External USB clock - can be overridden by the board */ |
b19dd47b | 1107 | usb_extal_clk: usb_extal { |
41650f40 SS |
1108 | compatible = "fixed-clock"; |
1109 | #clock-cells = <0>; | |
1110 | clock-frequency = <48000000>; | |
41650f40 SS |
1111 | }; |
1112 | ||
1113 | /* External CAN clock */ | |
5b476a96 | 1114 | can_clk: can { |
41650f40 SS |
1115 | compatible = "fixed-clock"; |
1116 | #clock-cells = <0>; | |
1117 | /* This value must be overridden by the board. */ | |
1118 | clock-frequency = <0>; | |
41650f40 SS |
1119 | }; |
1120 | ||
22a1f595 LP |
1121 | /* Special CPG clocks */ |
1122 | cpg_clocks: cpg_clocks@e6150000 { | |
1123 | compatible = "renesas,r8a7790-cpg-clocks", | |
1124 | "renesas,rcar-gen2-cpg-clocks"; | |
1125 | reg = <0 0xe6150000 0 0x1000>; | |
41650f40 | 1126 | clocks = <&extal_clk &usb_extal_clk>; |
22a1f595 LP |
1127 | #clock-cells = <1>; |
1128 | clock-output-names = "main", "pll0", "pll1", "pll3", | |
1129 | "lb", "qspi", "sdh", "sd0", "sd1", | |
3453ca9e | 1130 | "z", "rcan", "adsp"; |
484adb00 | 1131 | #power-domain-cells = <0>; |
22a1f595 LP |
1132 | }; |
1133 | ||
1134 | /* Variable factor clocks */ | |
b19dd47b | 1135 | sd2_clk: sd2@e6150078 { |
22a1f595 LP |
1136 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
1137 | reg = <0 0xe6150078 0 4>; | |
1138 | clocks = <&pll1_div2_clk>; | |
1139 | #clock-cells = <0>; | |
22a1f595 | 1140 | }; |
b19dd47b | 1141 | sd3_clk: sd3@e615026c { |
22a1f595 | 1142 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
edd7b938 | 1143 | reg = <0 0xe615026c 0 4>; |
22a1f595 LP |
1144 | clocks = <&pll1_div2_clk>; |
1145 | #clock-cells = <0>; | |
22a1f595 | 1146 | }; |
b19dd47b | 1147 | mmc0_clk: mmc0@e6150240 { |
22a1f595 LP |
1148 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
1149 | reg = <0 0xe6150240 0 4>; | |
1150 | clocks = <&pll1_div2_clk>; | |
1151 | #clock-cells = <0>; | |
22a1f595 | 1152 | }; |
b19dd47b | 1153 | mmc1_clk: mmc1@e6150244 { |
22a1f595 LP |
1154 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
1155 | reg = <0 0xe6150244 0 4>; | |
1156 | clocks = <&pll1_div2_clk>; | |
1157 | #clock-cells = <0>; | |
22a1f595 | 1158 | }; |
b19dd47b | 1159 | ssp_clk: ssp@e6150248 { |
22a1f595 LP |
1160 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
1161 | reg = <0 0xe6150248 0 4>; | |
1162 | clocks = <&pll1_div2_clk>; | |
1163 | #clock-cells = <0>; | |
22a1f595 | 1164 | }; |
b19dd47b | 1165 | ssprs_clk: ssprs@e615024c { |
22a1f595 LP |
1166 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
1167 | reg = <0 0xe615024c 0 4>; | |
1168 | clocks = <&pll1_div2_clk>; | |
1169 | #clock-cells = <0>; | |
22a1f595 LP |
1170 | }; |
1171 | ||
1172 | /* Fixed factor clocks */ | |
b19dd47b | 1173 | pll1_div2_clk: pll1_div2 { |
22a1f595 LP |
1174 | compatible = "fixed-factor-clock"; |
1175 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1176 | #clock-cells = <0>; | |
1177 | clock-div = <2>; | |
1178 | clock-mult = <1>; | |
22a1f595 | 1179 | }; |
b19dd47b | 1180 | z2_clk: z2 { |
22a1f595 LP |
1181 | compatible = "fixed-factor-clock"; |
1182 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1183 | #clock-cells = <0>; | |
1184 | clock-div = <2>; | |
1185 | clock-mult = <1>; | |
22a1f595 | 1186 | }; |
b19dd47b | 1187 | zg_clk: zg { |
22a1f595 LP |
1188 | compatible = "fixed-factor-clock"; |
1189 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1190 | #clock-cells = <0>; | |
1191 | clock-div = <3>; | |
1192 | clock-mult = <1>; | |
22a1f595 | 1193 | }; |
b19dd47b | 1194 | zx_clk: zx { |
22a1f595 LP |
1195 | compatible = "fixed-factor-clock"; |
1196 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1197 | #clock-cells = <0>; | |
1198 | clock-div = <3>; | |
1199 | clock-mult = <1>; | |
22a1f595 | 1200 | }; |
b19dd47b | 1201 | zs_clk: zs { |
22a1f595 LP |
1202 | compatible = "fixed-factor-clock"; |
1203 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1204 | #clock-cells = <0>; | |
1205 | clock-div = <6>; | |
1206 | clock-mult = <1>; | |
22a1f595 | 1207 | }; |
b19dd47b | 1208 | hp_clk: hp { |
22a1f595 LP |
1209 | compatible = "fixed-factor-clock"; |
1210 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1211 | #clock-cells = <0>; | |
1212 | clock-div = <12>; | |
1213 | clock-mult = <1>; | |
22a1f595 | 1214 | }; |
b19dd47b | 1215 | i_clk: i { |
22a1f595 LP |
1216 | compatible = "fixed-factor-clock"; |
1217 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1218 | #clock-cells = <0>; | |
1219 | clock-div = <2>; | |
1220 | clock-mult = <1>; | |
22a1f595 | 1221 | }; |
b19dd47b | 1222 | b_clk: b { |
22a1f595 LP |
1223 | compatible = "fixed-factor-clock"; |
1224 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1225 | #clock-cells = <0>; | |
1226 | clock-div = <12>; | |
1227 | clock-mult = <1>; | |
22a1f595 | 1228 | }; |
b19dd47b | 1229 | p_clk: p { |
22a1f595 LP |
1230 | compatible = "fixed-factor-clock"; |
1231 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1232 | #clock-cells = <0>; | |
1233 | clock-div = <24>; | |
1234 | clock-mult = <1>; | |
22a1f595 | 1235 | }; |
b19dd47b | 1236 | cl_clk: cl { |
22a1f595 LP |
1237 | compatible = "fixed-factor-clock"; |
1238 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1239 | #clock-cells = <0>; | |
1240 | clock-div = <48>; | |
1241 | clock-mult = <1>; | |
22a1f595 | 1242 | }; |
b19dd47b | 1243 | m2_clk: m2 { |
22a1f595 LP |
1244 | compatible = "fixed-factor-clock"; |
1245 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1246 | #clock-cells = <0>; | |
1247 | clock-div = <8>; | |
1248 | clock-mult = <1>; | |
22a1f595 | 1249 | }; |
b19dd47b | 1250 | imp_clk: imp { |
22a1f595 LP |
1251 | compatible = "fixed-factor-clock"; |
1252 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1253 | #clock-cells = <0>; | |
1254 | clock-div = <4>; | |
1255 | clock-mult = <1>; | |
22a1f595 | 1256 | }; |
b19dd47b | 1257 | rclk_clk: rclk { |
22a1f595 LP |
1258 | compatible = "fixed-factor-clock"; |
1259 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1260 | #clock-cells = <0>; | |
1261 | clock-div = <(48 * 1024)>; | |
1262 | clock-mult = <1>; | |
22a1f595 | 1263 | }; |
b19dd47b | 1264 | oscclk_clk: oscclk { |
22a1f595 LP |
1265 | compatible = "fixed-factor-clock"; |
1266 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
1267 | #clock-cells = <0>; | |
1268 | clock-div = <(12 * 1024)>; | |
1269 | clock-mult = <1>; | |
22a1f595 | 1270 | }; |
b19dd47b | 1271 | zb3_clk: zb3 { |
22a1f595 LP |
1272 | compatible = "fixed-factor-clock"; |
1273 | clocks = <&cpg_clocks R8A7790_CLK_PLL3>; | |
1274 | #clock-cells = <0>; | |
1275 | clock-div = <4>; | |
1276 | clock-mult = <1>; | |
22a1f595 | 1277 | }; |
b19dd47b | 1278 | zb3d2_clk: zb3d2 { |
22a1f595 LP |
1279 | compatible = "fixed-factor-clock"; |
1280 | clocks = <&cpg_clocks R8A7790_CLK_PLL3>; | |
1281 | #clock-cells = <0>; | |
1282 | clock-div = <8>; | |
1283 | clock-mult = <1>; | |
22a1f595 | 1284 | }; |
b19dd47b | 1285 | ddr_clk: ddr { |
22a1f595 LP |
1286 | compatible = "fixed-factor-clock"; |
1287 | clocks = <&cpg_clocks R8A7790_CLK_PLL3>; | |
1288 | #clock-cells = <0>; | |
1289 | clock-div = <8>; | |
1290 | clock-mult = <1>; | |
22a1f595 | 1291 | }; |
b19dd47b | 1292 | mp_clk: mp { |
22a1f595 LP |
1293 | compatible = "fixed-factor-clock"; |
1294 | clocks = <&pll1_div2_clk>; | |
1295 | #clock-cells = <0>; | |
1296 | clock-div = <15>; | |
1297 | clock-mult = <1>; | |
22a1f595 | 1298 | }; |
b19dd47b | 1299 | cp_clk: cp { |
22a1f595 LP |
1300 | compatible = "fixed-factor-clock"; |
1301 | clocks = <&extal_clk>; | |
1302 | #clock-cells = <0>; | |
1303 | clock-div = <2>; | |
1304 | clock-mult = <1>; | |
22a1f595 LP |
1305 | }; |
1306 | ||
1307 | /* Gate clocks */ | |
9d90951a LP |
1308 | mstp0_clks: mstp0_clks@e6150130 { |
1309 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1310 | reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>; | |
1311 | clocks = <&mp_clk>; | |
1312 | #clock-cells = <1>; | |
b54010af | 1313 | clock-indices = <R8A7790_CLK_MSIOF0>; |
9d90951a LP |
1314 | clock-output-names = "msiof0"; |
1315 | }; | |
22a1f595 LP |
1316 | mstp1_clks: mstp1_clks@e6150134 { |
1317 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1318 | reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; | |
4ba8f246 YH |
1319 | clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&m2_clk>, |
1320 | <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>, <&zs_clk>, | |
1321 | <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, | |
1322 | <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>; | |
22a1f595 | 1323 | #clock-cells = <1>; |
b54010af | 1324 | clock-indices = < |
4ba8f246 YH |
1325 | R8A7790_CLK_VCP1 R8A7790_CLK_VCP0 R8A7790_CLK_VPC1 |
1326 | R8A7790_CLK_VPC0 R8A7790_CLK_JPU R8A7790_CLK_SSP1 | |
1327 | R8A7790_CLK_TMU1 R8A7790_CLK_3DG R8A7790_CLK_2DDMAC | |
1328 | R8A7790_CLK_FDP1_2 R8A7790_CLK_FDP1_1 R8A7790_CLK_FDP1_0 | |
1329 | R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 R8A7790_CLK_CMT0 | |
1330 | R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 R8A7790_CLK_VSP1_DU0 | |
1331 | R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S | |
22a1f595 LP |
1332 | >; |
1333 | clock-output-names = | |
4ba8f246 YH |
1334 | "vcp1", "vcp0", "vpc1", "vpc0", "jpu", "ssp1", |
1335 | "tmu1", "3dg", "2ddmac", "fdp1-2", "fdp1-1", | |
1336 | "fdp1-0", "tmu3", "tmu2", "cmt0", "tmu0", | |
2284ff5f | 1337 | "vsp1-du1", "vsp1-du0", "vsp1-rt", "vsp1-sy"; |
22a1f595 LP |
1338 | }; |
1339 | mstp2_clks: mstp2_clks@e6150138 { | |
1340 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1341 | reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; | |
1342 | clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, | |
c819acda LP |
1343 | <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&zs_clk>, |
1344 | <&zs_clk>; | |
22a1f595 | 1345 | #clock-cells = <1>; |
b54010af | 1346 | clock-indices = < |
22a1f595 | 1347 | R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0 |
9d90951a LP |
1348 | R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1 |
1349 | R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3 R8A7790_CLK_SCIFB2 | |
c819acda | 1350 | R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0 |
22a1f595 LP |
1351 | >; |
1352 | clock-output-names = | |
9d90951a | 1353 | "scifa2", "scifa1", "scifa0", "msiof2", "scifb0", |
c819acda LP |
1354 | "scifb1", "msiof1", "msiof3", "scifb2", |
1355 | "sys-dmac1", "sys-dmac0"; | |
22a1f595 LP |
1356 | }; |
1357 | mstp3_clks: mstp3_clks@e615013c { | |
1358 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1359 | reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; | |
38805823 | 1360 | clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&p_clk>, <&sd3_clk>, |
17465149 | 1361 | <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>, |
b02ce79f YS |
1362 | <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>, |
1363 | <&hp_clk>, <&hp_clk>; | |
22a1f595 | 1364 | #clock-cells = <1>; |
b54010af | 1365 | clock-indices = < |
38805823 | 1366 | R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SCIF2 R8A7790_CLK_SDHI3 |
17465149 | 1367 | R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0 |
ecafea8c | 1368 | R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1 |
b02ce79f | 1369 | R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1 |
22a1f595 LP |
1370 | >; |
1371 | clock-output-names = | |
38805823 | 1372 | "iic2", "tpu0", "mmcif1", "scif2", "sdhi3", |
17465149 | 1373 | "sdhi2", "sdhi1", "sdhi0", "mmcif0", |
b02ce79f YS |
1374 | "iic0", "pciec", "iic1", "ssusb", "cmt1", |
1375 | "usbdmac0", "usbdmac1"; | |
22a1f595 | 1376 | }; |
61624caf GU |
1377 | mstp4_clks: mstp4_clks@e6150140 { |
1378 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1379 | reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>; | |
9e585236 | 1380 | clocks = <&cp_clk>, <&zs_clk>; |
61624caf | 1381 | #clock-cells = <1>; |
9e585236 GU |
1382 | clock-indices = <R8A7790_CLK_IRQC R8A7790_CLK_INTC_SYS>; |
1383 | clock-output-names = "irqc", "intc-sys"; | |
61624caf | 1384 | }; |
22a1f595 LP |
1385 | mstp5_clks: mstp5_clks@e6150144 { |
1386 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1387 | reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; | |
3453ca9e SS |
1388 | clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7790_CLK_ADSP>, |
1389 | <&extal_clk>, <&p_clk>; | |
22a1f595 | 1390 | #clock-cells = <1>; |
b54010af BD |
1391 | clock-indices = < |
1392 | R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1 | |
3453ca9e SS |
1393 | R8A7790_CLK_ADSP_MOD R8A7790_CLK_THERMAL |
1394 | R8A7790_CLK_PWM | |
b54010af | 1395 | >; |
3453ca9e SS |
1396 | clock-output-names = "audmac0", "audmac1", "adsp_mod", |
1397 | "thermal", "pwm"; | |
22a1f595 LP |
1398 | }; |
1399 | mstp7_clks: mstp7_clks@e615014c { | |
1400 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1401 | reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; | |
b621f6d4 | 1402 | clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>, |
22a1f595 LP |
1403 | <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, |
1404 | <&zx_clk>; | |
1405 | #clock-cells = <1>; | |
b54010af | 1406 | clock-indices = < |
22a1f595 LP |
1407 | R8A7790_CLK_EHCI R8A7790_CLK_HSUSB R8A7790_CLK_HSCIF1 |
1408 | R8A7790_CLK_HSCIF0 R8A7790_CLK_SCIF1 R8A7790_CLK_SCIF0 | |
1409 | R8A7790_CLK_DU2 R8A7790_CLK_DU1 R8A7790_CLK_DU0 | |
1410 | R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0 | |
1411 | >; | |
1412 | clock-output-names = | |
1413 | "ehci", "hsusb", "hscif1", "hscif0", "scif1", | |
1414 | "scif0", "du2", "du1", "du0", "lvds1", "lvds0"; | |
1415 | }; | |
1416 | mstp8_clks: mstp8_clks@e6150990 { | |
1417 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1418 | reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; | |
f6b5dd40 | 1419 | clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, |
63d2d750 SS |
1420 | <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>, |
1421 | <&zs_clk>; | |
22a1f595 | 1422 | #clock-cells = <1>; |
b54010af | 1423 | clock-indices = < |
f6b5dd40 | 1424 | R8A7790_CLK_MLB R8A7790_CLK_VIN3 R8A7790_CLK_VIN2 |
63d2d750 SS |
1425 | R8A7790_CLK_VIN1 R8A7790_CLK_VIN0 |
1426 | R8A7790_CLK_ETHERAVB R8A7790_CLK_ETHER | |
f6b5dd40 | 1427 | R8A7790_CLK_SATA1 R8A7790_CLK_SATA0 |
3f2beaa9 | 1428 | >; |
bccccc3d | 1429 | clock-output-names = |
63d2d750 SS |
1430 | "mlb", "vin3", "vin2", "vin1", "vin0", |
1431 | "etheravb", "ether", "sata1", "sata0"; | |
22a1f595 LP |
1432 | }; |
1433 | mstp9_clks: mstp9_clks@e6150994 { | |
1434 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1435 | reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; | |
81f6883f GU |
1436 | clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, |
1437 | <&cp_clk>, <&cp_clk>, <&cp_clk>, | |
1438 | <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>, | |
3672b059 | 1439 | <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; |
22a1f595 | 1440 | #clock-cells = <1>; |
b54010af | 1441 | clock-indices = < |
81f6883f GU |
1442 | R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3 |
1443 | R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0 | |
17465149 WS |
1444 | R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS |
1445 | R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0 | |
22a1f595 | 1446 | >; |
91b56ca1 | 1447 | clock-output-names = |
81f6883f | 1448 | "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", |
17465149 WS |
1449 | "rcan1", "rcan0", "qspi_mod", "iic3", |
1450 | "i2c3", "i2c2", "i2c1", "i2c0"; | |
22a1f595 | 1451 | }; |
bcde3722 KM |
1452 | mstp10_clks: mstp10_clks@e6150998 { |
1453 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1454 | reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; | |
1455 | clocks = <&p_clk>, | |
d13d4e06 GU |
1456 | <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>, |
1457 | <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>, | |
1458 | <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>, | |
1459 | <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>, | |
1460 | <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>, | |
bcde3722 KM |
1461 | <&p_clk>, |
1462 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
1463 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
1464 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
1465 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
1466 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
a7163784 | 1467 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, |
bcde3722 KM |
1468 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>; |
1469 | ||
1470 | #clock-cells = <1>; | |
1471 | clock-indices = < | |
1472 | R8A7790_CLK_SSI_ALL | |
1473 | R8A7790_CLK_SSI9 R8A7790_CLK_SSI8 R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5 | |
1474 | R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 R8A7790_CLK_SSI1 R8A7790_CLK_SSI0 | |
1475 | R8A7790_CLK_SCU_ALL | |
1476 | R8A7790_CLK_SCU_DVC1 R8A7790_CLK_SCU_DVC0 | |
a7163784 | 1477 | R8A7790_CLK_SCU_CTU1_MIX1 R8A7790_CLK_SCU_CTU0_MIX0 |
bcde3722 KM |
1478 | R8A7790_CLK_SCU_SRC9 R8A7790_CLK_SCU_SRC8 R8A7790_CLK_SCU_SRC7 R8A7790_CLK_SCU_SRC6 R8A7790_CLK_SCU_SRC5 |
1479 | R8A7790_CLK_SCU_SRC4 R8A7790_CLK_SCU_SRC3 R8A7790_CLK_SCU_SRC2 R8A7790_CLK_SCU_SRC1 R8A7790_CLK_SCU_SRC0 | |
1480 | >; | |
1481 | clock-output-names = | |
1482 | "ssi-all", | |
1483 | "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", | |
1484 | "ssi4", "ssi3", "ssi2", "ssi1", "ssi0", | |
1485 | "scu-all", | |
1486 | "scu-dvc1", "scu-dvc0", | |
a7163784 | 1487 | "scu-ctu1-mix1", "scu-ctu0-mix0", |
bcde3722 KM |
1488 | "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5", |
1489 | "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0"; | |
1490 | }; | |
22a1f595 | 1491 | }; |
7053e134 | 1492 | |
328f39b8 GU |
1493 | prr: chipid@ff000044 { |
1494 | compatible = "renesas,prr"; | |
1495 | reg = <0 0xff000044 0 4>; | |
1496 | }; | |
1497 | ||
dd2b267b GU |
1498 | rst: reset-controller@e6160000 { |
1499 | compatible = "renesas,r8a7790-rst"; | |
1500 | reg = <0 0xe6160000 0 0x0100>; | |
1501 | }; | |
1502 | ||
4c8eb3c8 GU |
1503 | sysc: system-controller@e6180000 { |
1504 | compatible = "renesas,r8a7790-sysc"; | |
1505 | reg = <0 0xe6180000 0 0x0200>; | |
1506 | #power-domain-cells = <1>; | |
1507 | }; | |
1508 | ||
fad6d45c | 1509 | qspi: spi@e6b10000 { |
7053e134 GU |
1510 | compatible = "renesas,qspi-r8a7790", "renesas,qspi"; |
1511 | reg = <0 0xe6b10000 0 0x2c>; | |
3abb4d5f | 1512 | interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; |
7053e134 | 1513 | clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>; |
badf8570 NS |
1514 | dmas = <&dmac0 0x17>, <&dmac0 0x18>, |
1515 | <&dmac1 0x17>, <&dmac1 0x18>; | |
1516 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1517 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
7053e134 GU |
1518 | num-cs = <1>; |
1519 | #address-cells = <1>; | |
1520 | #size-cells = <0>; | |
1521 | status = "disabled"; | |
1522 | }; | |
ae8a6146 GU |
1523 | |
1524 | msiof0: spi@e6e20000 { | |
654450ba SH |
1525 | compatible = "renesas,msiof-r8a7790", |
1526 | "renesas,rcar-gen2-msiof"; | |
c7d1f08a | 1527 | reg = <0 0xe6e20000 0 0x0064>; |
3abb4d5f | 1528 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; |
ae8a6146 | 1529 | clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>; |
badf8570 NS |
1530 | dmas = <&dmac0 0x51>, <&dmac0 0x52>, |
1531 | <&dmac1 0x51>, <&dmac1 0x52>; | |
1532 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1533 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ae8a6146 GU |
1534 | #address-cells = <1>; |
1535 | #size-cells = <0>; | |
1536 | status = "disabled"; | |
1537 | }; | |
1538 | ||
1539 | msiof1: spi@e6e10000 { | |
654450ba SH |
1540 | compatible = "renesas,msiof-r8a7790", |
1541 | "renesas,rcar-gen2-msiof"; | |
c7d1f08a | 1542 | reg = <0 0xe6e10000 0 0x0064>; |
3abb4d5f | 1543 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; |
ae8a6146 | 1544 | clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>; |
badf8570 NS |
1545 | dmas = <&dmac0 0x55>, <&dmac0 0x56>, |
1546 | <&dmac1 0x55>, <&dmac1 0x56>; | |
1547 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1548 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ae8a6146 GU |
1549 | #address-cells = <1>; |
1550 | #size-cells = <0>; | |
1551 | status = "disabled"; | |
1552 | }; | |
1553 | ||
1554 | msiof2: spi@e6e00000 { | |
654450ba SH |
1555 | compatible = "renesas,msiof-r8a7790", |
1556 | "renesas,rcar-gen2-msiof"; | |
c7d1f08a | 1557 | reg = <0 0xe6e00000 0 0x0064>; |
3abb4d5f | 1558 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; |
ae8a6146 | 1559 | clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>; |
badf8570 NS |
1560 | dmas = <&dmac0 0x41>, <&dmac0 0x42>, |
1561 | <&dmac1 0x41>, <&dmac1 0x42>; | |
1562 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1563 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ae8a6146 GU |
1564 | #address-cells = <1>; |
1565 | #size-cells = <0>; | |
1566 | status = "disabled"; | |
1567 | }; | |
1568 | ||
1569 | msiof3: spi@e6c90000 { | |
654450ba SH |
1570 | compatible = "renesas,msiof-r8a7790", |
1571 | "renesas,rcar-gen2-msiof"; | |
c7d1f08a | 1572 | reg = <0 0xe6c90000 0 0x0064>; |
3abb4d5f | 1573 | interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; |
ae8a6146 | 1574 | clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>; |
badf8570 NS |
1575 | dmas = <&dmac0 0x45>, <&dmac0 0x46>, |
1576 | <&dmac1 0x45>, <&dmac1 0x46>; | |
1577 | dma-names = "tx", "rx", "tx", "rx"; | |
36ee3c27 | 1578 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ae8a6146 GU |
1579 | #address-cells = <1>; |
1580 | #size-cells = <0>; | |
1581 | status = "disabled"; | |
1582 | }; | |
7df2fd57 | 1583 | |
157fcd8a | 1584 | xhci: usb@ee000000 { |
92cc7798 | 1585 | compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci"; |
157fcd8a | 1586 | reg = <0 0xee000000 0 0xc00>; |
3abb4d5f | 1587 | interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; |
157fcd8a | 1588 | clocks = <&mstp3_clks R8A7790_CLK_SSUSB>; |
36ee3c27 | 1589 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
157fcd8a YS |
1590 | phys = <&usb2 1>; |
1591 | phy-names = "usb"; | |
1592 | status = "disabled"; | |
1593 | }; | |
1594 | ||
ff4f3eb8 | 1595 | pci0: pci@ee090000 { |
2d82c144 | 1596 | compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; |
ff4f3eb8 | 1597 | device_type = "pci"; |
ff4f3eb8 BD |
1598 | reg = <0 0xee090000 0 0xc00>, |
1599 | <0 0xee080000 0 0x1100>; | |
3abb4d5f | 1600 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
484adb00 | 1601 | clocks = <&mstp7_clks R8A7790_CLK_EHCI>; |
36ee3c27 | 1602 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ff4f3eb8 BD |
1603 | status = "disabled"; |
1604 | ||
1605 | bus-range = <0 0>; | |
1606 | #address-cells = <3>; | |
1607 | #size-cells = <2>; | |
1608 | #interrupt-cells = <1>; | |
1609 | ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; | |
1610 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
3abb4d5f SH |
1611 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH |
1612 | 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH | |
1613 | 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
538c40e5 | 1614 | |
f7d569c1 | 1615 | usb@1,0 { |
538c40e5 | 1616 | reg = <0x800 0 0 0 0>; |
538c40e5 SS |
1617 | phys = <&usb0 0>; |
1618 | phy-names = "usb"; | |
1619 | }; | |
1620 | ||
f7d569c1 | 1621 | usb@2,0 { |
538c40e5 | 1622 | reg = <0x1000 0 0 0 0>; |
538c40e5 SS |
1623 | phys = <&usb0 0>; |
1624 | phy-names = "usb"; | |
1625 | }; | |
ff4f3eb8 BD |
1626 | }; |
1627 | ||
1628 | pci1: pci@ee0b0000 { | |
2d82c144 | 1629 | compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; |
ff4f3eb8 | 1630 | device_type = "pci"; |
ff4f3eb8 BD |
1631 | reg = <0 0xee0b0000 0 0xc00>, |
1632 | <0 0xee0a0000 0 0x1100>; | |
3abb4d5f | 1633 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; |
484adb00 | 1634 | clocks = <&mstp7_clks R8A7790_CLK_EHCI>; |
36ee3c27 | 1635 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ff4f3eb8 BD |
1636 | status = "disabled"; |
1637 | ||
1638 | bus-range = <1 1>; | |
1639 | #address-cells = <3>; | |
1640 | #size-cells = <2>; | |
1641 | #interrupt-cells = <1>; | |
1642 | ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>; | |
1643 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
3abb4d5f SH |
1644 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH |
1645 | 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH | |
1646 | 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; | |
ff4f3eb8 BD |
1647 | }; |
1648 | ||
1649 | pci2: pci@ee0d0000 { | |
2d82c144 | 1650 | compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; |
ff4f3eb8 BD |
1651 | device_type = "pci"; |
1652 | clocks = <&mstp7_clks R8A7790_CLK_EHCI>; | |
36ee3c27 | 1653 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
ff4f3eb8 BD |
1654 | reg = <0 0xee0d0000 0 0xc00>, |
1655 | <0 0xee0c0000 0 0x1100>; | |
3abb4d5f | 1656 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; |
ff4f3eb8 BD |
1657 | status = "disabled"; |
1658 | ||
1659 | bus-range = <2 2>; | |
1660 | #address-cells = <3>; | |
1661 | #size-cells = <2>; | |
1662 | #interrupt-cells = <1>; | |
1663 | ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; | |
1664 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
3abb4d5f SH |
1665 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH |
1666 | 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH | |
1667 | 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; | |
538c40e5 | 1668 | |
f7d569c1 RH |
1669 | usb@1,0 { |
1670 | reg = <0x20800 0 0 0 0>; | |
538c40e5 SS |
1671 | phys = <&usb2 0>; |
1672 | phy-names = "usb"; | |
1673 | }; | |
1674 | ||
f7d569c1 RH |
1675 | usb@2,0 { |
1676 | reg = <0x21000 0 0 0 0>; | |
538c40e5 SS |
1677 | phys = <&usb2 0>; |
1678 | phy-names = "usb"; | |
1679 | }; | |
ff4f3eb8 BD |
1680 | }; |
1681 | ||
745329d2 | 1682 | pciec: pcie@fe000000 { |
e670be8d | 1683 | compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2"; |
745329d2 PE |
1684 | reg = <0 0xfe000000 0 0x80000>; |
1685 | #address-cells = <3>; | |
1686 | #size-cells = <2>; | |
1687 | bus-range = <0x00 0xff>; | |
1688 | device_type = "pci"; | |
1689 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 | |
1690 | 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 | |
1691 | 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 | |
1692 | 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; | |
1693 | /* Map all possible DDR as inbound ranges */ | |
1694 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 | |
1695 | 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>; | |
3abb4d5f SH |
1696 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, |
1697 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, | |
1698 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; | |
745329d2 PE |
1699 | #interrupt-cells = <1>; |
1700 | interrupt-map-mask = <0 0 0 0>; | |
3abb4d5f | 1701 | interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; |
745329d2 PE |
1702 | clocks = <&mstp3_clks R8A7790_CLK_PCIEC>, <&pcie_bus_clk>; |
1703 | clock-names = "pcie", "pcie_bus"; | |
36ee3c27 | 1704 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
745329d2 PE |
1705 | status = "disabled"; |
1706 | }; | |
1707 | ||
b694e380 | 1708 | rcar_sound: sound@ec500000 { |
ad63241c KM |
1709 | /* |
1710 | * #sound-dai-cells is required | |
1711 | * | |
1712 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
1713 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
1714 | */ | |
31078ecd | 1715 | compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2"; |
7df2fd57 KM |
1716 | reg = <0 0xec500000 0 0x1000>, /* SCU */ |
1717 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
1718 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
4bc4a205 | 1719 | <0 0xec541000 0 0x280>, /* SSI */ |
0c602677 KM |
1720 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ |
1721 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
46a158f2 | 1722 | |
7df2fd57 KM |
1723 | clocks = <&mstp10_clks R8A7790_CLK_SSI_ALL>, |
1724 | <&mstp10_clks R8A7790_CLK_SSI9>, <&mstp10_clks R8A7790_CLK_SSI8>, | |
1725 | <&mstp10_clks R8A7790_CLK_SSI7>, <&mstp10_clks R8A7790_CLK_SSI6>, | |
1726 | <&mstp10_clks R8A7790_CLK_SSI5>, <&mstp10_clks R8A7790_CLK_SSI4>, | |
1727 | <&mstp10_clks R8A7790_CLK_SSI3>, <&mstp10_clks R8A7790_CLK_SSI2>, | |
1728 | <&mstp10_clks R8A7790_CLK_SSI1>, <&mstp10_clks R8A7790_CLK_SSI0>, | |
1729 | <&mstp10_clks R8A7790_CLK_SCU_SRC9>, <&mstp10_clks R8A7790_CLK_SCU_SRC8>, | |
1730 | <&mstp10_clks R8A7790_CLK_SCU_SRC7>, <&mstp10_clks R8A7790_CLK_SCU_SRC6>, | |
1731 | <&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>, | |
1732 | <&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>, | |
1733 | <&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>, | |
a7163784 | 1734 | <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>, |
fc67bf42 | 1735 | <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>, |
334d69a2 | 1736 | <&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>, |
7df2fd57 KM |
1737 | <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>; |
1738 | clock-names = "ssi-all", | |
1739 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", | |
1740 | "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", | |
1741 | "src.9", "src.8", "src.7", "src.6", "src.5", | |
1742 | "src.4", "src.3", "src.2", "src.1", "src.0", | |
a7163784 | 1743 | "ctu.0", "ctu.1", |
fc67bf42 | 1744 | "mix.0", "mix.1", |
334d69a2 | 1745 | "dvc.0", "dvc.1", |
7df2fd57 | 1746 | "clk_a", "clk_b", "clk_c", "clk_i"; |
36ee3c27 | 1747 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
7df2fd57 KM |
1748 | |
1749 | status = "disabled"; | |
1750 | ||
334d69a2 | 1751 | rcar_sound,dvc { |
2c3de367 | 1752 | dvc0: dvc-0 { |
c4a59df9 | 1753 | dmas = <&audma1 0xbc>; |
118a5093 KM |
1754 | dma-names = "tx"; |
1755 | }; | |
2c3de367 | 1756 | dvc1: dvc-1 { |
c4a59df9 | 1757 | dmas = <&audma1 0xbe>; |
118a5093 KM |
1758 | dma-names = "tx"; |
1759 | }; | |
334d69a2 KM |
1760 | }; |
1761 | ||
fc67bf42 | 1762 | rcar_sound,mix { |
2c3de367 GU |
1763 | mix0: mix-0 { }; |
1764 | mix1: mix-1 { }; | |
fc67bf42 KM |
1765 | }; |
1766 | ||
a7163784 | 1767 | rcar_sound,ctu { |
2c3de367 GU |
1768 | ctu00: ctu-0 { }; |
1769 | ctu01: ctu-1 { }; | |
1770 | ctu02: ctu-2 { }; | |
1771 | ctu03: ctu-3 { }; | |
1772 | ctu10: ctu-4 { }; | |
1773 | ctu11: ctu-5 { }; | |
1774 | ctu12: ctu-6 { }; | |
1775 | ctu13: ctu-7 { }; | |
a7163784 KM |
1776 | }; |
1777 | ||
7df2fd57 | 1778 | rcar_sound,src { |
2c3de367 | 1779 | src0: src-0 { |
3abb4d5f | 1780 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1781 | dmas = <&audma0 0x85>, <&audma1 0x9a>; |
1782 | dma-names = "rx", "tx"; | |
1783 | }; | |
2c3de367 | 1784 | src1: src-1 { |
3abb4d5f | 1785 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1786 | dmas = <&audma0 0x87>, <&audma1 0x9c>; |
1787 | dma-names = "rx", "tx"; | |
1788 | }; | |
2c3de367 | 1789 | src2: src-2 { |
3abb4d5f | 1790 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1791 | dmas = <&audma0 0x89>, <&audma1 0x9e>; |
1792 | dma-names = "rx", "tx"; | |
1793 | }; | |
2c3de367 | 1794 | src3: src-3 { |
3abb4d5f | 1795 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1796 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; |
1797 | dma-names = "rx", "tx"; | |
1798 | }; | |
2c3de367 | 1799 | src4: src-4 { |
3abb4d5f | 1800 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1801 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; |
1802 | dma-names = "rx", "tx"; | |
1803 | }; | |
2c3de367 | 1804 | src5: src-5 { |
3abb4d5f | 1805 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1806 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; |
1807 | dma-names = "rx", "tx"; | |
1808 | }; | |
2c3de367 | 1809 | src6: src-6 { |
3abb4d5f | 1810 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1811 | dmas = <&audma0 0x91>, <&audma1 0xb4>; |
1812 | dma-names = "rx", "tx"; | |
1813 | }; | |
2c3de367 | 1814 | src7: src-7 { |
3abb4d5f | 1815 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1816 | dmas = <&audma0 0x93>, <&audma1 0xb6>; |
1817 | dma-names = "rx", "tx"; | |
1818 | }; | |
2c3de367 | 1819 | src8: src-8 { |
3abb4d5f | 1820 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1821 | dmas = <&audma0 0x95>, <&audma1 0xb8>; |
1822 | dma-names = "rx", "tx"; | |
1823 | }; | |
2c3de367 | 1824 | src9: src-9 { |
3abb4d5f | 1825 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1826 | dmas = <&audma0 0x97>, <&audma1 0xba>; |
1827 | dma-names = "rx", "tx"; | |
1828 | }; | |
7df2fd57 KM |
1829 | }; |
1830 | ||
1831 | rcar_sound,ssi { | |
2c3de367 | 1832 | ssi0: ssi-0 { |
3abb4d5f | 1833 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1834 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
1835 | dma-names = "rx", "tx", "rxu", "txu"; | |
1836 | }; | |
2c3de367 | 1837 | ssi1: ssi-1 { |
3abb4d5f | 1838 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1839 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
1840 | dma-names = "rx", "tx", "rxu", "txu"; | |
1841 | }; | |
2c3de367 | 1842 | ssi2: ssi-2 { |
3abb4d5f | 1843 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1844 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
1845 | dma-names = "rx", "tx", "rxu", "txu"; | |
1846 | }; | |
2c3de367 | 1847 | ssi3: ssi-3 { |
3abb4d5f | 1848 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1849 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
1850 | dma-names = "rx", "tx", "rxu", "txu"; | |
1851 | }; | |
2c3de367 | 1852 | ssi4: ssi-4 { |
3abb4d5f | 1853 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1854 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
1855 | dma-names = "rx", "tx", "rxu", "txu"; | |
1856 | }; | |
2c3de367 | 1857 | ssi5: ssi-5 { |
3abb4d5f | 1858 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1859 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
1860 | dma-names = "rx", "tx", "rxu", "txu"; | |
1861 | }; | |
2c3de367 | 1862 | ssi6: ssi-6 { |
3abb4d5f | 1863 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1864 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
1865 | dma-names = "rx", "tx", "rxu", "txu"; | |
1866 | }; | |
2c3de367 | 1867 | ssi7: ssi-7 { |
3abb4d5f | 1868 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1869 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
1870 | dma-names = "rx", "tx", "rxu", "txu"; | |
1871 | }; | |
2c3de367 | 1872 | ssi8: ssi-8 { |
3abb4d5f | 1873 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1874 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
1875 | dma-names = "rx", "tx", "rxu", "txu"; | |
1876 | }; | |
2c3de367 | 1877 | ssi9: ssi-9 { |
3abb4d5f | 1878 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; |
118a5093 KM |
1879 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
1880 | dma-names = "rx", "tx", "rxu", "txu"; | |
1881 | }; | |
7df2fd57 KM |
1882 | }; |
1883 | }; | |
70496727 LP |
1884 | |
1885 | ipmmu_sy0: mmu@e6280000 { | |
c8d6686e | 1886 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1887 | reg = <0 0xe6280000 0 0x1000>; |
3abb4d5f SH |
1888 | interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, |
1889 | <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; | |
70496727 LP |
1890 | #iommu-cells = <1>; |
1891 | status = "disabled"; | |
1892 | }; | |
1893 | ||
1894 | ipmmu_sy1: mmu@e6290000 { | |
c8d6686e | 1895 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1896 | reg = <0 0xe6290000 0 0x1000>; |
3abb4d5f | 1897 | interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; |
70496727 LP |
1898 | #iommu-cells = <1>; |
1899 | status = "disabled"; | |
1900 | }; | |
1901 | ||
1902 | ipmmu_ds: mmu@e6740000 { | |
c8d6686e | 1903 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1904 | reg = <0 0xe6740000 0 0x1000>; |
3abb4d5f SH |
1905 | interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, |
1906 | <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; | |
70496727 LP |
1907 | #iommu-cells = <1>; |
1908 | status = "disabled"; | |
1909 | }; | |
1910 | ||
1911 | ipmmu_mp: mmu@ec680000 { | |
c8d6686e | 1912 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1913 | reg = <0 0xec680000 0 0x1000>; |
3abb4d5f | 1914 | interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; |
70496727 LP |
1915 | #iommu-cells = <1>; |
1916 | status = "disabled"; | |
1917 | }; | |
1918 | ||
1919 | ipmmu_mx: mmu@fe951000 { | |
c8d6686e | 1920 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1921 | reg = <0 0xfe951000 0 0x1000>; |
3abb4d5f SH |
1922 | interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, |
1923 | <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; | |
70496727 LP |
1924 | #iommu-cells = <1>; |
1925 | status = "disabled"; | |
1926 | }; | |
1927 | ||
1928 | ipmmu_rt: mmu@ffc80000 { | |
c8d6686e | 1929 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
70496727 | 1930 | reg = <0 0xffc80000 0 0x1000>; |
3abb4d5f | 1931 | interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; |
70496727 LP |
1932 | #iommu-cells = <1>; |
1933 | status = "disabled"; | |
1934 | }; | |
0468b2d6 | 1935 | }; |