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CommitLineData
0dce5454
UH
1/*
2 * Device Tree Source for the r8a7794 SoC
3 *
4 * Copyright (C) 2014 Renesas Electronics Corporation
5 * Copyright (C) 2014 Ulrich Hecht
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
58d6c357 12#include <dt-bindings/clock/r8a7794-cpg-mssr.h>
0dce5454
UH
13#include <dt-bindings/interrupt-controller/arm-gic.h>
14#include <dt-bindings/interrupt-controller/irq.h>
0761ff2a 15#include <dt-bindings/power/r8a7794-sysc.h>
0dce5454
UH
16
17/ {
18 compatible = "renesas,r8a7794";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
22
740b4a9f 23 aliases {
5428521b
SS
24 i2c0 = &i2c0;
25 i2c1 = &i2c1;
26 i2c2 = &i2c2;
27 i2c3 = &i2c3;
28 i2c4 = &i2c4;
29 i2c5 = &i2c5;
aa9b992e
SH
30 i2c6 = &i2c6;
31 i2c7 = &i2c7;
740b4a9f 32 spi0 = &qspi;
1afe77ca
SS
33 vin0 = &vin0;
34 vin1 = &vin1;
740b4a9f
SS
35 };
36
0dce5454
UH
37 cpus {
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 cpu0: cpu@0 {
42 device_type = "cpu";
43 compatible = "arm,cortex-a7";
44 reg = <0>;
45 clock-frequency = <1000000000>;
58d6c357 46 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
0761ff2a 47 power-domains = <&sysc R8A7794_PD_CA7_CPU0>;
d12a384a 48 next-level-cache = <&L2_CA7>;
0dce5454
UH
49 };
50
51 cpu1: cpu@1 {
52 device_type = "cpu";
53 compatible = "arm,cortex-a7";
54 reg = <1>;
55 clock-frequency = <1000000000>;
5614e692 56 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
0761ff2a 57 power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
d12a384a 58 next-level-cache = <&L2_CA7>;
0dce5454 59 };
0dce5454 60
65d0b7ed 61 L2_CA7: cache-controller-0 {
34ea4b4a 62 compatible = "cache";
34ea4b4a
GU
63 power-domains = <&sysc R8A7794_PD_CA7_SCU>;
64 cache-unified;
65 cache-level = <2>;
66 };
d12a384a
GU
67 };
68
0dce5454 69 gic: interrupt-controller@f1001000 {
c73ddf42 70 compatible = "arm,gic-400";
0dce5454
UH
71 #interrupt-cells = <3>;
72 #address-cells = <0>;
73 interrupt-controller;
74 reg = <0 0xf1001000 0 0x1000>,
387720c9 75 <0 0xf1002000 0 0x2000>,
0dce5454
UH
76 <0 0xf1004000 0 0x2000>,
77 <0 0xf1006000 0 0x2000>;
8d47e6af 78 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
58d6c357 79 clocks = <&cpg CPG_MOD 408>;
133a3f1a
GU
80 clock-names = "clk";
81 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 82 resets = <&cpg 408>;
0dce5454
UH
83 };
84
e8f5de3b 85 gpio0: gpio@e6050000 {
7ee06c8a 86 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
e8f5de3b 87 reg = <0 0xe6050000 0 0x50>;
8d47e6af 88 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
e8f5de3b
SS
89 #gpio-cells = <2>;
90 gpio-controller;
91 gpio-ranges = <&pfc 0 0 32>;
92 #interrupt-cells = <2>;
93 interrupt-controller;
58d6c357 94 clocks = <&cpg CPG_MOD 912>;
25611e4e 95 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 96 resets = <&cpg 912>;
e8f5de3b
SS
97 };
98
99 gpio1: gpio@e6051000 {
7ee06c8a 100 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
e8f5de3b 101 reg = <0 0xe6051000 0 0x50>;
8d47e6af 102 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
e8f5de3b
SS
103 #gpio-cells = <2>;
104 gpio-controller;
105 gpio-ranges = <&pfc 0 32 26>;
106 #interrupt-cells = <2>;
107 interrupt-controller;
58d6c357 108 clocks = <&cpg CPG_MOD 911>;
25611e4e 109 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 110 resets = <&cpg 911>;
e8f5de3b
SS
111 };
112
113 gpio2: gpio@e6052000 {
7ee06c8a 114 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
e8f5de3b 115 reg = <0 0xe6052000 0 0x50>;
8d47e6af 116 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
e8f5de3b
SS
117 #gpio-cells = <2>;
118 gpio-controller;
119 gpio-ranges = <&pfc 0 64 32>;
120 #interrupt-cells = <2>;
121 interrupt-controller;
58d6c357 122 clocks = <&cpg CPG_MOD 910>;
25611e4e 123 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 124 resets = <&cpg 910>;
e8f5de3b
SS
125 };
126
127 gpio3: gpio@e6053000 {
7ee06c8a 128 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
e8f5de3b 129 reg = <0 0xe6053000 0 0x50>;
8d47e6af 130 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
e8f5de3b
SS
131 #gpio-cells = <2>;
132 gpio-controller;
133 gpio-ranges = <&pfc 0 96 32>;
134 #interrupt-cells = <2>;
135 interrupt-controller;
58d6c357 136 clocks = <&cpg CPG_MOD 909>;
25611e4e 137 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 138 resets = <&cpg 909>;
e8f5de3b
SS
139 };
140
141 gpio4: gpio@e6054000 {
7ee06c8a 142 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
e8f5de3b 143 reg = <0 0xe6054000 0 0x50>;
8d47e6af 144 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
e8f5de3b
SS
145 #gpio-cells = <2>;
146 gpio-controller;
147 gpio-ranges = <&pfc 0 128 32>;
148 #interrupt-cells = <2>;
149 interrupt-controller;
58d6c357 150 clocks = <&cpg CPG_MOD 908>;
25611e4e 151 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 152 resets = <&cpg 908>;
e8f5de3b
SS
153 };
154
155 gpio5: gpio@e6055000 {
7ee06c8a 156 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
e8f5de3b 157 reg = <0 0xe6055000 0 0x50>;
8d47e6af 158 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
e8f5de3b
SS
159 #gpio-cells = <2>;
160 gpio-controller;
161 gpio-ranges = <&pfc 0 160 28>;
162 #interrupt-cells = <2>;
163 interrupt-controller;
58d6c357 164 clocks = <&cpg CPG_MOD 907>;
25611e4e 165 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 166 resets = <&cpg 907>;
e8f5de3b
SS
167 };
168
169 gpio6: gpio@e6055400 {
7ee06c8a 170 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
e8f5de3b 171 reg = <0 0xe6055400 0 0x50>;
8d47e6af 172 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
e8f5de3b
SS
173 #gpio-cells = <2>;
174 gpio-controller;
175 gpio-ranges = <&pfc 0 192 26>;
176 #interrupt-cells = <2>;
177 interrupt-controller;
58d6c357 178 clocks = <&cpg CPG_MOD 905>;
25611e4e 179 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 180 resets = <&cpg 905>;
e8f5de3b
SS
181 };
182
0dce5454
UH
183 cmt0: timer@ffca0000 {
184 compatible = "renesas,cmt-48-gen2";
185 reg = <0 0xffca0000 0 0x1004>;
8d47e6af
SH
186 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
187 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 188 clocks = <&cpg CPG_MOD 124>;
0dce5454 189 clock-names = "fck";
25611e4e 190 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 191 resets = <&cpg 124>;
0dce5454
UH
192
193 renesas,channels-mask = <0x60>;
194
195 status = "disabled";
196 };
197
198 cmt1: timer@e6130000 {
199 compatible = "renesas,cmt-48-gen2";
200 reg = <0 0xe6130000 0 0x1004>;
8d47e6af
SH
201 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
202 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
203 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
204 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
205 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
206 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
207 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
208 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 209 clocks = <&cpg CPG_MOD 329>;
0dce5454 210 clock-names = "fck";
25611e4e 211 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 212 resets = <&cpg 329>;
0dce5454
UH
213
214 renesas,channels-mask = <0xff>;
215
216 status = "disabled";
217 };
218
da33648c
HN
219 timer {
220 compatible = "arm,armv7-timer";
8d47e6af
SH
221 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
222 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
223 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
224 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
da33648c
HN
225 };
226
0dce5454
UH
227 irqc0: interrupt-controller@e61c0000 {
228 compatible = "renesas,irqc-r8a7794", "renesas,irqc";
229 #interrupt-cells = <2>;
230 interrupt-controller;
231 reg = <0 0xe61c0000 0 0x200>;
8d47e6af
SH
232 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
233 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
234 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
235 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
236 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
237 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
238 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
239 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
240 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
241 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 242 clocks = <&cpg CPG_MOD 407>;
25611e4e 243 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 244 resets = <&cpg 407>;
0dce5454
UH
245 };
246
fd1683c1
SS
247 pfc: pin-controller@e6060000 {
248 compatible = "renesas,pfc-r8a7794";
249 reg = <0 0xe6060000 0 0x11c>;
fd1683c1
SS
250 };
251
bd847485 252 dmac0: dma-controller@e6700000 {
0a3d058b 253 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
bd847485 254 reg = <0 0xe6700000 0 0x20000>;
8d47e6af
SH
255 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
256 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
257 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
258 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
259 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
260 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
261 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
262 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
263 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
264 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
265 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
266 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
267 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
268 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
269 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
270 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
bd847485
LP
271 interrupt-names = "error",
272 "ch0", "ch1", "ch2", "ch3",
273 "ch4", "ch5", "ch6", "ch7",
274 "ch8", "ch9", "ch10", "ch11",
275 "ch12", "ch13", "ch14";
58d6c357 276 clocks = <&cpg CPG_MOD 219>;
bd847485 277 clock-names = "fck";
25611e4e 278 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 279 resets = <&cpg 219>;
bd847485
LP
280 #dma-cells = <1>;
281 dma-channels = <15>;
282 };
283
284 dmac1: dma-controller@e6720000 {
0a3d058b 285 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
bd847485 286 reg = <0 0xe6720000 0 0x20000>;
8d47e6af
SH
287 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
288 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
289 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
290 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
291 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
292 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
293 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
294 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
295 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
296 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
297 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
298 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
299 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
300 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
301 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
302 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
bd847485
LP
303 interrupt-names = "error",
304 "ch0", "ch1", "ch2", "ch3",
305 "ch4", "ch5", "ch6", "ch7",
306 "ch8", "ch9", "ch10", "ch11",
307 "ch12", "ch13", "ch14";
58d6c357 308 clocks = <&cpg CPG_MOD 218>;
bd847485 309 clock-names = "fck";
25611e4e 310 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 311 resets = <&cpg 218>;
bd847485
LP
312 #dma-cells = <1>;
313 dma-channels = <15>;
314 };
315
298e4ee3
SS
316 audma0: dma-controller@ec700000 {
317 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
318 reg = <0 0xec700000 0 0x10000>;
319 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
320 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
321 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
322 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
323 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
324 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
325 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
326 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
327 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
328 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
329 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
330 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
331 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
332 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
333 interrupt-names = "error",
334 "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
335 "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
336 "ch12";
58d6c357 337 clocks = <&cpg CPG_MOD 502>;
298e4ee3 338 clock-names = "fck";
24b2d930 339 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 340 resets = <&cpg 502>;
298e4ee3
SS
341 #dma-cells = <1>;
342 dma-channels = <13>;
343 };
344
0dce5454 345 scifa0: serial@e6c40000 {
06930a1f
GU
346 compatible = "renesas,scifa-r8a7794",
347 "renesas,rcar-gen2-scifa", "renesas,scifa";
0dce5454 348 reg = <0 0xe6c40000 0 64>;
8d47e6af 349 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 350 clocks = <&cpg CPG_MOD 204>;
1b463bd5 351 clock-names = "fck";
b38605e9
NS
352 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
353 <&dmac1 0x21>, <&dmac1 0x22>;
354 dma-names = "tx", "rx", "tx", "rx";
25611e4e 355 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 356 resets = <&cpg 204>;
0dce5454
UH
357 status = "disabled";
358 };
359
360 scifa1: serial@e6c50000 {
06930a1f
GU
361 compatible = "renesas,scifa-r8a7794",
362 "renesas,rcar-gen2-scifa", "renesas,scifa";
0dce5454 363 reg = <0 0xe6c50000 0 64>;
8d47e6af 364 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 365 clocks = <&cpg CPG_MOD 203>;
1b463bd5 366 clock-names = "fck";
b38605e9
NS
367 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
368 <&dmac1 0x25>, <&dmac1 0x26>;
369 dma-names = "tx", "rx", "tx", "rx";
25611e4e 370 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 371 resets = <&cpg 203>;
0dce5454
UH
372 status = "disabled";
373 };
374
375 scifa2: serial@e6c60000 {
06930a1f
GU
376 compatible = "renesas,scifa-r8a7794",
377 "renesas,rcar-gen2-scifa", "renesas,scifa";
0dce5454 378 reg = <0 0xe6c60000 0 64>;
8d47e6af 379 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 380 clocks = <&cpg CPG_MOD 202>;
1b463bd5 381 clock-names = "fck";
b38605e9
NS
382 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
383 <&dmac1 0x27>, <&dmac1 0x28>;
384 dma-names = "tx", "rx", "tx", "rx";
25611e4e 385 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 386 resets = <&cpg 202>;
0dce5454
UH
387 status = "disabled";
388 };
389
390 scifa3: serial@e6c70000 {
06930a1f
GU
391 compatible = "renesas,scifa-r8a7794",
392 "renesas,rcar-gen2-scifa", "renesas,scifa";
0dce5454 393 reg = <0 0xe6c70000 0 64>;
8d47e6af 394 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 395 clocks = <&cpg CPG_MOD 1106>;
1b463bd5 396 clock-names = "fck";
b38605e9
NS
397 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
398 <&dmac1 0x1b>, <&dmac1 0x1c>;
399 dma-names = "tx", "rx", "tx", "rx";
25611e4e 400 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 401 resets = <&cpg 1106>;
0dce5454
UH
402 status = "disabled";
403 };
404
405 scifa4: serial@e6c78000 {
06930a1f
GU
406 compatible = "renesas,scifa-r8a7794",
407 "renesas,rcar-gen2-scifa", "renesas,scifa";
0dce5454 408 reg = <0 0xe6c78000 0 64>;
8d47e6af 409 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 410 clocks = <&cpg CPG_MOD 1107>;
1b463bd5 411 clock-names = "fck";
b38605e9
NS
412 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
413 <&dmac1 0x1f>, <&dmac1 0x20>;
414 dma-names = "tx", "rx", "tx", "rx";
25611e4e 415 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 416 resets = <&cpg 1107>;
0dce5454
UH
417 status = "disabled";
418 };
419
420 scifa5: serial@e6c80000 {
06930a1f
GU
421 compatible = "renesas,scifa-r8a7794",
422 "renesas,rcar-gen2-scifa", "renesas,scifa";
0dce5454 423 reg = <0 0xe6c80000 0 64>;
8d47e6af 424 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 425 clocks = <&cpg CPG_MOD 1108>;
1b463bd5 426 clock-names = "fck";
b38605e9
NS
427 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
428 <&dmac1 0x23>, <&dmac1 0x24>;
429 dma-names = "tx", "rx", "tx", "rx";
25611e4e 430 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 431 resets = <&cpg 1108>;
0dce5454
UH
432 status = "disabled";
433 };
434
435 scifb0: serial@e6c20000 {
06930a1f
GU
436 compatible = "renesas,scifb-r8a7794",
437 "renesas,rcar-gen2-scifb", "renesas,scifb";
655ea555 438 reg = <0 0xe6c20000 0 0x100>;
8d47e6af 439 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 440 clocks = <&cpg CPG_MOD 206>;
1b463bd5 441 clock-names = "fck";
b38605e9
NS
442 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
443 <&dmac1 0x3d>, <&dmac1 0x3e>;
444 dma-names = "tx", "rx", "tx", "rx";
25611e4e 445 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 446 resets = <&cpg 206>;
0dce5454
UH
447 status = "disabled";
448 };
449
450 scifb1: serial@e6c30000 {
06930a1f
GU
451 compatible = "renesas,scifb-r8a7794",
452 "renesas,rcar-gen2-scifb", "renesas,scifb";
655ea555 453 reg = <0 0xe6c30000 0 0x100>;
8d47e6af 454 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 455 clocks = <&cpg CPG_MOD 207>;
1b463bd5 456 clock-names = "fck";
b38605e9
NS
457 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
458 <&dmac1 0x19>, <&dmac1 0x1a>;
459 dma-names = "tx", "rx", "tx", "rx";
25611e4e 460 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 461 resets = <&cpg 207>;
0dce5454
UH
462 status = "disabled";
463 };
464
465 scifb2: serial@e6ce0000 {
06930a1f
GU
466 compatible = "renesas,scifb-r8a7794",
467 "renesas,rcar-gen2-scifb", "renesas,scifb";
655ea555 468 reg = <0 0xe6ce0000 0 0x100>;
8d47e6af 469 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 470 clocks = <&cpg CPG_MOD 216>;
1b463bd5 471 clock-names = "fck";
b38605e9
NS
472 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
473 <&dmac1 0x1d>, <&dmac1 0x1e>;
474 dma-names = "tx", "rx", "tx", "rx";
25611e4e 475 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 476 resets = <&cpg 216>;
0dce5454
UH
477 status = "disabled";
478 };
479
480 scif0: serial@e6e60000 {
06930a1f
GU
481 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
482 "renesas,scif";
0dce5454 483 reg = <0 0xe6e60000 0 64>;
8d47e6af 484 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 485 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
a864446f
GU
486 <&scif_clk>;
487 clock-names = "fck", "brg_int", "scif_clk";
b38605e9
NS
488 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
489 <&dmac1 0x29>, <&dmac1 0x2a>;
490 dma-names = "tx", "rx", "tx", "rx";
25611e4e 491 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 492 resets = <&cpg 721>;
0dce5454
UH
493 status = "disabled";
494 };
495
496 scif1: serial@e6e68000 {
06930a1f
GU
497 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
498 "renesas,scif";
0dce5454 499 reg = <0 0xe6e68000 0 64>;
8d47e6af 500 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 501 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
a864446f
GU
502 <&scif_clk>;
503 clock-names = "fck", "brg_int", "scif_clk";
b38605e9
NS
504 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
505 <&dmac1 0x2d>, <&dmac1 0x2e>;
506 dma-names = "tx", "rx", "tx", "rx";
25611e4e 507 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 508 resets = <&cpg 720>;
0dce5454
UH
509 status = "disabled";
510 };
511
512 scif2: serial@e6e58000 {
06930a1f
GU
513 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
514 "renesas,scif";
0dce5454 515 reg = <0 0xe6e58000 0 64>;
8d47e6af 516 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 517 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
a864446f
GU
518 <&scif_clk>;
519 clock-names = "fck", "brg_int", "scif_clk";
b38605e9
NS
520 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
521 <&dmac1 0x2b>, <&dmac1 0x2c>;
522 dma-names = "tx", "rx", "tx", "rx";
25611e4e 523 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 524 resets = <&cpg 719>;
0dce5454
UH
525 status = "disabled";
526 };
527
528 scif3: serial@e6ea8000 {
06930a1f
GU
529 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
530 "renesas,scif";
0dce5454 531 reg = <0 0xe6ea8000 0 64>;
8d47e6af 532 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 533 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
a864446f
GU
534 <&scif_clk>;
535 clock-names = "fck", "brg_int", "scif_clk";
b38605e9
NS
536 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
537 <&dmac1 0x2f>, <&dmac1 0x30>;
538 dma-names = "tx", "rx", "tx", "rx";
25611e4e 539 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 540 resets = <&cpg 718>;
0dce5454
UH
541 status = "disabled";
542 };
543
544 scif4: serial@e6ee0000 {
06930a1f
GU
545 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
546 "renesas,scif";
0dce5454 547 reg = <0 0xe6ee0000 0 64>;
8d47e6af 548 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 549 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
a864446f
GU
550 <&scif_clk>;
551 clock-names = "fck", "brg_int", "scif_clk";
b38605e9
NS
552 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
553 <&dmac1 0xfb>, <&dmac1 0xfc>;
554 dma-names = "tx", "rx", "tx", "rx";
25611e4e 555 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 556 resets = <&cpg 715>;
0dce5454
UH
557 status = "disabled";
558 };
559
560 scif5: serial@e6ee8000 {
06930a1f
GU
561 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
562 "renesas,scif";
0dce5454 563 reg = <0 0xe6ee8000 0 64>;
8d47e6af 564 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 565 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
a864446f
GU
566 <&scif_clk>;
567 clock-names = "fck", "brg_int", "scif_clk";
b38605e9
NS
568 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
569 <&dmac1 0xfd>, <&dmac1 0xfe>;
570 dma-names = "tx", "rx", "tx", "rx";
25611e4e 571 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 572 resets = <&cpg 714>;
0dce5454
UH
573 status = "disabled";
574 };
575
576 hscif0: serial@e62c0000 {
06930a1f
GU
577 compatible = "renesas,hscif-r8a7794",
578 "renesas,rcar-gen2-hscif", "renesas,hscif";
0dce5454 579 reg = <0 0xe62c0000 0 96>;
8d47e6af 580 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 581 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
a864446f
GU
582 <&scif_clk>;
583 clock-names = "fck", "brg_int", "scif_clk";
b38605e9
NS
584 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
585 <&dmac1 0x39>, <&dmac1 0x3a>;
586 dma-names = "tx", "rx", "tx", "rx";
25611e4e 587 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 588 resets = <&cpg 717>;
0dce5454
UH
589 status = "disabled";
590 };
591
592 hscif1: serial@e62c8000 {
06930a1f
GU
593 compatible = "renesas,hscif-r8a7794",
594 "renesas,rcar-gen2-hscif", "renesas,hscif";
0dce5454 595 reg = <0 0xe62c8000 0 96>;
8d47e6af 596 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 597 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
a864446f
GU
598 <&scif_clk>;
599 clock-names = "fck", "brg_int", "scif_clk";
b38605e9
NS
600 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
601 <&dmac1 0x4d>, <&dmac1 0x4e>;
602 dma-names = "tx", "rx", "tx", "rx";
25611e4e 603 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 604 resets = <&cpg 716>;
0dce5454
UH
605 status = "disabled";
606 };
607
608 hscif2: serial@e62d0000 {
06930a1f
GU
609 compatible = "renesas,hscif-r8a7794",
610 "renesas,rcar-gen2-hscif", "renesas,hscif";
0dce5454 611 reg = <0 0xe62d0000 0 96>;
8d47e6af 612 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 613 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
a864446f
GU
614 <&scif_clk>;
615 clock-names = "fck", "brg_int", "scif_clk";
b38605e9
NS
616 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
617 <&dmac1 0x3b>, <&dmac1 0x3c>;
618 dma-names = "tx", "rx", "tx", "rx";
25611e4e 619 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 620 resets = <&cpg 713>;
0dce5454
UH
621 status = "disabled";
622 };
623
709f8d26
GU
624 icram0: sram@e63a0000 {
625 compatible = "mmio-sram";
626 reg = <0 0xe63a0000 0 0x12000>;
627 };
628
629 icram1: sram@e63c0000 {
630 compatible = "mmio-sram";
631 reg = <0 0xe63c0000 0 0x1000>;
18951ad1
GU
632 #address-cells = <1>;
633 #size-cells = <1>;
634 ranges = <0 0 0xe63c0000 0x1000>;
635
636 smp-sram@0 {
637 compatible = "renesas,smp-sram";
638 reg = <0 0x10>;
639 };
709f8d26
GU
640 };
641
82818d34
LP
642 ether: ethernet@ee700000 {
643 compatible = "renesas,ether-r8a7794";
644 reg = <0 0xee700000 0 0x400>;
8d47e6af 645 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 646 clocks = <&cpg CPG_MOD 813>;
25611e4e 647 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 648 resets = <&cpg 813>;
82818d34
LP
649 phy-mode = "rmii";
650 #address-cells = <1>;
651 #size-cells = <0>;
652 status = "disabled";
653 };
654
89aac8af
SS
655 avb: ethernet@e6800000 {
656 compatible = "renesas,etheravb-r8a7794",
657 "renesas,etheravb-rcar-gen2";
658 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
659 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 660 clocks = <&cpg CPG_MOD 812>;
25611e4e 661 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 662 resets = <&cpg 812>;
89aac8af
SS
663 #address-cells = <1>;
664 #size-cells = <0>;
665 status = "disabled";
666 };
667
5428521b
SS
668 /* The memory map in the User's Manual maps the cores to bus numbers */
669 i2c0: i2c@e6508000 {
5e617389 670 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
5428521b 671 reg = <0 0xe6508000 0 0x40>;
8d47e6af 672 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 673 clocks = <&cpg CPG_MOD 931>;
25611e4e 674 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 675 resets = <&cpg 931>;
5428521b
SS
676 #address-cells = <1>;
677 #size-cells = <0>;
691cd0a6 678 i2c-scl-internal-delay-ns = <6>;
5428521b
SS
679 status = "disabled";
680 };
681
682 i2c1: i2c@e6518000 {
5e617389 683 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
5428521b 684 reg = <0 0xe6518000 0 0x40>;
8d47e6af 685 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 686 clocks = <&cpg CPG_MOD 930>;
25611e4e 687 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 688 resets = <&cpg 930>;
5428521b
SS
689 #address-cells = <1>;
690 #size-cells = <0>;
691cd0a6 691 i2c-scl-internal-delay-ns = <6>;
5428521b
SS
692 status = "disabled";
693 };
694
695 i2c2: i2c@e6530000 {
5e617389 696 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
5428521b 697 reg = <0 0xe6530000 0 0x40>;
8d47e6af 698 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 699 clocks = <&cpg CPG_MOD 929>;
25611e4e 700 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 701 resets = <&cpg 929>;
5428521b
SS
702 #address-cells = <1>;
703 #size-cells = <0>;
691cd0a6 704 i2c-scl-internal-delay-ns = <6>;
5428521b
SS
705 status = "disabled";
706 };
707
708 i2c3: i2c@e6540000 {
5e617389 709 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
5428521b 710 reg = <0 0xe6540000 0 0x40>;
8d47e6af 711 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 712 clocks = <&cpg CPG_MOD 928>;
25611e4e 713 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 714 resets = <&cpg 928>;
5428521b
SS
715 #address-cells = <1>;
716 #size-cells = <0>;
691cd0a6 717 i2c-scl-internal-delay-ns = <6>;
5428521b
SS
718 status = "disabled";
719 };
720
721 i2c4: i2c@e6520000 {
5e617389 722 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
5428521b 723 reg = <0 0xe6520000 0 0x40>;
8d47e6af 724 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 725 clocks = <&cpg CPG_MOD 927>;
25611e4e 726 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 727 resets = <&cpg 927>;
5428521b
SS
728 #address-cells = <1>;
729 #size-cells = <0>;
691cd0a6 730 i2c-scl-internal-delay-ns = <6>;
5428521b
SS
731 status = "disabled";
732 };
733
734 i2c5: i2c@e6528000 {
5e617389 735 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
5428521b 736 reg = <0 0xe6528000 0 0x40>;
8d47e6af 737 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 738 clocks = <&cpg CPG_MOD 925>;
25611e4e 739 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 740 resets = <&cpg 925>;
5428521b
SS
741 #address-cells = <1>;
742 #size-cells = <0>;
691cd0a6 743 i2c-scl-internal-delay-ns = <6>;
5428521b
SS
744 status = "disabled";
745 };
746
aa9b992e 747 i2c6: i2c@e6500000 {
40a99dbb
SH
748 compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
749 "renesas,rmobile-iic";
aa9b992e
SH
750 reg = <0 0xe6500000 0 0x425>;
751 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 752 clocks = <&cpg CPG_MOD 318>;
b38605e9
NS
753 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
754 <&dmac1 0x61>, <&dmac1 0x62>;
755 dma-names = "tx", "rx", "tx", "rx";
25611e4e 756 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 757 resets = <&cpg 318>;
aa9b992e
SH
758 #address-cells = <1>;
759 #size-cells = <0>;
760 status = "disabled";
761 };
762
763 i2c7: i2c@e6510000 {
40a99dbb
SH
764 compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
765 "renesas,rmobile-iic";
aa9b992e
SH
766 reg = <0 0xe6510000 0 0x425>;
767 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 768 clocks = <&cpg CPG_MOD 323>;
b38605e9
NS
769 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
770 <&dmac1 0x65>, <&dmac1 0x66>;
771 dma-names = "tx", "rx", "tx", "rx";
25611e4e 772 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 773 resets = <&cpg 323>;
aa9b992e
SH
774 #address-cells = <1>;
775 #size-cells = <0>;
776 status = "disabled";
777 };
778
6cdf6ba1
SS
779 mmcif0: mmc@ee200000 {
780 compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";
781 reg = <0 0xee200000 0 0x80>;
8d47e6af 782 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 783 clocks = <&cpg CPG_MOD 315>;
b38605e9
NS
784 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
785 <&dmac1 0xd1>, <&dmac1 0xd2>;
786 dma-names = "tx", "rx", "tx", "rx";
25611e4e 787 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 788 resets = <&cpg 315>;
6cdf6ba1
SS
789 reg-io-width = <4>;
790 status = "disabled";
791 };
792
b8e8ea12
SS
793 sdhi0: sd@ee100000 {
794 compatible = "renesas,sdhi-r8a7794";
83701e00 795 reg = <0 0xee100000 0 0x328>;
8d47e6af 796 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 797 clocks = <&cpg CPG_MOD 314>;
b38605e9
NS
798 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
799 <&dmac1 0xcd>, <&dmac1 0xce>;
800 dma-names = "tx", "rx", "tx", "rx";
5babb5d4 801 max-frequency = <195000000>;
25611e4e 802 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 803 resets = <&cpg 314>;
b8e8ea12
SS
804 status = "disabled";
805 };
806
807 sdhi1: sd@ee140000 {
808 compatible = "renesas,sdhi-r8a7794";
809 reg = <0 0xee140000 0 0x100>;
8d47e6af 810 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 811 clocks = <&cpg CPG_MOD 312>;
b38605e9
NS
812 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
813 <&dmac1 0xc1>, <&dmac1 0xc2>;
814 dma-names = "tx", "rx", "tx", "rx";
5babb5d4 815 max-frequency = <97500000>;
25611e4e 816 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 817 resets = <&cpg 312>;
b8e8ea12
SS
818 status = "disabled";
819 };
820
821 sdhi2: sd@ee160000 {
822 compatible = "renesas,sdhi-r8a7794";
823 reg = <0 0xee160000 0 0x100>;
8d47e6af 824 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 825 clocks = <&cpg CPG_MOD 311>;
b38605e9
NS
826 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
827 <&dmac1 0xd3>, <&dmac1 0xd4>;
828 dma-names = "tx", "rx", "tx", "rx";
5babb5d4 829 max-frequency = <97500000>;
25611e4e 830 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 831 resets = <&cpg 311>;
b8e8ea12
SS
832 status = "disabled";
833 };
834
740b4a9f
SS
835 qspi: spi@e6b10000 {
836 compatible = "renesas,qspi-r8a7794", "renesas,qspi";
837 reg = <0 0xe6b10000 0 0x2c>;
8d47e6af 838 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 839 clocks = <&cpg CPG_MOD 917>;
b38605e9
NS
840 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
841 <&dmac1 0x17>, <&dmac1 0x18>;
842 dma-names = "tx", "rx", "tx", "rx";
25611e4e 843 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 844 resets = <&cpg 917>;
740b4a9f
SS
845 num-cs = <1>;
846 #address-cells = <1>;
847 #size-cells = <0>;
848 status = "disabled";
849 };
850
1afe77ca 851 vin0: video@e6ef0000 {
a3fbb1dc 852 compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
1afe77ca 853 reg = <0 0xe6ef0000 0 0x1000>;
8d47e6af 854 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 855 clocks = <&cpg CPG_MOD 811>;
25611e4e 856 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 857 resets = <&cpg 811>;
1afe77ca
SS
858 status = "disabled";
859 };
860
861 vin1: video@e6ef1000 {
a3fbb1dc 862 compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
1afe77ca 863 reg = <0 0xe6ef1000 0 0x1000>;
8d47e6af 864 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 865 clocks = <&cpg CPG_MOD 810>;
25611e4e 866 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 867 resets = <&cpg 810>;
1afe77ca
SS
868 status = "disabled";
869 };
870
a6a130b3 871 pci0: pci@ee090000 {
c99fbe64 872 compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
a6a130b3
SS
873 device_type = "pci";
874 reg = <0 0xee090000 0 0xc00>,
875 <0 0xee080000 0 0x1100>;
8d47e6af 876 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 877 clocks = <&cpg CPG_MOD 703>;
25611e4e 878 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 879 resets = <&cpg 703>;
a6a130b3
SS
880 status = "disabled";
881
882 bus-range = <0 0>;
883 #address-cells = <3>;
884 #size-cells = <2>;
885 #interrupt-cells = <1>;
886 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
887 interrupt-map-mask = <0xff00 0 0 0x7>;
8d47e6af
SH
888 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
889 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
890 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
45cb0bd7 891
f7d569c1 892 usb@1,0 {
45cb0bd7 893 reg = <0x800 0 0 0 0>;
45cb0bd7
SS
894 phys = <&usb0 0>;
895 phy-names = "usb";
896 };
897
f7d569c1 898 usb@2,0 {
45cb0bd7 899 reg = <0x1000 0 0 0 0>;
45cb0bd7
SS
900 phys = <&usb0 0>;
901 phy-names = "usb";
902 };
a6a130b3
SS
903 };
904
905 pci1: pci@ee0d0000 {
c99fbe64 906 compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
a6a130b3
SS
907 device_type = "pci";
908 reg = <0 0xee0d0000 0 0xc00>,
909 <0 0xee0c0000 0 0x1100>;
8d47e6af 910 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 911 clocks = <&cpg CPG_MOD 703>;
25611e4e 912 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 913 resets = <&cpg 703>;
a6a130b3
SS
914 status = "disabled";
915
916 bus-range = <1 1>;
917 #address-cells = <3>;
918 #size-cells = <2>;
919 #interrupt-cells = <1>;
920 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
921 interrupt-map-mask = <0xff00 0 0 0x7>;
8d47e6af
SH
922 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
923 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
924 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
45cb0bd7 925
f7d569c1
RH
926 usb@1,0 {
927 reg = <0x10800 0 0 0 0>;
45cb0bd7
SS
928 phys = <&usb2 0>;
929 phy-names = "usb";
930 };
931
f7d569c1
RH
932 usb@2,0 {
933 reg = <0x11000 0 0 0 0>;
45cb0bd7
SS
934 phys = <&usb2 0>;
935 phy-names = "usb";
936 };
a6a130b3
SS
937 };
938
2f33b9f7 939 hsusb: usb@e6590000 {
1472ffa8 940 compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs";
2f33b9f7 941 reg = <0 0xe6590000 0 0x100>;
8d47e6af 942 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 943 clocks = <&cpg CPG_MOD 704>;
25611e4e 944 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 945 resets = <&cpg 704>;
2f33b9f7
SS
946 renesas,buswait = <4>;
947 phys = <&usb0 1>;
948 phy-names = "usb";
949 status = "disabled";
950 };
951
74ef4572 952 usbphy: usb-phy@e6590100 {
f81c163b
SH
953 compatible = "renesas,usb-phy-r8a7794",
954 "renesas,rcar-gen2-usb-phy";
74ef4572
SS
955 reg = <0 0xe6590100 0 0x100>;
956 #address-cells = <1>;
957 #size-cells = <0>;
58d6c357 958 clocks = <&cpg CPG_MOD 704>;
74ef4572 959 clock-names = "usbhs";
25611e4e 960 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 961 resets = <&cpg 704>;
74ef4572
SS
962 status = "disabled";
963
964 usb0: usb-channel@0 {
965 reg = <0>;
966 #phy-cells = <1>;
967 };
968 usb2: usb-channel@2 {
969 reg = <2>;
970 #phy-cells = <1>;
971 };
972 };
973
8b40ea19 974 vsp@fe928000 {
bb249cdc
SS
975 compatible = "renesas,vsp1";
976 reg = <0 0xfe928000 0 0x8000>;
977 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 978 clocks = <&cpg CPG_MOD 131>;
bb249cdc 979 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 980 resets = <&cpg 131>;
bb249cdc
SS
981 };
982
8b40ea19 983 vsp@fe930000 {
bb249cdc
SS
984 compatible = "renesas,vsp1";
985 reg = <0 0xfe930000 0 0x8000>;
986 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 987 clocks = <&cpg CPG_MOD 128>;
bb249cdc 988 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 989 resets = <&cpg 128>;
bb249cdc
SS
990 };
991
46c4f13d
LP
992 du: display@feb00000 {
993 compatible = "renesas,du-r8a7794";
994 reg = <0 0xfeb00000 0 0x40000>;
995 reg-names = "du";
8d47e6af
SH
996 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
997 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
58d6c357 998 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
46c4f13d
LP
999 clock-names = "du.0", "du.1";
1000 status = "disabled";
1001
1002 ports {
1003 #address-cells = <1>;
1004 #size-cells = <0>;
1005
1006 port@0 {
1007 reg = <0>;
1008 du_out_rgb0: endpoint {
1009 };
1010 };
1011 port@1 {
1012 reg = <1>;
1013 du_out_rgb1: endpoint {
1014 };
1015 };
1016 };
1017 };
1018
9f1c1a2c
SH
1019 can0: can@e6e80000 {
1020 compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
1021 reg = <0 0xe6e80000 0 0x1000>;
1022 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
58d6c357
GU
1023 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
1024 <&can_clk>;
9f1c1a2c 1025 clock-names = "clkp1", "clkp2", "can_clk";
25611e4e 1026 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 1027 resets = <&cpg 916>;
9f1c1a2c
SH
1028 status = "disabled";
1029 };
1030
1031 can1: can@e6e88000 {
1032 compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
1033 reg = <0 0xe6e88000 0 0x1000>;
1034 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
58d6c357
GU
1035 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
1036 <&can_clk>;
9f1c1a2c 1037 clock-names = "clkp1", "clkp2", "can_clk";
25611e4e 1038 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75 1039 resets = <&cpg 915>;
9f1c1a2c
SH
1040 status = "disabled";
1041 };
1042
9fb1c8ff
GU
1043 /* External root clock */
1044 extal_clk: extal {
1045 compatible = "fixed-clock";
1046 #clock-cells = <0>;
1047 /* This value must be overridden by the board. */
1048 clock-frequency = <0>;
1049 };
1050
1051 /* External USB clock - can be overridden by the board */
1052 usb_extal_clk: usb_extal {
1053 compatible = "fixed-clock";
1054 #clock-cells = <0>;
1055 clock-frequency = <48000000>;
1056 };
1057
1058 /* External CAN clock */
1059 can_clk: can {
1060 compatible = "fixed-clock";
1061 #clock-cells = <0>;
1062 /* This value must be overridden by the board. */
1063 clock-frequency = <0>;
1064 };
1065
1066 /* External SCIF clock */
1067 scif_clk: scif {
1068 compatible = "fixed-clock";
1069 #clock-cells = <0>;
1070 /* This value must be overridden by the board. */
1071 clock-frequency = <0>;
1072 };
1073
1074 /*
1075 * The external audio clocks are configured as 0 Hz fixed
1076 * frequency clocks by default. Boards that provide audio
1077 * clocks should override them.
1078 */
1079 audio_clka: audio_clka {
1080 compatible = "fixed-clock";
1081 #clock-cells = <0>;
1082 clock-frequency = <0>;
1083 };
1084 audio_clkb: audio_clkb {
1085 compatible = "fixed-clock";
1086 #clock-cells = <0>;
1087 clock-frequency = <0>;
1088 };
1089 audio_clkc: audio_clkc {
1090 compatible = "fixed-clock";
1091 #clock-cells = <0>;
1092 clock-frequency = <0>;
1093 };
1094
1095 cpg: clock-controller@e6150000 {
1096 compatible = "renesas,r8a7794-cpg-mssr";
1097 reg = <0 0xe6150000 0 0x1000>;
1098 clocks = <&extal_clk>, <&usb_extal_clk>;
1099 clock-names = "extal", "usb_extal";
1100 #clock-cells = <2>;
1101 #power-domain-cells = <0>;
098f5305 1102 #reset-cells = <1>;
0dce5454 1103 };
1cb2794f 1104
46edf183
GU
1105 rst: reset-controller@e6160000 {
1106 compatible = "renesas,r8a7794-rst";
1107 reg = <0 0xe6160000 0 0x0100>;
1108 };
1109
2357adb6
GU
1110 prr: chipid@ff000044 {
1111 compatible = "renesas,prr";
1112 reg = <0 0xff000044 0 4>;
1113 };
1114
0761ff2a
GU
1115 sysc: system-controller@e6180000 {
1116 compatible = "renesas,r8a7794-sysc";
1117 reg = <0 0xe6180000 0 0x0200>;
1118 #power-domain-cells = <1>;
1119 };
1120
1cb2794f 1121 ipmmu_sy0: mmu@e6280000 {
0da4cfd1 1122 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1cb2794f 1123 reg = <0 0xe6280000 0 0x1000>;
8d47e6af
SH
1124 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1125 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1cb2794f
LP
1126 #iommu-cells = <1>;
1127 status = "disabled";
1128 };
1129
1130 ipmmu_sy1: mmu@e6290000 {
0da4cfd1 1131 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1cb2794f 1132 reg = <0 0xe6290000 0 0x1000>;
8d47e6af 1133 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1cb2794f
LP
1134 #iommu-cells = <1>;
1135 status = "disabled";
1136 };
1137
1138 ipmmu_ds: mmu@e6740000 {
0da4cfd1 1139 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1cb2794f 1140 reg = <0 0xe6740000 0 0x1000>;
8d47e6af
SH
1141 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1142 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1cb2794f 1143 #iommu-cells = <1>;
832d3e4c 1144 status = "disabled";
1cb2794f
LP
1145 };
1146
1147 ipmmu_mp: mmu@ec680000 {
0da4cfd1 1148 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1cb2794f 1149 reg = <0 0xec680000 0 0x1000>;
8d47e6af 1150 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1cb2794f
LP
1151 #iommu-cells = <1>;
1152 status = "disabled";
1153 };
1154
1155 ipmmu_mx: mmu@fe951000 {
0da4cfd1 1156 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1cb2794f 1157 reg = <0 0xfe951000 0 0x1000>;
8d47e6af
SH
1158 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1159 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1cb2794f 1160 #iommu-cells = <1>;
832d3e4c 1161 status = "disabled";
1cb2794f
LP
1162 };
1163
1164 ipmmu_gp: mmu@e62a0000 {
0da4cfd1 1165 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1cb2794f 1166 reg = <0 0xe62a0000 0 0x1000>;
8d47e6af
SH
1167 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1168 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1cb2794f
LP
1169 #iommu-cells = <1>;
1170 status = "disabled";
1171 };
320d6c5a
SS
1172
1173 rcar_sound: sound@ec500000 {
1174 /*
1175 * #sound-dai-cells is required
1176 *
1177 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1178 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1179 */
1180 compatible = "renesas,rcar_sound-r8a7794",
1181 "renesas,rcar_sound-gen2";
1182 reg = <0 0xec500000 0 0x1000>, /* SCU */
1183 <0 0xec5a0000 0 0x100>, /* ADG */
1184 <0 0xec540000 0 0x1000>, /* SSIU */
1185 <0 0xec541000 0 0x280>, /* SSI */
1186 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
1187 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1188
58d6c357
GU
1189 clocks = <&cpg CPG_MOD 1005>,
1190 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1191 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1192 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1193 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1194 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1195 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
1196 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
1197 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
1198 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1199 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1200 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
320d6c5a 1201 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
58d6c357 1202 <&cpg CPG_CORE R8A7794_CLK_M2>;
320d6c5a
SS
1203 clock-names = "ssi-all",
1204 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1205 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1206 "src.6", "src.5", "src.4", "src.3", "src.2",
1207 "src.1",
1208 "ctu.0", "ctu.1",
1209 "mix.0", "mix.1",
1210 "dvc.0", "dvc.1",
1211 "clk_a", "clk_b", "clk_c", "clk_i";
24b2d930 1212 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
615beb75
GU
1213 resets = <&cpg 1005>,
1214 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1215 <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1216 <&cpg 1014>, <&cpg 1015>;
1217 reset-names = "ssi-all",
1218 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1219 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
320d6c5a
SS
1220
1221 status = "disabled";
1222
1223 rcar_sound,dvc {
0f4eebb6 1224 dvc0: dvc-0 {
320d6c5a
SS
1225 dmas = <&audma0 0xbc>;
1226 dma-names = "tx";
1227 };
0f4eebb6 1228 dvc1: dvc-1 {
320d6c5a
SS
1229 dmas = <&audma0 0xbe>;
1230 dma-names = "tx";
1231 };
1232 };
1233
1234 rcar_sound,mix {
0f4eebb6
GU
1235 mix0: mix-0 { };
1236 mix1: mix-1 { };
320d6c5a
SS
1237 };
1238
1239 rcar_sound,ctu {
0f4eebb6
GU
1240 ctu00: ctu-0 { };
1241 ctu01: ctu-1 { };
1242 ctu02: ctu-2 { };
1243 ctu03: ctu-3 { };
1244 ctu10: ctu-4 { };
1245 ctu11: ctu-5 { };
1246 ctu12: ctu-6 { };
1247 ctu13: ctu-7 { };
320d6c5a
SS
1248 };
1249
1250 rcar_sound,src {
0f4eebb6 1251 src-0 {
320d6c5a
SS
1252 status = "disabled";
1253 };
0f4eebb6 1254 src1: src-1 {
320d6c5a
SS
1255 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1256 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1257 dma-names = "rx", "tx";
1258 };
0f4eebb6 1259 src2: src-2 {
320d6c5a
SS
1260 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1261 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1262 dma-names = "rx", "tx";
1263 };
0f4eebb6 1264 src3: src-3 {
320d6c5a
SS
1265 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1266 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1267 dma-names = "rx", "tx";
1268 };
0f4eebb6 1269 src4: src-4 {
320d6c5a
SS
1270 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1271 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1272 dma-names = "rx", "tx";
1273 };
0f4eebb6 1274 src5: src-5 {
320d6c5a
SS
1275 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1276 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1277 dma-names = "rx", "tx";
1278 };
0f4eebb6 1279 src6: src-6 {
320d6c5a
SS
1280 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1281 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1282 dma-names = "rx", "tx";
1283 };
1284 };
1285
1286 rcar_sound,ssi {
0f4eebb6 1287 ssi0: ssi-0 {
320d6c5a
SS
1288 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1289 dmas = <&audma0 0x01>, <&audma0 0x02>,
1290 <&audma0 0x15>, <&audma0 0x16>;
1291 dma-names = "rx", "tx", "rxu", "txu";
1292 };
0f4eebb6 1293 ssi1: ssi-1 {
320d6c5a
SS
1294 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1295 dmas = <&audma0 0x03>, <&audma0 0x04>,
1296 <&audma0 0x49>, <&audma0 0x4a>;
1297 dma-names = "rx", "tx", "rxu", "txu";
1298 };
0f4eebb6 1299 ssi2: ssi-2 {
320d6c5a
SS
1300 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1301 dmas = <&audma0 0x05>, <&audma0 0x06>,
1302 <&audma0 0x63>, <&audma0 0x64>;
1303 dma-names = "rx", "tx", "rxu", "txu";
1304 };
0f4eebb6 1305 ssi3: ssi-3 {
320d6c5a
SS
1306 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1307 dmas = <&audma0 0x07>, <&audma0 0x08>,
1308 <&audma0 0x6f>, <&audma0 0x70>;
1309 dma-names = "rx", "tx", "rxu", "txu";
1310 };
0f4eebb6 1311 ssi4: ssi-4 {
320d6c5a
SS
1312 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1313 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1314 <&audma0 0x71>, <&audma0 0x72>;
1315 dma-names = "rx", "tx", "rxu", "txu";
1316 };
0f4eebb6 1317 ssi5: ssi-5 {
320d6c5a
SS
1318 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1319 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1320 <&audma0 0x73>, <&audma0 0x74>;
1321 dma-names = "rx", "tx", "rxu", "txu";
1322 };
0f4eebb6 1323 ssi6: ssi-6 {
320d6c5a
SS
1324 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1325 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1326 <&audma0 0x75>, <&audma0 0x76>;
1327 dma-names = "rx", "tx", "rxu", "txu";
1328 };
0f4eebb6 1329 ssi7: ssi-7 {
320d6c5a
SS
1330 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1331 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1332 <&audma0 0x79>, <&audma0 0x7a>;
1333 dma-names = "rx", "tx", "rxu", "txu";
1334 };
0f4eebb6 1335 ssi8: ssi-8 {
320d6c5a
SS
1336 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1337 dmas = <&audma0 0x11>, <&audma0 0x12>,
1338 <&audma0 0x7b>, <&audma0 0x7c>;
1339 dma-names = "rx", "tx", "rxu", "txu";
1340 };
0f4eebb6 1341 ssi9: ssi-9 {
320d6c5a
SS
1342 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1343 dmas = <&audma0 0x13>, <&audma0 0x14>,
1344 <&audma0 0x7d>, <&audma0 0x7e>;
1345 dma-names = "rx", "tx", "rxu", "txu";
1346 };
1347 };
1348 };
0dce5454 1349};