]>
Commit | Line | Data |
---|---|---|
fce152a6 | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
f3ee390e AS |
2 | /* |
3 | * Google Veyron Jerry Rev 3+ board device tree source | |
4 | * | |
5 | * Copyright 2015 Google, Inc | |
f3ee390e AS |
6 | */ |
7 | ||
8 | /dts-v1/; | |
9 | #include "rk3288-veyron-chromebook.dtsi" | |
10 | #include "cros-ec-sbs.dtsi" | |
11 | ||
12 | / { | |
13 | model = "Google Jerry"; | |
14 | compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6", | |
15 | "google,veyron-jerry-rev5", "google,veyron-jerry-rev4", | |
16 | "google,veyron-jerry-rev3", "google,veyron-jerry", | |
17 | "google,veyron", "rockchip,rk3288"; | |
18 | ||
19 | panel_regulator: panel-regulator { | |
20 | compatible = "regulator-fixed"; | |
21 | enable-active-high; | |
e9e79d53 | 22 | gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>; |
f3ee390e AS |
23 | pinctrl-names = "default"; |
24 | pinctrl-0 = <&lcd_enable_h>; | |
25 | regulator-name = "panel_regulator"; | |
1f45e8c6 | 26 | startup-delay-us = <100000>; |
f3ee390e AS |
27 | vin-supply = <&vcc33_sys>; |
28 | }; | |
29 | ||
30 | vcc18_lcd: vcc18-lcd { | |
31 | compatible = "regulator-fixed"; | |
32 | enable-active-high; | |
e9e79d53 | 33 | gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; |
f3ee390e AS |
34 | pinctrl-names = "default"; |
35 | pinctrl-0 = <&avdd_1v8_disp_en>; | |
36 | regulator-name = "vcc18_lcd"; | |
37 | regulator-always-on; | |
38 | regulator-boot-on; | |
39 | vin-supply = <&vcc18_wl>; | |
40 | }; | |
41 | ||
42 | backlight_regulator: backlight-regulator { | |
43 | compatible = "regulator-fixed"; | |
44 | enable-active-high; | |
e9e79d53 | 45 | gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; |
f3ee390e AS |
46 | pinctrl-names = "default"; |
47 | pinctrl-0 = <&bl_pwr_en>; | |
48 | regulator-name = "backlight_regulator"; | |
49 | vin-supply = <&vcc33_sys>; | |
50 | startup-delay-us = <15000>; | |
51 | }; | |
52 | }; | |
03deaf4a HS |
53 | |
54 | &backlight { | |
55 | power-supply = <&backlight_regulator>; | |
56 | }; | |
57 | ||
58 | &panel { | |
59 | power-supply= <&panel_regulator>; | |
60 | }; | |
f3ee390e AS |
61 | |
62 | &rk808 { | |
63 | pinctrl-names = "default"; | |
64 | pinctrl-0 = <&pmic_int_l>; | |
65 | ||
66 | regulators { | |
67 | mic_vcc: LDO_REG2 { | |
68 | regulator-name = "mic_vcc"; | |
69 | regulator-always-on; | |
70 | regulator-boot-on; | |
71 | regulator-min-microvolt = <1800000>; | |
72 | regulator-max-microvolt = <1800000>; | |
73 | regulator-state-mem { | |
467fb18a | 74 | regulator-off-in-suspend; |
f3ee390e AS |
75 | }; |
76 | }; | |
77 | }; | |
78 | }; | |
79 | ||
80 | &sdmmc { | |
81 | disable-wp; | |
82 | pinctrl-names = "default"; | |
83 | pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio | |
84 | &sdmmc_bus4>; | |
85 | }; | |
86 | ||
87 | &vcc_5v { | |
88 | enable-active-high; | |
e9e79d53 | 89 | gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>; |
f3ee390e AS |
90 | pinctrl-names = "default"; |
91 | pinctrl-0 = <&drv_5v>; | |
92 | }; | |
93 | ||
94 | &vcc50_hdmi { | |
95 | enable-active-high; | |
e9e79d53 | 96 | gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>; |
f3ee390e AS |
97 | pinctrl-names = "default"; |
98 | pinctrl-0 = <&vcc50_hdmi_en>; | |
99 | }; | |
100 | ||
101 | &pinctrl { | |
102 | backlight { | |
103 | bl_pwr_en: bl_pwr_en { | |
104 | rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>; | |
105 | }; | |
106 | }; | |
107 | ||
108 | buck-5v { | |
109 | drv_5v: drv-5v { | |
110 | rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>; | |
111 | }; | |
112 | }; | |
113 | ||
114 | hdmi { | |
115 | vcc50_hdmi_en: vcc50-hdmi-en { | |
116 | rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>; | |
117 | }; | |
118 | }; | |
119 | ||
120 | lcd { | |
121 | lcd_enable_h: lcd-en { | |
122 | rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>; | |
123 | }; | |
124 | ||
125 | avdd_1v8_disp_en: avdd-1v8-disp-en { | |
126 | rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>; | |
127 | }; | |
128 | }; | |
129 | ||
130 | pmic { | |
131 | dvs_1: dvs-1 { | |
132 | rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>; | |
133 | }; | |
134 | ||
135 | dvs_2: dvs-2 { | |
136 | rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>; | |
137 | }; | |
138 | }; | |
139 | }; | |
140 | ||
141 | &i2c4 { | |
142 | status = "okay"; | |
143 | ||
144 | /* | |
145 | * Trackpad pin control is shared between Elan and Synaptics devices | |
146 | * so we have to pull it up to the bus level. | |
147 | */ | |
148 | pinctrl-names = "default"; | |
149 | pinctrl-0 = <&i2c4_xfer &trackpad_int>; | |
150 | ||
151 | trackpad@15 { | |
152 | /* | |
153 | * Remove the inherited pinctrl settings to avoid clashing | |
154 | * with bus-wide ones. | |
155 | */ | |
156 | /delete-property/pinctrl-names; | |
157 | /delete-property/pinctrl-0; | |
158 | }; | |
159 | ||
160 | trackpad@2c { | |
161 | compatible = "hid-over-i2c"; | |
162 | interrupt-parent = <&gpio7>; | |
e9e79d53 | 163 | interrupts = <RK_PA3 IRQ_TYPE_EDGE_FALLING>; |
f3ee390e AS |
164 | reg = <0x2c>; |
165 | hid-descr-addr = <0x0020>; | |
166 | vcc-supply = <&vcc33_io>; | |
167 | wakeup-source; | |
168 | }; | |
169 | }; |