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13517157 RP |
1 | /* |
2 | * Google Veyron Speedy Rev 1+ board device tree source | |
3 | * | |
4 | * Copyright 2015 Google, Inc | |
5 | * | |
6 | * This file is dual-licensed: you can use it either under the terms | |
7 | * of the GPL or the X11 license, at your option. Note that this dual | |
8 | * licensing only applies to this file, and not this project as a | |
9 | * whole. | |
10 | * | |
11 | * a) This file is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of the | |
14 | * License, or (at your option) any later version. | |
15 | * | |
16 | * This file is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * Or, alternatively, | |
22 | * | |
23 | * b) Permission is hereby granted, free of charge, to any person | |
24 | * obtaining a copy of this software and associated documentation | |
25 | * files (the "Software"), to deal in the Software without | |
26 | * restriction, including without limitation the rights to use, | |
27 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
28 | * sell copies of the Software, and to permit persons to whom the | |
29 | * Software is furnished to do so, subject to the following | |
30 | * conditions: | |
31 | * | |
32 | * The above copyright notice and this permission notice shall be | |
33 | * included in all copies or substantial portions of the Software. | |
34 | * | |
35 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
36 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
37 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
38 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
39 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
40 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
41 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
42 | * OTHER DEALINGS IN THE SOFTWARE. | |
43 | */ | |
44 | ||
45 | /dts-v1/; | |
46 | #include "rk3288-veyron-chromebook.dtsi" | |
47 | #include "cros-ec-sbs.dtsi" | |
48 | ||
49 | / { | |
50 | model = "Google Speedy"; | |
51 | compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8", | |
52 | "google,veyron-speedy-rev7", "google,veyron-speedy-rev6", | |
53 | "google,veyron-speedy-rev5", "google,veyron-speedy-rev4", | |
54 | "google,veyron-speedy-rev3", "google,veyron-speedy-rev2", | |
55 | "google,veyron-speedy", "google,veyron", "rockchip,rk3288"; | |
56 | ||
57 | panel_regulator: panel-regulator { | |
58 | compatible = "regulator-fixed"; | |
59 | enable-active-high; | |
e9e79d53 | 60 | gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>; |
13517157 RP |
61 | pinctrl-names = "default"; |
62 | pinctrl-0 = <&lcd_enable_h>; | |
63 | regulator-name = "panel_regulator"; | |
1f45e8c6 | 64 | startup-delay-us = <100000>; |
13517157 RP |
65 | vin-supply = <&vcc33_sys>; |
66 | }; | |
67 | ||
68 | vcc18_lcd: vcc18-lcd { | |
69 | compatible = "regulator-fixed"; | |
70 | enable-active-high; | |
e9e79d53 | 71 | gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; |
13517157 RP |
72 | pinctrl-names = "default"; |
73 | pinctrl-0 = <&avdd_1v8_disp_en>; | |
74 | regulator-name = "vcc18_lcd"; | |
75 | regulator-always-on; | |
76 | regulator-boot-on; | |
77 | vin-supply = <&vcc18_wl>; | |
78 | }; | |
79 | ||
80 | backlight_regulator: backlight-regulator { | |
81 | compatible = "regulator-fixed"; | |
82 | enable-active-high; | |
e9e79d53 | 83 | gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; |
13517157 RP |
84 | pinctrl-names = "default"; |
85 | pinctrl-0 = <&bl_pwr_en>; | |
86 | regulator-name = "backlight_regulator"; | |
87 | vin-supply = <&vcc33_sys>; | |
88 | startup-delay-us = <15000>; | |
89 | }; | |
90 | }; | |
91 | ||
03deaf4a HS |
92 | &backlight { |
93 | power-supply = <&backlight_regulator>; | |
94 | }; | |
95 | ||
97cb9ce9 HS |
96 | &cpu_alert0 { |
97 | temperature = <65000>; | |
98 | }; | |
99 | ||
100 | &cpu_alert1 { | |
101 | temperature = <70000>; | |
102 | }; | |
103 | ||
2f171d40 HS |
104 | &edp { |
105 | /delete-property/pinctrl-names; | |
106 | /delete-property/pinctrl-0; | |
107 | ||
108 | force-hpd; | |
109 | }; | |
110 | ||
03deaf4a HS |
111 | &panel { |
112 | power-supply= <&panel_regulator>; | |
113 | }; | |
114 | ||
13517157 RP |
115 | &rk808 { |
116 | pinctrl-names = "default"; | |
117 | pinctrl-0 = <&pmic_int_l>; | |
118 | }; | |
119 | ||
120 | &sdmmc { | |
121 | disable-wp; | |
122 | pinctrl-names = "default"; | |
123 | pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio | |
124 | &sdmmc_bus4>; | |
125 | }; | |
126 | ||
127 | &vcc_5v { | |
128 | enable-active-high; | |
e9e79d53 | 129 | gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>; |
13517157 RP |
130 | pinctrl-names = "default"; |
131 | pinctrl-0 = <&drv_5v>; | |
132 | }; | |
133 | ||
134 | &vcc50_hdmi { | |
135 | enable-active-high; | |
e9e79d53 | 136 | gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>; |
13517157 RP |
137 | pinctrl-names = "default"; |
138 | pinctrl-0 = <&vcc50_hdmi_en>; | |
139 | }; | |
140 | ||
141 | &pinctrl { | |
142 | backlight { | |
143 | bl_pwr_en: bl_pwr_en { | |
144 | rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>; | |
145 | }; | |
146 | }; | |
147 | ||
148 | buck-5v { | |
149 | drv_5v: drv-5v { | |
150 | rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>; | |
151 | }; | |
152 | }; | |
153 | ||
154 | hdmi { | |
155 | vcc50_hdmi_en: vcc50-hdmi-en { | |
156 | rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>; | |
157 | }; | |
158 | }; | |
159 | ||
160 | lcd { | |
161 | lcd_enable_h: lcd-en { | |
162 | rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>; | |
163 | }; | |
164 | ||
165 | avdd_1v8_disp_en: avdd-1v8-disp-en { | |
166 | rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>; | |
167 | }; | |
168 | }; | |
169 | ||
170 | pmic { | |
171 | dvs_1: dvs-1 { | |
172 | rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>; | |
173 | }; | |
174 | ||
175 | dvs_2: dvs-2 { | |
176 | rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>; | |
177 | }; | |
178 | }; | |
179 | }; |