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e28ea9db AS |
1 | /* |
2 | * Google Veyron (and derivatives) board device tree source | |
3 | * | |
4 | * Copyright 2015 Google, Inc | |
5 | * | |
6 | * This file is dual-licensed: you can use it either under the terms | |
7 | * of the GPL or the X11 license, at your option. Note that this dual | |
8 | * licensing only applies to this file, and not this project as a | |
9 | * whole. | |
10 | * | |
11 | * a) This file is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of the | |
14 | * License, or (at your option) any later version. | |
15 | * | |
16 | * This file is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * Or, alternatively, | |
22 | * | |
23 | * b) Permission is hereby granted, free of charge, to any person | |
24 | * obtaining a copy of this software and associated documentation | |
25 | * files (the "Software"), to deal in the Software without | |
26 | * restriction, including without limitation the rights to use, | |
27 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
28 | * sell copies of the Software, and to permit persons to whom the | |
29 | * Software is furnished to do so, subject to the following | |
30 | * conditions: | |
31 | * | |
32 | * The above copyright notice and this permission notice shall be | |
33 | * included in all copies or substantial portions of the Software. | |
34 | * | |
35 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
36 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
37 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
38 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
39 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
40 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
41 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
42 | * OTHER DEALINGS IN THE SOFTWARE. | |
43 | */ | |
44 | ||
45 | #include <dt-bindings/clock/rockchip,rk808.h> | |
46 | #include <dt-bindings/input/input.h> | |
47 | #include "rk3288.dtsi" | |
48 | ||
49 | / { | |
acfc73b1 HS |
50 | /* |
51 | * The default coreboot on veyron devices ignores memory@0 nodes | |
52 | * and would instead create another memory node. | |
53 | */ | |
54 | memory { | |
e28ea9db | 55 | device_type = "memory"; |
79db45be | 56 | reg = <0x0 0x0 0x0 0x80000000>; |
e28ea9db AS |
57 | }; |
58 | ||
59 | gpio_keys: gpio-keys { | |
60 | compatible = "gpio-keys"; | |
61 | #address-cells = <1>; | |
62 | #size-cells = <0>; | |
63 | ||
64 | pinctrl-names = "default"; | |
65 | pinctrl-0 = <&pwr_key_l>; | |
66 | power { | |
67 | label = "Power"; | |
e9e79d53 | 68 | gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; |
e28ea9db AS |
69 | linux,code = <KEY_POWER>; |
70 | debounce-interval = <100>; | |
4f66f247 | 71 | wakeup-source; |
e28ea9db AS |
72 | }; |
73 | }; | |
74 | ||
75 | gpio-restart { | |
76 | compatible = "gpio-restart"; | |
e9e79d53 | 77 | gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; |
e28ea9db AS |
78 | pinctrl-names = "default"; |
79 | pinctrl-0 = <&ap_warm_reset_h>; | |
80 | priority = <200>; | |
81 | }; | |
82 | ||
83 | emmc_pwrseq: emmc-pwrseq { | |
84 | compatible = "mmc-pwrseq-emmc"; | |
85 | pinctrl-0 = <&emmc_reset>; | |
86 | pinctrl-names = "default"; | |
e9e79d53 | 87 | reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; |
e28ea9db AS |
88 | }; |
89 | ||
e28ea9db AS |
90 | sdio_pwrseq: sdio-pwrseq { |
91 | compatible = "mmc-pwrseq-simple"; | |
92 | clocks = <&rk808 RK808_CLKOUT1>; | |
93 | clock-names = "ext_clock"; | |
94 | pinctrl-names = "default"; | |
95 | pinctrl-0 = <&bt_enable_l>, <&wifi_enable_h>; | |
96 | ||
97 | /* | |
98 | * On the module itself this is one of these (depending | |
99 | * on the actual card populated): | |
100 | * - SDIO_RESET_L_WL_REG_ON | |
101 | * - PDN (power down when low) | |
102 | */ | |
e9e79d53 | 103 | reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>; |
e28ea9db AS |
104 | }; |
105 | ||
106 | vcc_5v: vcc-5v { | |
107 | compatible = "regulator-fixed"; | |
108 | regulator-name = "vcc_5v"; | |
109 | regulator-always-on; | |
110 | regulator-boot-on; | |
111 | regulator-min-microvolt = <5000000>; | |
112 | regulator-max-microvolt = <5000000>; | |
113 | }; | |
114 | ||
115 | vcc33_sys: vcc33-sys { | |
116 | compatible = "regulator-fixed"; | |
117 | regulator-name = "vcc33_sys"; | |
118 | regulator-always-on; | |
119 | regulator-boot-on; | |
120 | regulator-min-microvolt = <3300000>; | |
121 | regulator-max-microvolt = <3300000>; | |
122 | }; | |
123 | ||
124 | vcc50_hdmi: vcc50-hdmi { | |
125 | compatible = "regulator-fixed"; | |
126 | regulator-name = "vcc50_hdmi"; | |
127 | regulator-always-on; | |
128 | regulator-boot-on; | |
129 | vin-supply = <&vcc_5v>; | |
130 | }; | |
131 | }; | |
132 | ||
133 | &cpu0 { | |
134 | cpu0-supply = <&vdd_cpu>; | |
1ab0c304 HS |
135 | operating-points = < |
136 | /* KHz uV */ | |
137 | 1800000 1400000 | |
138 | 1704000 1350000 | |
139 | 1608000 1300000 | |
140 | 1512000 1250000 | |
141 | 1416000 1200000 | |
142 | 1200000 1100000 | |
143 | 1008000 1050000 | |
144 | 816000 1000000 | |
145 | 696000 950000 | |
146 | 600000 900000 | |
147 | 408000 900000 | |
148 | 216000 900000 | |
149 | 126000 900000 | |
150 | >; | |
e28ea9db AS |
151 | }; |
152 | ||
153 | &emmc { | |
154 | status = "okay"; | |
155 | ||
e28ea9db AS |
156 | bus-width = <8>; |
157 | cap-mmc-highspeed; | |
c41d31f7 | 158 | rockchip,default-sample-phase = <158>; |
e28ea9db | 159 | disable-wp; |
c41d31f7 | 160 | mmc-hs200-1_8v; |
e28ea9db AS |
161 | mmc-pwrseq = <&emmc_pwrseq>; |
162 | non-removable; | |
e28ea9db AS |
163 | pinctrl-names = "default"; |
164 | pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; | |
165 | }; | |
166 | ||
08e779e5 EBS |
167 | &gpu { |
168 | mali-supply = <&vdd_gpu>; | |
169 | status = "okay"; | |
170 | }; | |
171 | ||
e28ea9db | 172 | &hdmi { |
a797451b | 173 | ddc-i2c-bus = <&i2c5>; |
e28ea9db AS |
174 | status = "okay"; |
175 | }; | |
176 | ||
177 | &i2c0 { | |
178 | status = "okay"; | |
179 | ||
180 | clock-frequency = <400000>; | |
181 | i2c-scl-falling-time-ns = <50>; /* 2.5ns measured */ | |
182 | i2c-scl-rising-time-ns = <100>; /* 45ns measured */ | |
183 | ||
184 | rk808: pmic@1b { | |
185 | compatible = "rockchip,rk808"; | |
186 | reg = <0x1b>; | |
187 | clock-output-names = "xin32k", "wifibt_32kin"; | |
188 | interrupt-parent = <&gpio0>; | |
e9e79d53 | 189 | interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>; |
e28ea9db AS |
190 | pinctrl-names = "default"; |
191 | pinctrl-0 = <&pmic_int_l>; | |
192 | rockchip,system-power-controller; | |
193 | wakeup-source; | |
194 | #clock-cells = <1>; | |
195 | ||
196 | vcc1-supply = <&vcc33_sys>; | |
197 | vcc2-supply = <&vcc33_sys>; | |
198 | vcc3-supply = <&vcc33_sys>; | |
199 | vcc4-supply = <&vcc33_sys>; | |
200 | vcc6-supply = <&vcc_5v>; | |
201 | vcc7-supply = <&vcc33_sys>; | |
202 | vcc8-supply = <&vcc33_sys>; | |
203 | vcc12-supply = <&vcc_18>; | |
204 | vddio-supply = <&vcc33_io>; | |
205 | ||
206 | regulators { | |
207 | vdd_cpu: DCDC_REG1 { | |
208 | regulator-name = "vdd_arm"; | |
209 | regulator-always-on; | |
210 | regulator-boot-on; | |
211 | regulator-min-microvolt = <750000>; | |
212 | regulator-max-microvolt = <1450000>; | |
213 | regulator-ramp-delay = <6001>; | |
214 | regulator-state-mem { | |
215 | regulator-off-in-suspend; | |
216 | }; | |
217 | }; | |
218 | ||
219 | vdd_gpu: DCDC_REG2 { | |
220 | regulator-name = "vdd_gpu"; | |
221 | regulator-always-on; | |
222 | regulator-boot-on; | |
223 | regulator-min-microvolt = <800000>; | |
224 | regulator-max-microvolt = <1250000>; | |
225 | regulator-ramp-delay = <6001>; | |
226 | regulator-state-mem { | |
227 | regulator-on-in-suspend; | |
228 | regulator-suspend-microvolt = <1000000>; | |
229 | }; | |
230 | }; | |
231 | ||
232 | vcc135_ddr: DCDC_REG3 { | |
233 | regulator-name = "vcc135_ddr"; | |
234 | regulator-always-on; | |
235 | regulator-boot-on; | |
236 | regulator-state-mem { | |
237 | regulator-on-in-suspend; | |
238 | }; | |
239 | }; | |
240 | ||
241 | /* | |
242 | * vcc_18 has several aliases. (vcc18_flashio and | |
243 | * vcc18_wl). We'll add those aliases here just to | |
244 | * make it easier to follow the schematic. The signals | |
245 | * are actually hooked together and only separated for | |
246 | * power measurement purposes). | |
247 | */ | |
248 | vcc18_wl: vcc18_flashio: vcc_18: DCDC_REG4 { | |
249 | regulator-name = "vcc_18"; | |
250 | regulator-always-on; | |
251 | regulator-boot-on; | |
252 | regulator-min-microvolt = <1800000>; | |
253 | regulator-max-microvolt = <1800000>; | |
254 | regulator-state-mem { | |
255 | regulator-on-in-suspend; | |
256 | regulator-suspend-microvolt = <1800000>; | |
257 | }; | |
258 | }; | |
259 | ||
260 | /* | |
261 | * Note that both vcc33_io and vcc33_pmuio are always | |
262 | * powered together. To simplify the logic in the dts | |
263 | * we just refer to vcc33_io every time something is | |
264 | * powered from vcc33_pmuio. In fact, on later boards | |
265 | * (such as danger) they're the same net. | |
266 | */ | |
267 | vcc33_io: LDO_REG1 { | |
268 | regulator-name = "vcc33_io"; | |
269 | regulator-always-on; | |
270 | regulator-boot-on; | |
271 | regulator-min-microvolt = <3300000>; | |
272 | regulator-max-microvolt = <3300000>; | |
273 | regulator-state-mem { | |
274 | regulator-on-in-suspend; | |
275 | regulator-suspend-microvolt = <3300000>; | |
276 | }; | |
277 | }; | |
278 | ||
279 | vdd_10: LDO_REG3 { | |
280 | regulator-name = "vdd_10"; | |
281 | regulator-always-on; | |
282 | regulator-boot-on; | |
283 | regulator-min-microvolt = <1000000>; | |
284 | regulator-max-microvolt = <1000000>; | |
285 | regulator-state-mem { | |
286 | regulator-on-in-suspend; | |
287 | regulator-suspend-microvolt = <1000000>; | |
288 | }; | |
289 | }; | |
290 | ||
291 | vdd10_lcd_pwren_h: LDO_REG7 { | |
292 | regulator-name = "vdd10_lcd_pwren_h"; | |
293 | regulator-always-on; | |
294 | regulator-boot-on; | |
295 | regulator-min-microvolt = <2500000>; | |
296 | regulator-max-microvolt = <2500000>; | |
297 | regulator-state-mem { | |
298 | regulator-off-in-suspend; | |
299 | }; | |
300 | }; | |
301 | ||
302 | vcc33_lcd: SWITCH_REG1 { | |
303 | regulator-name = "vcc33_lcd"; | |
304 | regulator-always-on; | |
305 | regulator-boot-on; | |
306 | regulator-state-mem { | |
307 | regulator-off-in-suspend; | |
308 | }; | |
309 | }; | |
310 | }; | |
311 | }; | |
312 | }; | |
313 | ||
314 | &i2c1 { | |
315 | status = "okay"; | |
316 | ||
317 | clock-frequency = <400000>; | |
318 | i2c-scl-falling-time-ns = <50>; /* 2.5ns measured */ | |
319 | i2c-scl-rising-time-ns = <100>; /* 40ns measured */ | |
320 | ||
321 | tpm: tpm@20 { | |
322 | compatible = "infineon,slb9645tt"; | |
323 | reg = <0x20>; | |
324 | powered-while-suspended; | |
325 | }; | |
326 | }; | |
327 | ||
328 | &i2c2 { | |
329 | status = "okay"; | |
330 | ||
331 | /* 100kHz since 4.7k resistors don't rise fast enough */ | |
332 | clock-frequency = <100000>; | |
333 | i2c-scl-falling-time-ns = <50>; /* 10ns measured */ | |
334 | i2c-scl-rising-time-ns = <800>; /* 600ns measured */ | |
335 | }; | |
336 | ||
337 | &i2c4 { | |
338 | status = "okay"; | |
339 | ||
340 | clock-frequency = <400000>; | |
341 | i2c-scl-falling-time-ns = <50>; /* 11ns measured */ | |
342 | i2c-scl-rising-time-ns = <300>; /* 225ns measured */ | |
343 | }; | |
344 | ||
345 | &i2c5 { | |
346 | status = "okay"; | |
347 | ||
348 | clock-frequency = <100000>; | |
349 | i2c-scl-falling-time-ns = <300>; | |
350 | i2c-scl-rising-time-ns = <1000>; | |
351 | }; | |
352 | ||
3445b2fa HS |
353 | &io_domains { |
354 | status = "okay"; | |
355 | ||
356 | bb-supply = <&vcc33_io>; | |
357 | dvp-supply = <&vcc_18>; | |
358 | flash0-supply = <&vcc18_flashio>; | |
359 | gpio1830-supply = <&vcc33_io>; | |
360 | gpio30-supply = <&vcc33_io>; | |
361 | lcdc-supply = <&vcc33_lcd>; | |
362 | wifi-supply = <&vcc18_wl>; | |
363 | }; | |
364 | ||
e28ea9db AS |
365 | &pwm1 { |
366 | status = "okay"; | |
367 | }; | |
368 | ||
369 | &sdio0 { | |
370 | status = "okay"; | |
371 | ||
e28ea9db AS |
372 | bus-width = <4>; |
373 | cap-sd-highspeed; | |
374 | cap-sdio-irq; | |
375 | keep-power-in-suspend; | |
376 | mmc-pwrseq = <&sdio_pwrseq>; | |
377 | non-removable; | |
e28ea9db AS |
378 | pinctrl-names = "default"; |
379 | pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>; | |
c41d31f7 HS |
380 | sd-uhs-sdr12; |
381 | sd-uhs-sdr25; | |
382 | sd-uhs-sdr50; | |
383 | sd-uhs-sdr104; | |
e28ea9db AS |
384 | vmmc-supply = <&vcc33_sys>; |
385 | vqmmc-supply = <&vcc18_wl>; | |
386 | }; | |
387 | ||
388 | &spi2 { | |
389 | status = "okay"; | |
390 | ||
391 | rx-sample-delay-ns = <12>; | |
9a205e33 BN |
392 | |
393 | flash@0 { | |
394 | compatible = "jedec,spi-nor"; | |
395 | spi-max-frequency = <50000000>; | |
396 | reg = <0>; | |
397 | }; | |
e28ea9db AS |
398 | }; |
399 | ||
400 | &tsadc { | |
401 | status = "okay"; | |
402 | ||
117ccc11 RP |
403 | rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ |
404 | rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ | |
e28ea9db AS |
405 | }; |
406 | ||
407 | &uart0 { | |
408 | status = "okay"; | |
409 | ||
410 | /* We need to go faster than 24MHz, so adjust clock parents / rates */ | |
411 | assigned-clocks = <&cru SCLK_UART0>; | |
412 | assigned-clock-rates = <48000000>; | |
413 | ||
414 | /* Pins don't include flow control by default; add that in */ | |
415 | pinctrl-names = "default"; | |
416 | pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; | |
417 | }; | |
418 | ||
419 | &uart1 { | |
420 | status = "okay"; | |
421 | }; | |
422 | ||
423 | &uart2 { | |
424 | status = "okay"; | |
425 | }; | |
426 | ||
427 | &usbphy { | |
428 | status = "okay"; | |
429 | }; | |
430 | ||
431 | &usb_host0_ehci { | |
432 | status = "okay"; | |
433 | ||
434 | needs-reset-on-resume; | |
435 | }; | |
436 | ||
437 | &usb_host1 { | |
438 | status = "okay"; | |
439 | }; | |
440 | ||
441 | &usb_otg { | |
442 | status = "okay"; | |
443 | ||
444 | assigned-clocks = <&cru SCLK_USBPHY480M_SRC>; | |
219a5859 | 445 | assigned-clock-parents = <&usbphy0>; |
e28ea9db AS |
446 | dr_mode = "host"; |
447 | }; | |
448 | ||
449 | &vopb { | |
450 | status = "okay"; | |
451 | }; | |
452 | ||
453 | &vopb_mmu { | |
454 | status = "okay"; | |
455 | }; | |
456 | ||
457 | &wdt { | |
458 | status = "okay"; | |
459 | }; | |
460 | ||
461 | &pinctrl { | |
462 | pinctrl-names = "default", "sleep"; | |
463 | pinctrl-0 = < | |
464 | /* Common for sleep and wake, but no owners */ | |
465 | &global_pwroff | |
466 | >; | |
467 | pinctrl-1 = < | |
468 | /* Common for sleep and wake, but no owners */ | |
469 | &global_pwroff | |
470 | >; | |
471 | ||
472 | pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { | |
473 | bias-disable; | |
474 | drive-strength = <8>; | |
475 | }; | |
476 | ||
477 | pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { | |
478 | bias-pull-up; | |
479 | drive-strength = <8>; | |
480 | }; | |
481 | ||
482 | pcfg_output_high: pcfg-output-high { | |
483 | output-high; | |
484 | }; | |
485 | ||
486 | pcfg_output_low: pcfg-output-low { | |
487 | output-low; | |
488 | }; | |
489 | ||
490 | buttons { | |
491 | pwr_key_l: pwr-key-l { | |
492 | rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; | |
493 | }; | |
494 | }; | |
495 | ||
496 | emmc { | |
497 | emmc_reset: emmc-reset { | |
498 | rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>; | |
499 | }; | |
500 | ||
501 | /* | |
502 | * We run eMMC at max speed; bump up drive strength. | |
503 | * We also have external pulls, so disable the internal ones. | |
504 | */ | |
505 | emmc_clk: emmc-clk { | |
506 | rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_drv_8ma>; | |
507 | }; | |
508 | ||
509 | emmc_cmd: emmc-cmd { | |
510 | rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_drv_8ma>; | |
511 | }; | |
512 | ||
513 | emmc_bus8: emmc-bus8 { | |
514 | rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_drv_8ma>, | |
515 | <3 1 RK_FUNC_2 &pcfg_pull_none_drv_8ma>, | |
516 | <3 2 RK_FUNC_2 &pcfg_pull_none_drv_8ma>, | |
517 | <3 3 RK_FUNC_2 &pcfg_pull_none_drv_8ma>, | |
518 | <3 4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>, | |
519 | <3 5 RK_FUNC_2 &pcfg_pull_none_drv_8ma>, | |
520 | <3 6 RK_FUNC_2 &pcfg_pull_none_drv_8ma>, | |
521 | <3 7 RK_FUNC_2 &pcfg_pull_none_drv_8ma>; | |
522 | }; | |
523 | }; | |
524 | ||
525 | pmic { | |
526 | pmic_int_l: pmic-int-l { | |
527 | rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>; | |
528 | }; | |
529 | }; | |
530 | ||
531 | reboot { | |
532 | ap_warm_reset_h: ap-warm-reset-h { | |
533 | rockchip,pins = <RK_GPIO0 13 RK_FUNC_GPIO &pcfg_pull_none>; | |
534 | }; | |
535 | }; | |
536 | ||
537 | recovery-switch { | |
538 | rec_mode_l: rec-mode-l { | |
539 | rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>; | |
540 | }; | |
541 | }; | |
542 | ||
543 | sdio0 { | |
544 | wifi_enable_h: wifienable-h { | |
545 | rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>; | |
546 | }; | |
547 | ||
548 | /* NOTE: mislabelled on schematic; should be bt_enable_h */ | |
549 | bt_enable_l: bt-enable-l { | |
550 | rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_none>; | |
551 | }; | |
552 | ||
553 | /* | |
554 | * We run sdio0 at max speed; bump up drive strength. | |
555 | * We also have external pulls, so disable the internal ones. | |
556 | */ | |
557 | sdio0_bus4: sdio0-bus4 { | |
558 | rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>, | |
559 | <4 21 RK_FUNC_1 &pcfg_pull_none_drv_8ma>, | |
560 | <4 22 RK_FUNC_1 &pcfg_pull_none_drv_8ma>, | |
561 | <4 23 RK_FUNC_1 &pcfg_pull_none_drv_8ma>; | |
562 | }; | |
563 | ||
564 | sdio0_cmd: sdio0-cmd { | |
565 | rockchip,pins = <4 24 RK_FUNC_1 &pcfg_pull_none_drv_8ma>; | |
566 | }; | |
567 | ||
568 | sdio0_clk: sdio0-clk { | |
569 | rockchip,pins = <4 25 RK_FUNC_1 &pcfg_pull_none_drv_8ma>; | |
570 | }; | |
571 | }; | |
572 | ||
573 | tpm { | |
574 | tpm_int_h: tpm-int-h { | |
575 | rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>; | |
576 | }; | |
577 | }; | |
578 | ||
e28ea9db AS |
579 | write-protect { |
580 | fw_wp_ap: fw-wp-ap { | |
581 | rockchip,pins = <7 6 RK_FUNC_GPIO &pcfg_pull_none>; | |
582 | }; | |
583 | }; | |
584 | }; |