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ce2f0e09 | 1 | // SPDX-License-Identifier: GPL-2.0 |
4961cfd5 TF |
2 | /* |
3 | * Samsung's S3C6400 SoC device tree source | |
4 | * | |
5 | * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com> | |
6 | * | |
7 | * Samsung's S3C6400 SoC device nodes are listed in this file. S3C6400 | |
8 | * based board files can include this file and provide values for board specfic | |
9 | * bindings. | |
10 | * | |
11 | * Note: This file does not include device nodes for all the controllers in | |
12 | * S3C6400 SoC. As device tree coverage for S3C6400 increases, additional | |
13 | * nodes can be added to this file. | |
ce2f0e09 | 14 | */ |
4961cfd5 TF |
15 | |
16 | #include "s3c64xx.dtsi" | |
17 | ||
18 | / { | |
19 | compatible = "samsung,s3c6400"; | |
20 | }; | |
21 | ||
22 | &vic0 { | |
23 | valid-mask = <0xfffffe1f>; | |
24 | valid-wakeup-mask = <0x00200004>; | |
25 | }; | |
26 | ||
27 | &vic1 { | |
28 | valid-mask = <0xffffffff>; | |
29 | valid-wakeup-mask = <0x53020000>; | |
30 | }; | |
31 | ||
32 | &soc { | |
33 | clocks: clock-controller@7e00f000 { | |
34 | compatible = "samsung,s3c6400-clock"; | |
35 | reg = <0x7e00f000 0x1000>; | |
36 | #clock-cells = <1>; | |
37 | }; | |
38 | }; |