projects / mirror_ubuntu-eoan-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| ce2f0e09 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2ec35a42 TF |
2 | /* |
| 3 | * Samsung S3C6410 based SMDK6410 board device tree source. | |
| 4 | * | |
| 5 | * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com> | |
| 6 | * | |
| 7 | * Device tree source file for SAMSUNG SMDK6410 board which is based on | |
| 8 | * Samsung's S3C6410 SoC. | |
| ce2f0e09 | 9 | */ |
| 2ec35a42 TF |
10 | |
| 11 | /dts-v1/; | |
| 12 | ||
| 13 | #include <dt-bindings/gpio/gpio.h> | |
| 14 | #include <dt-bindings/interrupt-controller/irq.h> | |
| 15 | ||
| 16 | #include "s3c6410.dtsi" | |
| 17 | ||
| 18 | / { | |
| 19 | model = "SAMSUNG SMDK6410 board based on S3C6410"; | |
| 20 | compatible = "samsung,mini6410", "samsung,s3c6410"; | |
| 21 | ||
| d5bb3a8e KK |
22 | memory@50000000 { |
| 23 | device_type = "memory"; | |
| 2ec35a42 TF |
24 | reg = <0x50000000 0x8000000>; |
| 25 | }; | |
| 26 | ||
| 27 | chosen { | |
| 28 | bootargs = "console=ttySAC0,115200n8 earlyprintk rootwait root=/dev/mmcblk0p1"; | |
| 29 | }; | |
| 30 | ||
| 31 | clocks { | |
| 32 | compatible = "simple-bus"; | |
| 33 | #address-cells = <1>; | |
| 34 | #size-cells = <0>; | |
| 35 | ||
| 36 | fin_pll: oscillator@0 { | |
| 37 | compatible = "fixed-clock"; | |
| 38 | reg = <0>; | |
| 39 | clock-frequency = <12000000>; | |
| 40 | clock-output-names = "fin_pll"; | |
| 41 | #clock-cells = <0>; | |
| 42 | }; | |
| 43 | ||
| 44 | xusbxti: oscillator@1 { | |
| 45 | compatible = "fixed-clock"; | |
| 46 | reg = <1>; | |
| 47 | clock-output-names = "xusbxti"; | |
| 48 | clock-frequency = <48000000>; | |
| 49 | #clock-cells = <0>; | |
| 50 | }; | |
| 51 | }; | |
| 52 | ||
| 53 | srom-cs1@18000000 { | |
| 54 | compatible = "simple-bus"; | |
| 55 | #address-cells = <1>; | |
| 56 | #size-cells = <1>; | |
| 57 | reg = <0x18000000 0x8000000>; | |
| 58 | ranges; | |
| 59 | ||
| 60 | ethernet@18000000 { | |
| 61 | compatible = "smsc,lan9115"; | |
| 62 | reg = <0x18000000 0x10000>; | |
| 63 | interrupt-parent = <&gpn>; | |
| 64 | interrupts = <10 IRQ_TYPE_LEVEL_LOW>; | |
| 65 | phy-mode = "mii"; | |
| 66 | reg-io-width = <4>; | |
| 67 | smsc,force-internal-phy; | |
| 68 | }; | |
| 69 | }; | |
| 70 | }; | |
| 71 | ||
| 72 | &sdhci0 { | |
| 73 | pinctrl-names = "default"; | |
| 74 | pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>; | |
| 75 | bus-width = <4>; | |
| 76 | status = "okay"; | |
| 77 | }; | |
| 78 | ||
| 79 | &uart0 { | |
| 80 | pinctrl-names = "default"; | |
| 81 | pinctrl-0 = <&uart0_data>, <&uart0_fctl>; | |
| 82 | status = "okay"; | |
| 83 | }; | |
| 84 | ||
| 85 | &uart1 { | |
| 86 | pinctrl-names = "default"; | |
| 87 | pinctrl-0 = <&uart1_data>; | |
| 88 | status = "okay"; | |
| 89 | }; | |
| 90 | ||
| 91 | &uart2 { | |
| 92 | pinctrl-names = "default"; | |
| 93 | pinctrl-0 = <&uart2_data>; | |
| 94 | status = "okay"; | |
| 95 | }; | |
| 96 | ||
| 97 | &uart3 { | |
| 98 | pinctrl-names = "default"; | |
| 99 | pinctrl-0 = <&uart3_data>; | |
| 100 | status = "okay"; | |
| 101 | }; |