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ce2f0e09 | 1 | // SPDX-License-Identifier: GPL-2.0 |
4961cfd5 TF |
2 | /* |
3 | * Samsung's S3C6410 SoC device tree source | |
4 | * | |
5 | * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com> | |
6 | * | |
7 | * Samsung's S3C6410 SoC device nodes are listed in this file. S3C6410 | |
8 | * based board files can include this file and provide values for board specfic | |
9 | * bindings. | |
10 | * | |
11 | * Note: This file does not include device nodes for all the controllers in | |
12 | * S3C6410 SoC. As device tree coverage for S3C6410 increases, additional | |
13 | * nodes can be added to this file. | |
ce2f0e09 | 14 | */ |
4961cfd5 TF |
15 | |
16 | #include "s3c64xx.dtsi" | |
17 | ||
18 | / { | |
19 | compatible = "samsung,s3c6410"; | |
20 | ||
21 | aliases { | |
22 | i2c1 = &i2c1; | |
23 | }; | |
24 | }; | |
25 | ||
26 | &vic0 { | |
27 | valid-mask = <0xffffff7f>; | |
28 | valid-wakeup-mask = <0x00200004>; | |
29 | }; | |
30 | ||
31 | &vic1 { | |
32 | valid-mask = <0xffffffff>; | |
33 | valid-wakeup-mask = <0x53020000>; | |
34 | }; | |
35 | ||
36 | &soc { | |
37 | clocks: clock-controller@7e00f000 { | |
38 | compatible = "samsung,s3c6410-clock"; | |
39 | reg = <0x7e00f000 0x1000>; | |
40 | #clock-cells = <1>; | |
41 | }; | |
42 | ||
43 | i2c1: i2c@7f00f000 { | |
44 | compatible = "samsung,s3c2440-i2c"; | |
45 | reg = <0x7f00f000 0x1000>; | |
46 | interrupt-parent = <&vic0>; | |
47 | interrupts = <5>; | |
48 | clock-names = "i2c"; | |
49 | clocks = <&clocks PCLK_IIC1>; | |
50 | status = "disabled"; | |
51 | #address-cells = <1>; | |
52 | #size-cells = <0>; | |
53 | }; | |
54 | }; |