[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / s5pv210.dtsi

// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung's S5PV210 SoC device tree source
 *
 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
 *
 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
 * Tomasz Figa <t.figa@samsung.com>
 *
 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
 * based board files can include this file and provide values for board specfic
 * bindings.
 *
 * Note: This file does not include device nodes for all the controllers in
 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
 * nodes can be added to this file.
 */

#include <dt-bindings/clock/s5pv210.h>
#include <dt-bindings/clock/s5pv210-audss.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		csis0 = &csis0;
		dmc0 = &dmc0;
		dmc1 = &dmc1;
		fimc0 = &fimc0;
		fimc1 = &fimc1;
		fimc2 = &fimc2;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2s0 = &i2s0;
		i2s1 = &i2s1;
		i2s2 = &i2s2;
		pinctrl0 = &pinctrl0;
		spi0 = &spi0;
		spi1 = &spi1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a8";
			reg = <0>;
		};
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		external-clocks {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <0>;

			xxti: oscillator@0 {
				compatible = "fixed-clock";
				reg = <0>;
				clock-frequency = <0>;
				clock-output-names = "xxti";
				#clock-cells = <0>;
			};

			xusbxti: oscillator@1 {
				compatible = "fixed-clock";
				reg = <1>;
				clock-frequency = <0>;
				clock-output-names = "xusbxti";
				#clock-cells = <0>;
			};
		};

		onenand: onenand@b0600000 {
			compatible = "samsung,s5pv210-onenand";
			reg = <0xb0600000 0x2000>,
				<0xb0000000 0x20000>,
				<0xb0040000 0x20000>;
			interrupt-parent = <&vic1>;
			interrupts = <31>;
			clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
			clock-names = "bus", "onenand";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
		};

		chipid@e0000000 {
			compatible = "samsung,s5pv210-chipid";
			reg = <0xe0000000 0x1000>;
		};

		clocks: clock-controller@e0100000 {
			compatible = "samsung,s5pv210-clock", "simple-bus";
			reg = <0xe0100000 0x10000>;
			clock-names = "xxti", "xusbxti";
			clocks = <&xxti>, <&xusbxti>;
			#clock-cells = <1>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			pmu_syscon: syscon@e0108000 {
				compatible = "samsung-s5pv210-pmu", "syscon";
				reg = <0xe0108000 0x8000>;
			};
		};

		pinctrl0: pinctrl@e0200000 {
			compatible = "samsung,s5pv210-pinctrl";
			reg = <0xe0200000 0x1000>;
			interrupt-parent = <&vic0>;
			interrupts = <30>;

			wakeup-interrupt-controller {
				compatible = "samsung,s5pv210-wakeup-eint";
				interrupts = <16>;
				interrupt-parent = <&vic0>;
			};
		};

		amba {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "simple-bus";
			ranges;

			pdma0: dma@e0900000 {
				compatible = "arm,pl330", "arm,primecell";
				reg = <0xe0900000 0x1000>;
				interrupt-parent = <&vic0>;
				interrupts = <19>;
				clocks = <&clocks CLK_PDMA0>;
				clock-names = "apb_pclk";
				#dma-cells = <1>;
				#dma-channels = <8>;
				#dma-requests = <32>;
			};

			pdma1: dma@e0a00000 {
				compatible = "arm,pl330", "arm,primecell";
				reg = <0xe0a00000 0x1000>;
				interrupt-parent = <&vic0>;
				interrupts = <20>;
				clocks = <&clocks CLK_PDMA1>;
				clock-names = "apb_pclk";
				#dma-cells = <1>;
				#dma-channels = <8>;
				#dma-requests = <32>;
			};
		};

		spi0: spi@e1300000 {
			compatible = "samsung,s5pv210-spi";
			reg = <0xe1300000 0x1000>;
			interrupt-parent = <&vic1>;
			interrupts = <15>;
			dmas = <&pdma0 7>, <&pdma0 6>;
			dma-names = "tx", "rx";
			clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
			clock-names = "spi", "spi_busclk0";
			pinctrl-names = "default";
			pinctrl-0 = <&spi0_bus>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		spi1: spi@e1400000 {
			compatible = "samsung,s5pv210-spi";
			reg = <0xe1400000 0x1000>;
			interrupt-parent = <&vic1>;
			interrupts = <16>;
			dmas = <&pdma1 7>, <&pdma1 6>;
			dma-names = "tx", "rx";
			clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
			clock-names = "spi", "spi_busclk0";
			pinctrl-names = "default";
			pinctrl-0 = <&spi1_bus>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		keypad: keypad@e1600000 {
			compatible = "samsung,s5pv210-keypad";
			reg = <0xe1600000 0x1000>;
			interrupt-parent = <&vic2>;
			interrupts = <25>;
			clocks = <&clocks CLK_KEYIF>;
			clock-names = "keypad";
			status = "disabled";
		};

		i2c0: i2c@e1800000 {
			compatible = "samsung,s3c2440-i2c";
			reg = <0xe1800000 0x1000>;
			interrupt-parent = <&vic1>;
			interrupts = <14>;
			clocks = <&clocks CLK_I2C0>;
			clock-names = "i2c";
			pinctrl-names = "default";
			pinctrl-0 = <&i2c0_bus>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		i2c2: i2c@e1a00000 {
			compatible = "samsung,s3c2440-i2c";
			reg = <0xe1a00000 0x1000>;
			interrupt-parent = <&vic1>;
			interrupts = <19>;
			clocks = <&clocks CLK_I2C2>;
			clock-names = "i2c";
			pinctrl-0 = <&i2c2_bus>;
			pinctrl-names = "default";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		audio-subsystem {
			compatible = "samsung,s5pv210-audss", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			clk_audss: clock-controller@eee10000 {
				compatible = "samsung,s5pv210-audss-clock";
				reg = <0xeee10000 0x1000>;
				clock-names = "hclk", "xxti",
						"fout_epll",
						"sclk_audio0";
				clocks = <&clocks DOUT_HCLKP>, <&xxti>,
						<&clocks FOUT_EPLL>,
						<&clocks SCLK_AUDIO0>;
				#clock-cells = <1>;
			};

			i2s0: i2s@eee30000 {
				compatible = "samsung,s5pv210-i2s";
				reg = <0xeee30000 0x1000>;
				interrupt-parent = <&vic2>;
				interrupts = <16>;
				dma-names = "rx", "tx", "tx-sec";
				dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
				clock-names = "iis",
						"i2s_opclk0",
						"i2s_opclk1";
				clocks = <&clk_audss CLK_I2S>,
						<&clk_audss CLK_I2S>,
						<&clk_audss CLK_DOUT_AUD_BUS>;
				samsung,idma-addr = <0xc0010000>;
				pinctrl-names = "default";
				pinctrl-0 = <&i2s0_bus>;
				#sound-dai-cells = <0>;
				status = "disabled";
			};
		};

		i2s1: i2s@e2100000 {
			compatible = "samsung,s3c6410-i2s";
			reg = <0xe2100000 0x1000>;
			interrupt-parent = <&vic2>;
			interrupts = <17>;
			dma-names = "rx", "tx";
			dmas = <&pdma1 12>, <&pdma1 13>;
			clock-names = "iis", "i2s_opclk0";
			clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
			pinctrl-names = "default";
			pinctrl-0 = <&i2s1_bus>;
			#sound-dai-cells = <0>;
			status = "disabled";
		};

		i2s2: i2s@e2a00000 {
			compatible = "samsung,s3c6410-i2s";
			reg = <0xe2a00000 0x1000>;
			interrupt-parent = <&vic2>;
			interrupts = <18>;
			dma-names = "rx", "tx";
			dmas = <&pdma1 14>, <&pdma1 15>;
			clock-names = "iis", "i2s_opclk0";
			clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
			pinctrl-names = "default";
			pinctrl-0 = <&i2s2_bus>;
			#sound-dai-cells = <0>;
			status = "disabled";
		};

		pwm: pwm@e2500000 {
			compatible = "samsung,s5pc100-pwm";
			reg = <0xe2500000 0x1000>;
			interrupt-parent = <&vic0>;
			interrupts = <21>, <22>, <23>, <24>, <25>;
			clock-names = "timers";
			clocks = <&clocks CLK_PWM>;
			#pwm-cells = <3>;
		};

		watchdog: watchdog@e2700000 {
			compatible = "samsung,s3c6410-wdt";
			reg = <0xe2700000 0x1000>;
			interrupt-parent = <&vic0>;
			interrupts = <26>;
			clock-names = "watchdog";
			clocks = <&clocks CLK_WDT>;
		};

		rtc: rtc@e2800000 {
			compatible = "samsung,s3c6410-rtc";
			reg = <0xe2800000 0x100>;
			interrupt-parent = <&vic0>;
			interrupts = <28>, <29>;
			clocks = <&clocks CLK_RTC>;
			clock-names = "rtc";
			status = "disabled";
		};

		uart0: serial@e2900000 {
			compatible = "samsung,s5pv210-uart";
			reg = <0xe2900000 0x400>;
			interrupt-parent = <&vic1>;
			interrupts = <10>;
			clock-names = "uart", "clk_uart_baud0",
					"clk_uart_baud1";
			clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
					<&clocks SCLK_UART0>;
			status = "disabled";
		};

		uart1: serial@e2900400 {
			compatible = "samsung,s5pv210-uart";
			reg = <0xe2900400 0x400>;
			interrupt-parent = <&vic1>;
			interrupts = <11>;
			clock-names = "uart", "clk_uart_baud0",
					"clk_uart_baud1";
			clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
					<&clocks SCLK_UART1>;
			status = "disabled";
		};

		uart2: serial@e2900800 {
			compatible = "samsung,s5pv210-uart";
			reg = <0xe2900800 0x400>;
			interrupt-parent = <&vic1>;
			interrupts = <12>;
			clock-names = "uart", "clk_uart_baud0",
					"clk_uart_baud1";
			clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
					<&clocks SCLK_UART2>;
			status = "disabled";
		};

		uart3: serial@e2900c00 {
			compatible = "samsung,s5pv210-uart";
			reg = <0xe2900c00 0x400>;
			interrupt-parent = <&vic1>;
			interrupts = <13>;
			clock-names = "uart", "clk_uart_baud0",
					"clk_uart_baud1";
			clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
					<&clocks SCLK_UART3>;
			status = "disabled";
		};

		sdhci0: sdhci@eb000000 {
			compatible = "samsung,s3c6410-sdhci";
			reg = <0xeb000000 0x100000>;
			interrupt-parent = <&vic1>;
			interrupts = <26>;
			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
			clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
					<&clocks SCLK_MMC0>;
			status = "disabled";
		};

		sdhci1: sdhci@eb100000 {
			compatible = "samsung,s3c6410-sdhci";
			reg = <0xeb100000 0x100000>;
			interrupt-parent = <&vic1>;
			interrupts = <27>;
			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
			clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
					<&clocks SCLK_MMC1>;
			status = "disabled";
		};

		sdhci2: sdhci@eb200000 {
			compatible = "samsung,s3c6410-sdhci";
			reg = <0xeb200000 0x100000>;
			interrupt-parent = <&vic1>;
			interrupts = <28>;
			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
			clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
					<&clocks SCLK_MMC2>;
			status = "disabled";
		};

		sdhci3: sdhci@eb300000 {
			compatible = "samsung,s3c6410-sdhci";
			reg = <0xeb300000 0x100000>;
			interrupt-parent = <&vic3>;
			interrupts = <2>;
			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
			clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
					<&clocks SCLK_MMC3>;
			status = "disabled";
		};

		hsotg: hsotg@ec000000 {
			compatible = "samsung,s3c6400-hsotg";
			reg = <0xec000000 0x20000>;
			interrupt-parent = <&vic1>;
			interrupts = <24>;
			clocks = <&clocks CLK_USB_OTG>;
			clock-names = "otg";
			phy-names = "usb2-phy";
			phys = <&usbphy 0>;
			status = "disabled";
		};

		usbphy: usbphy@ec100000 {
			compatible = "samsung,s5pv210-usb2-phy";
			reg = <0xec100000 0x100>;
			samsung,pmureg-phandle = <&pmu_syscon>;
			clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
			clock-names = "phy", "ref";
			#phy-cells = <1>;
			status = "disabled";
		};

		ehci: ehci@ec200000 {
			compatible = "samsung,exynos4210-ehci";
			reg = <0xec200000 0x100>;
			interrupts = <23>;
			interrupt-parent = <&vic1>;
			clocks = <&clocks CLK_USB_HOST>;
			clock-names = "usbhost";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			port@0 {
				reg = <0>;
				phys = <&usbphy 1>;
			};
		};

		ohci: ohci@ec300000 {
			compatible = "samsung,exynos4210-ohci";
			reg = <0xec300000 0x100>;
			interrupts = <23>;
			interrupt-parent = <&vic1>;
			clocks = <&clocks CLK_USB_HOST>;
			clock-names = "usbhost";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			port@0 {
				reg = <0>;
				phys = <&usbphy 1>;
			};
		};

		mfc: codec@f1700000 {
			compatible = "samsung,mfc-v5";
			reg = <0xf1700000 0x10000>;
			interrupt-parent = <&vic2>;
			interrupts = <14>;
			clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
			clock-names = "sclk_mfc", "mfc";
		};

		vic0: interrupt-controller@f2000000 {
			compatible = "arm,pl192-vic";
			interrupt-controller;
			reg = <0xf2000000 0x1000>;
			#interrupt-cells = <1>;
		};

		vic1: interrupt-controller@f2100000 {
			compatible = "arm,pl192-vic";
			interrupt-controller;
			reg = <0xf2100000 0x1000>;
			#interrupt-cells = <1>;
		};

		vic2: interrupt-controller@f2200000 {
			compatible = "arm,pl192-vic";
			interrupt-controller;
			reg = <0xf2200000 0x1000>;
			#interrupt-cells = <1>;
		};

		vic3: interrupt-controller@f2300000 {
			compatible = "arm,pl192-vic";
			interrupt-controller;
			reg = <0xf2300000 0x1000>;
			#interrupt-cells = <1>;
		};

		fimd: fimd@f8000000 {
			compatible = "samsung,s5pv210-fimd";
			interrupt-parent = <&vic2>;
			reg = <0xf8000000 0x20000>;
			interrupt-names = "fifo", "vsync", "lcd_sys";
			interrupts = <0>, <1>, <2>;
			clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
			clock-names = "sclk_fimd", "fimd";
			status = "disabled";
		};

		dmc0: dmc@f0000000 {
			compatible = "samsung,s5pv210-dmc";
			reg = <0xf0000000 0x1000>;
		};

		dmc1: dmc@f1400000 {
			compatible = "samsung,s5pv210-dmc";
			reg = <0xf1400000 0x1000>;
		};

		g2d: g2d@fa000000 {
			compatible = "samsung,s5pv210-g2d";
			reg = <0xfa000000 0x1000>;
			interrupt-parent = <&vic2>;
			interrupts = <9>;
			clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
			clock-names = "sclk_fimg2d", "fimg2d";
		};

		mdma1: mdma@fa200000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0xfa200000 0x1000>;
			interrupt-parent = <&vic0>;
			interrupts = <18>;
			clocks = <&clocks CLK_MDMA>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <1>;
		};

		rotator: rotator@fa300000 {
			compatible = "samsung,s5pv210-rotator";
			reg = <0xfa300000 0x1000>;
			interrupt-parent = <&vic2>;
			interrupts = <4>;
			clocks = <&clocks CLK_ROTATOR>;
			clock-names = "rotator";
		};

		i2c1: i2c@fab00000 {
			compatible = "samsung,s3c2440-i2c";
			reg = <0xfab00000 0x1000>;
			interrupt-parent = <&vic2>;
			interrupts = <13>;
			clocks = <&clocks CLK_I2C1>;
			clock-names = "i2c";
			pinctrl-names = "default";
			pinctrl-0 = <&i2c1_bus>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		camera: camera {
			compatible = "samsung,fimc", "simple-bus";
			pinctrl-names = "default";
			pinctrl-0 = <>;
			clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
			clock-names = "sclk_cam0", "sclk_cam1";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			clock_cam: clock-controller {
				#clock-cells = <1>;
			};

			csis0: csis@fa600000 {
				compatible = "samsung,s5pv210-csis";
				reg = <0xfa600000 0x4000>;
				interrupt-parent = <&vic2>;
				interrupts = <29>;
				clocks = <&clocks CLK_CSIS>,
						<&clocks SCLK_CSIS>;
				clock-names = "clk_csis",
						"sclk_csis";
				bus-width = <4>;
				status = "disabled";
				#address-cells = <1>;
				#size-cells = <0>;
			};

			fimc0: fimc@fb200000 {
				compatible = "samsung,s5pv210-fimc";
				reg = <0xfb200000 0x1000>;
				interrupts = <5>;
				interrupt-parent = <&vic2>;
				clocks = <&clocks CLK_FIMC0>,
						<&clocks SCLK_FIMC0>;
				clock-names = "fimc",
						"sclk_fimc";
				samsung,pix-limits = <4224 8192 1920 4224>;
				samsung,mainscaler-ext;
				samsung,cam-if;
			};

			fimc1: fimc@fb300000 {
				compatible = "samsung,s5pv210-fimc";
				reg = <0xfb300000 0x1000>;
				interrupt-parent = <&vic2>;
				interrupts = <6>;
				clocks = <&clocks CLK_FIMC1>,
						<&clocks SCLK_FIMC1>;
				clock-names = "fimc",
						"sclk_fimc";
				samsung,pix-limits = <4224 8192 1920 4224>;
				samsung,mainscaler-ext;
				samsung,cam-if;
			};

			fimc2: fimc@fb400000 {
				compatible = "samsung,s5pv210-fimc";
				reg = <0xfb400000 0x1000>;
				interrupt-parent = <&vic2>;
				interrupts = <7>;
				clocks = <&clocks CLK_FIMC2>,
						<&clocks SCLK_FIMC2>;
				clock-names = "fimc",
						"sclk_fimc";
				samsung,pix-limits = <4224 8192 1920 4224>;
				samsung,mainscaler-ext;
				samsung,lcd-wb;
			};
		};

		jpeg_codec: jpeg-codec@fb600000 {
			compatible = "samsung,s5pv210-jpeg";
			reg = <0xfb600000 0x1000>;
			interrupt-parent = <&vic2>;
			interrupts = <8>;
			clocks = <&clocks CLK_JPEG>;
			clock-names = "jpeg";
		};
	};
};

#include "s5pv210-pinctrl.dtsi"
Commit	Line	Data
e9c1fad0	1	// SPDX-License-Identifier: GPL-2.0
94ad0f6d MK	2	/*
	3	* Samsung's S5PV210 SoC device tree source
	4	*
	5	* Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
	6	*
	7	* Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
	8	* Tomasz Figa <t.figa@samsung.com>
	9	*
	10	* Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
	11	* based board files can include this file and provide values for board specfic
	12	* bindings.
	13	*
	14	* Note: This file does not include device nodes for all the controllers in
	15	* S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
	16	* nodes can be added to this file.
e9c1fad0	17	*/
94ad0f6d	18
94ad0f6d MK	19	#include <dt-bindings/clock/s5pv210.h>
	20	#include <dt-bindings/clock/s5pv210-audss.h>
	21
	22	/ {
80555b6f JMC	23	#address-cells = <1>;
	24	#size-cells = <1>;
	25
94ad0f6d MK	26	aliases {
94ad0f6d MK	27	csis0 = &csis0;
b99f1870 PC	28	dmc0 = &dmc0;
b99f1870 PC	29	dmc1 = &dmc1;
94ad0f6d MK	30	fimc0 = &fimc0;
	31	fimc1 = &fimc1;
	32	fimc2 = &fimc2;
	33	i2c0 = &i2c0;
	34	i2c1 = &i2c1;
	35	i2c2 = &i2c2;
	36	i2s0 = &i2s0;
	37	i2s1 = &i2s1;
	38	i2s2 = &i2s2;
	39	pinctrl0 = &pinctrl0;
	40	spi0 = &spi0;
	41	spi1 = &spi1;
	42	};
	43
	44	cpus {
	45	#address-cells = <1>;
	46	#size-cells = <0>;
	47
	48	cpu@0 {
	49	device_type = "cpu";
	50	compatible = "arm,cortex-a8";
	51	reg = <0>;
	52	};
	53	};
	54
	55	soc {
	56	compatible = "simple-bus";
	57	#address-cells = <1>;
	58	#size-cells = <1>;
	59	ranges;
	60
	61	external-clocks {
	62	compatible = "simple-bus";
	63	#address-cells = <1>;
	64	#size-cells = <0>;
	65
	66	xxti: oscillator@0 {
	67	compatible = "fixed-clock";
	68	reg = <0>;
	69	clock-frequency = <0>;
	70	clock-output-names = "xxti";
	71	#clock-cells = <0>;
	72	};
	73
	74	xusbxti: oscillator@1 {
	75	compatible = "fixed-clock";
	76	reg = <1>;
	77	clock-frequency = <0>;
	78	clock-output-names = "xusbxti";
	79	#clock-cells = <0>;
	80	};
	81	};
	82
be6a95a5	83	onenand: onenand@b0600000 {
94ad0f6d MK	84	compatible = "samsung,s5pv210-onenand";
	85	reg = <0xb0600000 0x2000>,
	86	<0xb0000000 0x20000>,
	87	<0xb0040000 0x20000>;
	88	interrupt-parent = <&vic1>;
	89	interrupts = <31>;
	90	clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
	91	clock-names = "bus", "onenand";
	92	#address-cells = <1>;
	93	#size-cells = <1>;
	94	status = "disabled";
	95	};
	96
	97	chipid@e0000000 {
	98	compatible = "samsung,s5pv210-chipid";
	99	reg = <0xe0000000 0x1000>;
	100	};
	101
	102	clocks: clock-controller@e0100000 {
	103	compatible = "samsung,s5pv210-clock", "simple-bus";
	104	reg = <0xe0100000 0x10000>;
	105	clock-names = "xxti", "xusbxti";
	106	clocks = <&xxti>, <&xusbxti>;
	107	#clock-cells = <1>;
	108	#address-cells = <1>;
	109	#size-cells = <1>;
	110	ranges;
	111
	112	pmu_syscon: syscon@e0108000 {
	113	compatible = "samsung-s5pv210-pmu", "syscon";
	114	reg = <0xe0108000 0x8000>;
	115	};
	116	};
	117
	118	pinctrl0: pinctrl@e0200000 {
	119	compatible = "samsung,s5pv210-pinctrl";
	120	reg = <0xe0200000 0x1000>;
	121	interrupt-parent = <&vic0>;
	122	interrupts = <30>;
	123
	124	wakeup-interrupt-controller {
db4e2611	125	compatible = "samsung,s5pv210-wakeup-eint";
94ad0f6d MK	126	interrupts = <16>;
	127	interrupt-parent = <&vic0>;
	128	};
	129	};
	130
	131	amba {
	132	#address-cells = <1>;
	133	#size-cells = <1>;
2ef7d5f3	134	compatible = "simple-bus";
94ad0f6d MK	135	ranges;
	136
	137	pdma0: dma@e0900000 {
	138	compatible = "arm,pl330", "arm,primecell";
	139	reg = <0xe0900000 0x1000>;
	140	interrupt-parent = <&vic0>;
	141	interrupts = <19>;
	142	clocks = <&clocks CLK_PDMA0>;
	143	clock-names = "apb_pclk";
	144	#dma-cells = <1>;
	145	#dma-channels = <8>;
	146	#dma-requests = <32>;
	147	};
	148
	149	pdma1: dma@e0a00000 {
	150	compatible = "arm,pl330", "arm,primecell";
	151	reg = <0xe0a00000 0x1000>;
	152	interrupt-parent = <&vic0>;
	153	interrupts = <20>;
	154	clocks = <&clocks CLK_PDMA1>;
	155	clock-names = "apb_pclk";
	156	#dma-cells = <1>;
	157	#dma-channels = <8>;
	158	#dma-requests = <32>;
	159	};
	160	};
	161
	162	spi0: spi@e1300000 {
	163	compatible = "samsung,s5pv210-spi";
	164	reg = <0xe1300000 0x1000>;
	165	interrupt-parent = <&vic1>;
	166	interrupts = <15>;
	167	dmas = <&pdma0 7>, <&pdma0 6>;
	168	dma-names = "tx", "rx";
	169	clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
	170	clock-names = "spi", "spi_busclk0";
	171	pinctrl-names = "default";
	172	pinctrl-0 = <&spi0_bus>;
	173	#address-cells = <1>;
	174	#size-cells = <0>;
	175	status = "disabled";
	176	};
	177
	178	spi1: spi@e1400000 {
	179	compatible = "samsung,s5pv210-spi";
	180	reg = <0xe1400000 0x1000>;
	181	interrupt-parent = <&vic1>;
	182	interrupts = <16>;
	183	dmas = <&pdma1 7>, <&pdma1 6>;
	184	dma-names = "tx", "rx";
	185	clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
	186	clock-names = "spi", "spi_busclk0";
	187	pinctrl-names = "default";
	188	pinctrl-0 = <&spi1_bus>;
	189	#address-cells = <1>;
	190	#size-cells = <0>;
	191	status = "disabled";
	192	};
	193
	194	keypad: keypad@e1600000 {
	195	compatible = "samsung,s5pv210-keypad";
	196	reg = <0xe1600000 0x1000>;
	197	interrupt-parent = <&vic2>;
	198	interrupts = <25>;
199	clocks = <&clocks CLK_KEYIF>;
200	clock-names = "keypad";
201	status = "disabled";
202	};
203
204	i2c0: i2c@e1800000 {
205	compatible = "samsung,s3c2440-i2c";
206	reg = <0xe1800000 0x1000>;
207	interrupt-parent = <&vic1>;
208	interrupts = <14>;
209	clocks = <&clocks CLK_I2C0>;
210	clock-names = "i2c";
211	pinctrl-names = "default";
212	pinctrl-0 = <&i2c0_bus>;
213	#address-cells = <1>;
214	#size-cells = <0>;
215	status = "disabled";
216	};
217
218	i2c2: i2c@e1a00000 {
219	compatible = "samsung,s3c2440-i2c";
220	reg = <0xe1a00000 0x1000>;
221	interrupt-parent = <&vic1>;
222	interrupts = <19>;
223	clocks = <&clocks CLK_I2C2>;
224	clock-names = "i2c";
225	pinctrl-0 = <&i2c2_bus>;
226	pinctrl-names = "default";
227	#address-cells = <1>;
228	#size-cells = <0>;
229	status = "disabled";
230	};
231
232	audio-subsystem {
233	compatible = "samsung,s5pv210-audss", "simple-bus";
234	#address-cells = <1>;
235	#size-cells = <1>;
236	ranges;
237
238	clk_audss: clock-controller@eee10000 {
239	compatible = "samsung,s5pv210-audss-clock";
240	reg = <0xeee10000 0x1000>;
241	clock-names = "hclk", "xxti",
242	"fout_epll",
243	"sclk_audio0";
244	clocks = <&clocks DOUT_HCLKP>, <&xxti>,
245	<&clocks FOUT_EPLL>,
246	<&clocks SCLK_AUDIO0>;
247	#clock-cells = <1>;
248	};
249
250	i2s0: i2s@eee30000 {
251	compatible = "samsung,s5pv210-i2s";
252	reg = <0xeee30000 0x1000>;
253	interrupt-parent = <&vic2>;
254	interrupts = <16>;
255	dma-names = "rx", "tx", "tx-sec";
256	dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
257	clock-names = "iis",
258	"i2s_opclk0",
259	"i2s_opclk1";
260	clocks = <&clk_audss CLK_I2S>,
261	<&clk_audss CLK_I2S>,
262	<&clk_audss CLK_DOUT_AUD_BUS>;
263	samsung,idma-addr = <0xc0010000>;
264	pinctrl-names = "default";
265	pinctrl-0 = <&i2s0_bus>;
266	#sound-dai-cells = <0>;
267	status = "disabled";
268	};
269	};
270
271	i2s1: i2s@e2100000 {
272	compatible = "samsung,s3c6410-i2s";
273	reg = <0xe2100000 0x1000>;
274	interrupt-parent = <&vic2>;
275	interrupts = <17>;
276	dma-names = "rx", "tx";
277	dmas = <&pdma1 12>, <&pdma1 13>;
278	clock-names = "iis", "i2s_opclk0";
279	clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
280	pinctrl-names = "default";
281	pinctrl-0 = <&i2s1_bus>;
282	#sound-dai-cells = <0>;
283	status = "disabled";
284	};
285
286	i2s2: i2s@e2a00000 {
287	compatible = "samsung,s3c6410-i2s";
288	reg = <0xe2a00000 0x1000>;
289	interrupt-parent = <&vic2>;
290	interrupts = <18>;
291	dma-names = "rx", "tx";
292	dmas = <&pdma1 14>, <&pdma1 15>;
293	clock-names = "iis", "i2s_opclk0";
294	clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
295	pinctrl-names = "default";
296	pinctrl-0 = <&i2s2_bus>;
297	#sound-dai-cells = <0>;
298	status = "disabled";
299	};
300
301	pwm: pwm@e2500000 {
302	compatible = "samsung,s5pc100-pwm";
303	reg = <0xe2500000 0x1000>;
304	interrupt-parent = <&vic0>;
305	interrupts = <21>, <22>, <23>, <24>, <25>;
306	clock-names = "timers";
307	clocks = <&clocks CLK_PWM>;
308	#pwm-cells = <3>;
309	};
310
311	watchdog: watchdog@e2700000 {
c70d219b	312	compatible = "samsung,s3c6410-wdt";
94ad0f6d MK	313	reg = <0xe2700000 0x1000>;
	314	interrupt-parent = <&vic0>;
	315	interrupts = <26>;
	316	clock-names = "watchdog";
	317	clocks = <&clocks CLK_WDT>;
	318	};
	319
	320	rtc: rtc@e2800000 {
	321	compatible = "samsung,s3c6410-rtc";
	322	reg = <0xe2800000 0x100>;
	323	interrupt-parent = <&vic0>;
	324	interrupts = <28>, <29>;
	325	clocks = <&clocks CLK_RTC>;
	326	clock-names = "rtc";
	327	status = "disabled";
	328	};
	329
	330	uart0: serial@e2900000 {
	331	compatible = "samsung,s5pv210-uart";
	332	reg = <0xe2900000 0x400>;
	333	interrupt-parent = <&vic1>;
	334	interrupts = <10>;
	335	clock-names = "uart", "clk_uart_baud0",
	336	"clk_uart_baud1";
	337	clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
	338	<&clocks SCLK_UART0>;
	339	status = "disabled";
	340	};
	341
	342	uart1: serial@e2900400 {
	343	compatible = "samsung,s5pv210-uart";
	344	reg = <0xe2900400 0x400>;
	345	interrupt-parent = <&vic1>;
	346	interrupts = <11>;
	347	clock-names = "uart", "clk_uart_baud0",
	348	"clk_uart_baud1";
	349	clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
	350	<&clocks SCLK_UART1>;
	351	status = "disabled";
	352	};
	353
	354	uart2: serial@e2900800 {
	355	compatible = "samsung,s5pv210-uart";
	356	reg = <0xe2900800 0x400>;
	357	interrupt-parent = <&vic1>;
	358	interrupts = <12>;
	359	clock-names = "uart", "clk_uart_baud0",
	360	"clk_uart_baud1";
	361	clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
	362	<&clocks SCLK_UART2>;
	363	status = "disabled";
	364	};
	365
	366	uart3: serial@e2900c00 {
	367	compatible = "samsung,s5pv210-uart";
	368	reg = <0xe2900c00 0x400>;
	369	interrupt-parent = <&vic1>;
	370	interrupts = <13>;
	371	clock-names = "uart", "clk_uart_baud0",
	372	"clk_uart_baud1";
	373	clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
	374	<&clocks SCLK_UART3>;
	375	status = "disabled";
	376	};
377
378	sdhci0: sdhci@eb000000 {
379	compatible = "samsung,s3c6410-sdhci";
380	reg = <0xeb000000 0x100000>;
381	interrupt-parent = <&vic1>;
382	interrupts = <26>;
383	clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
384	clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
385	<&clocks SCLK_MMC0>;
386	status = "disabled";
387	};
388
389	sdhci1: sdhci@eb100000 {
390	compatible = "samsung,s3c6410-sdhci";
391	reg = <0xeb100000 0x100000>;
392	interrupt-parent = <&vic1>;
393	interrupts = <27>;
394	clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
395	clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
396	<&clocks SCLK_MMC1>;
397	status = "disabled";
398	};
399
400	sdhci2: sdhci@eb200000 {
401	compatible = "samsung,s3c6410-sdhci";
402	reg = <0xeb200000 0x100000>;
403	interrupt-parent = <&vic1>;
404	interrupts = <28>;
405	clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
406	clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
407	<&clocks SCLK_MMC2>;
408	status = "disabled";
409	};
410
411	sdhci3: sdhci@eb300000 {
412	compatible = "samsung,s3c6410-sdhci";
413	reg = <0xeb300000 0x100000>;
414	interrupt-parent = <&vic3>;
415	interrupts = <2>;
416	clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
417	clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
418	<&clocks SCLK_MMC3>;
419	status = "disabled";
420	};
421
422	hsotg: hsotg@ec000000 {
423	compatible = "samsung,s3c6400-hsotg";
424	reg = <0xec000000 0x20000>;
425	interrupt-parent = <&vic1>;
426	interrupts = <24>;
427	clocks = <&clocks CLK_USB_OTG>;
428	clock-names = "otg";
429	phy-names = "usb2-phy";
430	phys = <&usbphy 0>;
431	status = "disabled";
432	};
433
434	usbphy: usbphy@ec100000 {
435	compatible = "samsung,s5pv210-usb2-phy";
436	reg = <0xec100000 0x100>;
437	samsung,pmureg-phandle = <&pmu_syscon>;
438	clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
439	clock-names = "phy", "ref";
440	#phy-cells = <1>;
441	status = "disabled";
442	};
443
444	ehci: ehci@ec200000 {
445	compatible = "samsung,exynos4210-ehci";
446	reg = <0xec200000 0x100>;
447	interrupts = <23>;
448	interrupt-parent = <&vic1>;
449	clocks = <&clocks CLK_USB_HOST>;
450	clock-names = "usbhost";
451	#address-cells = <1>;
452	#size-cells = <0>;
453	status = "disabled";
454
455	port@0 {
456	reg = <0>;
457	phys = <&usbphy 1>;
458	};
459	};
460
461	ohci: ohci@ec300000 {
462	compatible = "samsung,exynos4210-ohci";
463	reg = <0xec300000 0x100>;
464	interrupts = <23>;
5c103719	465	interrupt-parent = <&vic1>;
94ad0f6d MK	466	clocks = <&clocks CLK_USB_HOST>;
	467	clock-names = "usbhost";
	468	#address-cells = <1>;
	469	#size-cells = <0>;
	470	status = "disabled";
	471
	472	port@0 {
	473	reg = <0>;
	474	phys = <&usbphy 1>;
	475	};
	476	};
	477
	478	mfc: codec@f1700000 {
	479	compatible = "samsung,mfc-v5";
	480	reg = <0xf1700000 0x10000>;
	481	interrupt-parent = <&vic2>;
	482	interrupts = <14>;
	483	clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
	484	clock-names = "sclk_mfc", "mfc";
	485	};
	486
	487	vic0: interrupt-controller@f2000000 {
	488	compatible = "arm,pl192-vic";
	489	interrupt-controller;
	490	reg = <0xf2000000 0x1000>;
	491	#interrupt-cells = <1>;
	492	};
	493
	494	vic1: interrupt-controller@f2100000 {
	495	compatible = "arm,pl192-vic";
	496	interrupt-controller;
	497	reg = <0xf2100000 0x1000>;
	498	#interrupt-cells = <1>;
	499	};
	500
	501	vic2: interrupt-controller@f2200000 {
	502	compatible = "arm,pl192-vic";
	503	interrupt-controller;
	504	reg = <0xf2200000 0x1000>;
	505	#interrupt-cells = <1>;
	506	};
	507
	508	vic3: interrupt-controller@f2300000 {
	509	compatible = "arm,pl192-vic";
	510	interrupt-controller;
	511	reg = <0xf2300000 0x1000>;
	512	#interrupt-cells = <1>;
	513	};
	514
	515	fimd: fimd@f8000000 {
9563793d	516	compatible = "samsung,s5pv210-fimd";
94ad0f6d MK	517	interrupt-parent = <&vic2>;
	518	reg = <0xf8000000 0x20000>;
	519	interrupt-names = "fifo", "vsync", "lcd_sys";
	520	interrupts = <0>, <1>, <2>;
	521	clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
	522	clock-names = "sclk_fimd", "fimd";
	523	status = "disabled";
	524	};
	525
b99f1870 PC	526	dmc0: dmc@f0000000 {
	527	compatible = "samsung,s5pv210-dmc";
	528	reg = <0xf0000000 0x1000>;
	529	};
	530
	531	dmc1: dmc@f1400000 {
	532	compatible = "samsung,s5pv210-dmc";
	533	reg = <0xf1400000 0x1000>;
	534	};
	535
94ad0f6d MK	536	g2d: g2d@fa000000 {
	537	compatible = "samsung,s5pv210-g2d";
	538	reg = <0xfa000000 0x1000>;
	539	interrupt-parent = <&vic2>;
	540	interrupts = <9>;
	541	clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
	542	clock-names = "sclk_fimg2d", "fimg2d";
	543	};
	544
	545	mdma1: mdma@fa200000 {
	546	compatible = "arm,pl330", "arm,primecell";
	547	reg = <0xfa200000 0x1000>;
	548	interrupt-parent = <&vic0>;
	549	interrupts = <18>;
	550	clocks = <&clocks CLK_MDMA>;
	551	clock-names = "apb_pclk";
	552	#dma-cells = <1>;
	553	#dma-channels = <8>;
	554	#dma-requests = <1>;
	555	};
	556
0bb677d9 PC	557	rotator: rotator@fa300000 {
	558	compatible = "samsung,s5pv210-rotator";
	559	reg = <0xfa300000 0x1000>;
	560	interrupt-parent = <&vic2>;
	561	interrupts = <4>;
	562	clocks = <&clocks CLK_ROTATOR>;
	563	clock-names = "rotator";
	564	};
	565
94ad0f6d MK	566	i2c1: i2c@fab00000 {
	567	compatible = "samsung,s3c2440-i2c";
	568	reg = <0xfab00000 0x1000>;
	569	interrupt-parent = <&vic2>;
	570	interrupts = <13>;
	571	clocks = <&clocks CLK_I2C1>;
	572	clock-names = "i2c";
	573	pinctrl-names = "default";
	574	pinctrl-0 = <&i2c1_bus>;
	575	#address-cells = <1>;
	576	#size-cells = <0>;
	577	status = "disabled";
	578	};
	579
	580	camera: camera {
	581	compatible = "samsung,fimc", "simple-bus";
	582	pinctrl-names = "default";
	583	pinctrl-0 = <>;
	584	clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
	585	clock-names = "sclk_cam0", "sclk_cam1";
	586	#address-cells = <1>;
	587	#size-cells = <1>;
	588	ranges;
	589
	590	clock_cam: clock-controller {
	591	#clock-cells = <1>;
	592	};
	593
	594	csis0: csis@fa600000 {
	595	compatible = "samsung,s5pv210-csis";
	596	reg = <0xfa600000 0x4000>;
	597	interrupt-parent = <&vic2>;
	598	interrupts = <29>;
	599	clocks = <&clocks CLK_CSIS>,
	600	<&clocks SCLK_CSIS>;
	601	clock-names = "clk_csis",
	602	"sclk_csis";
	603	bus-width = <4>;
	604	status = "disabled";
	605	#address-cells = <1>;
	606	#size-cells = <0>;
	607	};
	608
	609	fimc0: fimc@fb200000 {
	610	compatible = "samsung,s5pv210-fimc";
	611	reg = <0xfb200000 0x1000>;
	612	interrupts = <5>;
	613	interrupt-parent = <&vic2>;
	614	clocks = <&clocks CLK_FIMC0>,
	615	<&clocks SCLK_FIMC0>;
	616	clock-names = "fimc",
	617	"sclk_fimc";
	618	samsung,pix-limits = <4224 8192 1920 4224>;
	619	samsung,mainscaler-ext;
	620	samsung,cam-if;
	621	};
	622
	623	fimc1: fimc@fb300000 {
	624	compatible = "samsung,s5pv210-fimc";
	625	reg = <0xfb300000 0x1000>;
	626	interrupt-parent = <&vic2>;
	627	interrupts = <6>;
	628	clocks = <&clocks CLK_FIMC1>,
	629	<&clocks SCLK_FIMC1>;
630	clock-names = "fimc",
631	"sclk_fimc";
632	samsung,pix-limits = <4224 8192 1920 4224>;
633	samsung,mainscaler-ext;
634	samsung,cam-if;
635	};
636
637	fimc2: fimc@fb400000 {
638	compatible = "samsung,s5pv210-fimc";
639	reg = <0xfb400000 0x1000>;
640	interrupt-parent = <&vic2>;
641	interrupts = <7>;
642	clocks = <&clocks CLK_FIMC2>,
643	<&clocks SCLK_FIMC2>;
644	clock-names = "fimc",
645	"sclk_fimc";
646	samsung,pix-limits = <4224 8192 1920 4224>;
647	samsung,mainscaler-ext;
648	samsung,lcd-wb;
649	};
650	};
452ad2f2 PC	651
	652	jpeg_codec: jpeg-codec@fb600000 {
	653	compatible = "samsung,s5pv210-jpeg";
	654	reg = <0xfb600000 0x1000>;
	655	interrupt-parent = <&vic2>;
	656	interrupts = <8>;
	657	clocks = <&clocks CLK_JPEG>;
	658	clock-names = "jpeg";
	659	};
94ad0f6d MK	660	};
	661	};
	662
	663	#include "s5pv210-pinctrl.dtsi"