[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / s5pv210.dtsi

// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung's S5PV210 SoC device tree source
 *
 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
 *
 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
 * Tomasz Figa <t.figa@samsung.com>
 *
 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
 * based board files can include this file and provide values for board specfic
 * bindings.
 *
 * Note: This file does not include device nodes for all the controllers in
 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
 * nodes can be added to this file.
 */

#include <dt-bindings/clock/s5pv210.h>
#include <dt-bindings/clock/s5pv210-audss.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		csis0 = &csis0;
		fimc0 = &fimc0;
		fimc1 = &fimc1;
		fimc2 = &fimc2;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2s0 = &i2s0;
		i2s1 = &i2s1;
		i2s2 = &i2s2;
		pinctrl0 = &pinctrl0;
		spi0 = &spi0;
		spi1 = &spi1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a8";
			reg = <0>;
		};
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		external-clocks {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <0>;

			xxti: oscillator@0 {
				compatible = "fixed-clock";
				reg = <0>;
				clock-frequency = <0>;
				clock-output-names = "xxti";
				#clock-cells = <0>;
			};

			xusbxti: oscillator@1 {
				compatible = "fixed-clock";
				reg = <1>;
				clock-frequency = <0>;
				clock-output-names = "xusbxti";
				#clock-cells = <0>;
			};
		};

		onenand: onenand@b0000000 {
			compatible = "samsung,s5pv210-onenand";
			reg = <0xb0600000 0x2000>,
				<0xb0000000 0x20000>,
				<0xb0040000 0x20000>;
			interrupt-parent = <&vic1>;
			interrupts = <31>;
			clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
			clock-names = "bus", "onenand";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
		};

		chipid@e0000000 {
			compatible = "samsung,s5pv210-chipid";
			reg = <0xe0000000 0x1000>;
		};

		clocks: clock-controller@e0100000 {
			compatible = "samsung,s5pv210-clock", "simple-bus";
			reg = <0xe0100000 0x10000>;
			clock-names = "xxti", "xusbxti";
			clocks = <&xxti>, <&xusbxti>;
			#clock-cells = <1>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			pmu_syscon: syscon@e0108000 {
				compatible = "samsung-s5pv210-pmu", "syscon";
				reg = <0xe0108000 0x8000>;
			};
		};

		pinctrl0: pinctrl@e0200000 {
			compatible = "samsung,s5pv210-pinctrl";
			reg = <0xe0200000 0x1000>;
			interrupt-parent = <&vic0>;
			interrupts = <30>;

			wakeup-interrupt-controller {
				compatible = "samsung,exynos4210-wakeup-eint";
				interrupts = <16>;
				interrupt-parent = <&vic0>;
			};
		};

		amba {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "simple-bus";
			ranges;

			pdma0: dma@e0900000 {
				compatible = "arm,pl330", "arm,primecell";
				reg = <0xe0900000 0x1000>;
				interrupt-parent = <&vic0>;
				interrupts = <19>;
				clocks = <&clocks CLK_PDMA0>;
				clock-names = "apb_pclk";
				#dma-cells = <1>;
				#dma-channels = <8>;
				#dma-requests = <32>;
			};

			pdma1: dma@e0a00000 {
				compatible = "arm,pl330", "arm,primecell";
				reg = <0xe0a00000 0x1000>;
				interrupt-parent = <&vic0>;
				interrupts = <20>;
				clocks = <&clocks CLK_PDMA1>;
				clock-names = "apb_pclk";
				#dma-cells = <1>;
				#dma-channels = <8>;
				#dma-requests = <32>;
			};
		};

		spi0: spi@e1300000 {
			compatible = "samsung,s5pv210-spi";
			reg = <0xe1300000 0x1000>;
			interrupt-parent = <&vic1>;
			interrupts = <15>;
			dmas = <&pdma0 7>, <&pdma0 6>;
			dma-names = "tx", "rx";
			clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
			clock-names = "spi", "spi_busclk0";
			pinctrl-names = "default";
			pinctrl-0 = <&spi0_bus>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		spi1: spi@e1400000 {
			compatible = "samsung,s5pv210-spi";
			reg = <0xe1400000 0x1000>;
			interrupt-parent = <&vic1>;
			interrupts = <16>;
			dmas = <&pdma1 7>, <&pdma1 6>;
			dma-names = "tx", "rx";
			clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
			clock-names = "spi", "spi_busclk0";
			pinctrl-names = "default";
			pinctrl-0 = <&spi1_bus>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		keypad: keypad@e1600000 {
			compatible = "samsung,s5pv210-keypad";
			reg = <0xe1600000 0x1000>;
			interrupt-parent = <&vic2>;
			interrupts = <25>;
			clocks = <&clocks CLK_KEYIF>;
			clock-names = "keypad";
			status = "disabled";
		};

		i2c0: i2c@e1800000 {
			compatible = "samsung,s3c2440-i2c";
			reg = <0xe1800000 0x1000>;
			interrupt-parent = <&vic1>;
			interrupts = <14>;
			clocks = <&clocks CLK_I2C0>;
			clock-names = "i2c";
			pinctrl-names = "default";
			pinctrl-0 = <&i2c0_bus>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		i2c2: i2c@e1a00000 {
			compatible = "samsung,s3c2440-i2c";
			reg = <0xe1a00000 0x1000>;
			interrupt-parent = <&vic1>;
			interrupts = <19>;
			clocks = <&clocks CLK_I2C2>;
			clock-names = "i2c";
			pinctrl-0 = <&i2c2_bus>;
			pinctrl-names = "default";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		audio-subsystem {
			compatible = "samsung,s5pv210-audss", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			clk_audss: clock-controller@eee10000 {
				compatible = "samsung,s5pv210-audss-clock";
				reg = <0xeee10000 0x1000>;
				clock-names = "hclk", "xxti",
						"fout_epll",
						"sclk_audio0";
				clocks = <&clocks DOUT_HCLKP>, <&xxti>,
						<&clocks FOUT_EPLL>,
						<&clocks SCLK_AUDIO0>;
				#clock-cells = <1>;
			};

			i2s0: i2s@eee30000 {
				compatible = "samsung,s5pv210-i2s";
				reg = <0xeee30000 0x1000>;
				interrupt-parent = <&vic2>;
				interrupts = <16>;
				dma-names = "rx", "tx", "tx-sec";
				dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
				clock-names = "iis",
						"i2s_opclk0",
						"i2s_opclk1";
				clocks = <&clk_audss CLK_I2S>,
						<&clk_audss CLK_I2S>,
						<&clk_audss CLK_DOUT_AUD_BUS>;
				samsung,idma-addr = <0xc0010000>;
				pinctrl-names = "default";
				pinctrl-0 = <&i2s0_bus>;
				#sound-dai-cells = <0>;
				status = "disabled";
			};
		};

		i2s1: i2s@e2100000 {
			compatible = "samsung,s3c6410-i2s";
			reg = <0xe2100000 0x1000>;
			interrupt-parent = <&vic2>;
			interrupts = <17>;
			dma-names = "rx", "tx";
			dmas = <&pdma1 12>, <&pdma1 13>;
			clock-names = "iis", "i2s_opclk0";
			clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
			pinctrl-names = "default";
			pinctrl-0 = <&i2s1_bus>;
			#sound-dai-cells = <0>;
			status = "disabled";
		};

		i2s2: i2s@e2a00000 {
			compatible = "samsung,s3c6410-i2s";
			reg = <0xe2a00000 0x1000>;
			interrupt-parent = <&vic2>;
			interrupts = <18>;
			dma-names = "rx", "tx";
			dmas = <&pdma1 14>, <&pdma1 15>;
			clock-names = "iis", "i2s_opclk0";
			clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
			pinctrl-names = "default";
			pinctrl-0 = <&i2s2_bus>;
			#sound-dai-cells = <0>;
			status = "disabled";
		};

		pwm: pwm@e2500000 {
			compatible = "samsung,s5pc100-pwm";
			reg = <0xe2500000 0x1000>;
			interrupt-parent = <&vic0>;
			interrupts = <21>, <22>, <23>, <24>, <25>;
			clock-names = "timers";
			clocks = <&clocks CLK_PWM>;
			#pwm-cells = <3>;
		};

		watchdog: watchdog@e2700000 {
			compatible = "samsung,s3c6410-wdt";
			reg = <0xe2700000 0x1000>;
			interrupt-parent = <&vic0>;
			interrupts = <26>;
			clock-names = "watchdog";
			clocks = <&clocks CLK_WDT>;
		};

		rtc: rtc@e2800000 {
			compatible = "samsung,s3c6410-rtc";
			reg = <0xe2800000 0x100>;
			interrupt-parent = <&vic0>;
			interrupts = <28>, <29>;
			clocks = <&clocks CLK_RTC>;
			clock-names = "rtc";
			status = "disabled";
		};

		uart0: serial@e2900000 {
			compatible = "samsung,s5pv210-uart";
			reg = <0xe2900000 0x400>;
			interrupt-parent = <&vic1>;
			interrupts = <10>;
			clock-names = "uart", "clk_uart_baud0",
					"clk_uart_baud1";
			clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
					<&clocks SCLK_UART0>;
			status = "disabled";
		};

		uart1: serial@e2900400 {
			compatible = "samsung,s5pv210-uart";
			reg = <0xe2900400 0x400>;
			interrupt-parent = <&vic1>;
			interrupts = <11>;
			clock-names = "uart", "clk_uart_baud0",
					"clk_uart_baud1";
			clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
					<&clocks SCLK_UART1>;
			status = "disabled";
		};

		uart2: serial@e2900800 {
			compatible = "samsung,s5pv210-uart";
			reg = <0xe2900800 0x400>;
			interrupt-parent = <&vic1>;
			interrupts = <12>;
			clock-names = "uart", "clk_uart_baud0",
					"clk_uart_baud1";
			clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
					<&clocks SCLK_UART2>;
			status = "disabled";
		};

		uart3: serial@e2900c00 {
			compatible = "samsung,s5pv210-uart";
			reg = <0xe2900c00 0x400>;
			interrupt-parent = <&vic1>;
			interrupts = <13>;
			clock-names = "uart", "clk_uart_baud0",
					"clk_uart_baud1";
			clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
					<&clocks SCLK_UART3>;
			status = "disabled";
		};

		sdhci0: sdhci@eb000000 {
			compatible = "samsung,s3c6410-sdhci";
			reg = <0xeb000000 0x100000>;
			interrupt-parent = <&vic1>;
			interrupts = <26>;
			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
			clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
					<&clocks SCLK_MMC0>;
			status = "disabled";
		};

		sdhci1: sdhci@eb100000 {
			compatible = "samsung,s3c6410-sdhci";
			reg = <0xeb100000 0x100000>;
			interrupt-parent = <&vic1>;
			interrupts = <27>;
			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
			clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
					<&clocks SCLK_MMC1>;
			status = "disabled";
		};

		sdhci2: sdhci@eb200000 {
			compatible = "samsung,s3c6410-sdhci";
			reg = <0xeb200000 0x100000>;
			interrupt-parent = <&vic1>;
			interrupts = <28>;
			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
			clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
					<&clocks SCLK_MMC2>;
			status = "disabled";
		};

		sdhci3: sdhci@eb300000 {
			compatible = "samsung,s3c6410-sdhci";
			reg = <0xeb300000 0x100000>;
			interrupt-parent = <&vic3>;
			interrupts = <2>;
			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
			clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
					<&clocks SCLK_MMC3>;
			status = "disabled";
		};

		hsotg: hsotg@ec000000 {
			compatible = "samsung,s3c6400-hsotg";
			reg = <0xec000000 0x20000>;
			interrupt-parent = <&vic1>;
			interrupts = <24>;
			clocks = <&clocks CLK_USB_OTG>;
			clock-names = "otg";
			phy-names = "usb2-phy";
			phys = <&usbphy 0>;
			status = "disabled";
		};

		usbphy: usbphy@ec100000 {
			compatible = "samsung,s5pv210-usb2-phy";
			reg = <0xec100000 0x100>;
			samsung,pmureg-phandle = <&pmu_syscon>;
			clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
			clock-names = "phy", "ref";
			#phy-cells = <1>;
			status = "disabled";
		};

		ehci: ehci@ec200000 {
			compatible = "samsung,exynos4210-ehci";
			reg = <0xec200000 0x100>;
			interrupts = <23>;
			interrupt-parent = <&vic1>;
			clocks = <&clocks CLK_USB_HOST>;
			clock-names = "usbhost";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			port@0 {
				reg = <0>;
				phys = <&usbphy 1>;
			};
		};

		ohci: ohci@ec300000 {
			compatible = "samsung,exynos4210-ohci";
			reg = <0xec300000 0x100>;
			interrupts = <23>;
			clocks = <&clocks CLK_USB_HOST>;
			clock-names = "usbhost";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			port@0 {
				reg = <0>;
				phys = <&usbphy 1>;
			};
		};

		mfc: codec@f1700000 {
			compatible = "samsung,mfc-v5";
			reg = <0xf1700000 0x10000>;
			interrupt-parent = <&vic2>;
			interrupts = <14>;
			clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
			clock-names = "sclk_mfc", "mfc";
		};

		vic0: interrupt-controller@f2000000 {
			compatible = "arm,pl192-vic";
			interrupt-controller;
			reg = <0xf2000000 0x1000>;
			#interrupt-cells = <1>;
		};

		vic1: interrupt-controller@f2100000 {
			compatible = "arm,pl192-vic";
			interrupt-controller;
			reg = <0xf2100000 0x1000>;
			#interrupt-cells = <1>;
		};

		vic2: interrupt-controller@f2200000 {
			compatible = "arm,pl192-vic";
			interrupt-controller;
			reg = <0xf2200000 0x1000>;
			#interrupt-cells = <1>;
		};

		vic3: interrupt-controller@f2300000 {
			compatible = "arm,pl192-vic";
			interrupt-controller;
			reg = <0xf2300000 0x1000>;
			#interrupt-cells = <1>;
		};

		fimd: fimd@f8000000 {
			compatible = "samsung,exynos4210-fimd";
			interrupt-parent = <&vic2>;
			reg = <0xf8000000 0x20000>;
			interrupt-names = "fifo", "vsync", "lcd_sys";
			interrupts = <0>, <1>, <2>;
			clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
			clock-names = "sclk_fimd", "fimd";
			status = "disabled";
		};

		g2d: g2d@fa000000 {
			compatible = "samsung,s5pv210-g2d";
			reg = <0xfa000000 0x1000>;
			interrupt-parent = <&vic2>;
			interrupts = <9>;
			clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
			clock-names = "sclk_fimg2d", "fimg2d";
		};

		mdma1: mdma@fa200000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0xfa200000 0x1000>;
			interrupt-parent = <&vic0>;
			interrupts = <18>;
			clocks = <&clocks CLK_MDMA>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <1>;
		};

		i2c1: i2c@fab00000 {
			compatible = "samsung,s3c2440-i2c";
			reg = <0xfab00000 0x1000>;
			interrupt-parent = <&vic2>;
			interrupts = <13>;
			clocks = <&clocks CLK_I2C1>;
			clock-names = "i2c";
			pinctrl-names = "default";
			pinctrl-0 = <&i2c1_bus>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		camera: camera {
			compatible = "samsung,fimc", "simple-bus";
			pinctrl-names = "default";
			pinctrl-0 = <>;
			clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
			clock-names = "sclk_cam0", "sclk_cam1";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			clock_cam: clock-controller {
				#clock-cells = <1>;
			};

			csis0: csis@fa600000 {
				compatible = "samsung,s5pv210-csis";
				reg = <0xfa600000 0x4000>;
				interrupt-parent = <&vic2>;
				interrupts = <29>;
				clocks = <&clocks CLK_CSIS>,
						<&clocks SCLK_CSIS>;
				clock-names = "clk_csis",
						"sclk_csis";
				bus-width = <4>;
				status = "disabled";
				#address-cells = <1>;
				#size-cells = <0>;
			};

			fimc0: fimc@fb200000 {
				compatible = "samsung,s5pv210-fimc";
				reg = <0xfb200000 0x1000>;
				interrupts = <5>;
				interrupt-parent = <&vic2>;
				clocks = <&clocks CLK_FIMC0>,
						<&clocks SCLK_FIMC0>;
				clock-names = "fimc",
						"sclk_fimc";
				samsung,pix-limits = <4224 8192 1920 4224>;
				samsung,mainscaler-ext;
				samsung,cam-if;
			};

			fimc1: fimc@fb300000 {
				compatible = "samsung,s5pv210-fimc";
				reg = <0xfb300000 0x1000>;
				interrupt-parent = <&vic2>;
				interrupts = <6>;
				clocks = <&clocks CLK_FIMC1>,
						<&clocks SCLK_FIMC1>;
				clock-names = "fimc",
						"sclk_fimc";
				samsung,pix-limits = <4224 8192 1920 4224>;
				samsung,mainscaler-ext;
				samsung,cam-if;
			};

			fimc2: fimc@fb400000 {
				compatible = "samsung,s5pv210-fimc";
				reg = <0xfb400000 0x1000>;
				interrupt-parent = <&vic2>;
				interrupts = <7>;
				clocks = <&clocks CLK_FIMC2>,
						<&clocks SCLK_FIMC2>;
				clock-names = "fimc",
						"sclk_fimc";
				samsung,pix-limits = <4224 8192 1920 4224>;
				samsung,mainscaler-ext;
				samsung,lcd-wb;
			};
		};
	};
};

#include "s5pv210-pinctrl.dtsi"
Commit	Line	Data
e9c1fad0	1	// SPDX-License-Identifier: GPL-2.0
94ad0f6d MK	2	/*
	3	* Samsung's S5PV210 SoC device tree source
	4	*
	5	* Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
	6	*
	7	* Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
	8	* Tomasz Figa <t.figa@samsung.com>
	9	*
	10	* Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
	11	* based board files can include this file and provide values for board specfic
	12	* bindings.
	13	*
	14	* Note: This file does not include device nodes for all the controllers in
	15	* S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
	16	* nodes can be added to this file.
e9c1fad0	17	*/
94ad0f6d	18
94ad0f6d MK	19	#include <dt-bindings/clock/s5pv210.h>
	20	#include <dt-bindings/clock/s5pv210-audss.h>
	21
	22	/ {
80555b6f JMC	23	#address-cells = <1>;
	24	#size-cells = <1>;
	25
94ad0f6d MK	26	aliases {
	27	csis0 = &csis0;
	28	fimc0 = &fimc0;
	29	fimc1 = &fimc1;
	30	fimc2 = &fimc2;
	31	i2c0 = &i2c0;
	32	i2c1 = &i2c1;
	33	i2c2 = &i2c2;
	34	i2s0 = &i2s0;
	35	i2s1 = &i2s1;
	36	i2s2 = &i2s2;
	37	pinctrl0 = &pinctrl0;
	38	spi0 = &spi0;
	39	spi1 = &spi1;
	40	};
	41
	42	cpus {
	43	#address-cells = <1>;
	44	#size-cells = <0>;
	45
	46	cpu@0 {
	47	device_type = "cpu";
	48	compatible = "arm,cortex-a8";
	49	reg = <0>;
	50	};
	51	};
	52
	53	soc {
	54	compatible = "simple-bus";
	55	#address-cells = <1>;
	56	#size-cells = <1>;
	57	ranges;
	58
	59	external-clocks {
	60	compatible = "simple-bus";
	61	#address-cells = <1>;
	62	#size-cells = <0>;
	63
	64	xxti: oscillator@0 {
	65	compatible = "fixed-clock";
	66	reg = <0>;
	67	clock-frequency = <0>;
	68	clock-output-names = "xxti";
	69	#clock-cells = <0>;
	70	};
	71
	72	xusbxti: oscillator@1 {
	73	compatible = "fixed-clock";
	74	reg = <1>;
	75	clock-frequency = <0>;
	76	clock-output-names = "xusbxti";
	77	#clock-cells = <0>;
	78	};
	79	};
	80
	81	onenand: onenand@b0000000 {
	82	compatible = "samsung,s5pv210-onenand";
	83	reg = <0xb0600000 0x2000>,
	84	<0xb0000000 0x20000>,
	85	<0xb0040000 0x20000>;
	86	interrupt-parent = <&vic1>;
	87	interrupts = <31>;
	88	clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
	89	clock-names = "bus", "onenand";
90	#address-cells = <1>;
91	#size-cells = <1>;
92	status = "disabled";
93	};
94
95	chipid@e0000000 {
96	compatible = "samsung,s5pv210-chipid";
97	reg = <0xe0000000 0x1000>;
98	};
99
100	clocks: clock-controller@e0100000 {
101	compatible = "samsung,s5pv210-clock", "simple-bus";
102	reg = <0xe0100000 0x10000>;
103	clock-names = "xxti", "xusbxti";
104	clocks = <&xxti>, <&xusbxti>;
105	#clock-cells = <1>;
106	#address-cells = <1>;
107	#size-cells = <1>;
108	ranges;
109
110	pmu_syscon: syscon@e0108000 {
111	compatible = "samsung-s5pv210-pmu", "syscon";
112	reg = <0xe0108000 0x8000>;
113	};
114	};
115
116	pinctrl0: pinctrl@e0200000 {
117	compatible = "samsung,s5pv210-pinctrl";
118	reg = <0xe0200000 0x1000>;
119	interrupt-parent = <&vic0>;
120	interrupts = <30>;
121
122	wakeup-interrupt-controller {
123	compatible = "samsung,exynos4210-wakeup-eint";
124	interrupts = <16>;
125	interrupt-parent = <&vic0>;
126	};
127	};
128
129	amba {
130	#address-cells = <1>;
131	#size-cells = <1>;
2ef7d5f3	132	compatible = "simple-bus";
94ad0f6d MK	133	ranges;
	134
	135	pdma0: dma@e0900000 {
	136	compatible = "arm,pl330", "arm,primecell";
	137	reg = <0xe0900000 0x1000>;
	138	interrupt-parent = <&vic0>;
	139	interrupts = <19>;
	140	clocks = <&clocks CLK_PDMA0>;
	141	clock-names = "apb_pclk";
	142	#dma-cells = <1>;
	143	#dma-channels = <8>;
	144	#dma-requests = <32>;
	145	};
	146
	147	pdma1: dma@e0a00000 {
	148	compatible = "arm,pl330", "arm,primecell";
	149	reg = <0xe0a00000 0x1000>;
	150	interrupt-parent = <&vic0>;
	151	interrupts = <20>;
	152	clocks = <&clocks CLK_PDMA1>;
	153	clock-names = "apb_pclk";
	154	#dma-cells = <1>;
	155	#dma-channels = <8>;
	156	#dma-requests = <32>;
	157	};
	158	};
	159
	160	spi0: spi@e1300000 {
	161	compatible = "samsung,s5pv210-spi";
	162	reg = <0xe1300000 0x1000>;
	163	interrupt-parent = <&vic1>;
	164	interrupts = <15>;
	165	dmas = <&pdma0 7>, <&pdma0 6>;
	166	dma-names = "tx", "rx";
	167	clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
	168	clock-names = "spi", "spi_busclk0";
	169	pinctrl-names = "default";
	170	pinctrl-0 = <&spi0_bus>;
	171	#address-cells = <1>;
	172	#size-cells = <0>;
	173	status = "disabled";
	174	};
	175
	176	spi1: spi@e1400000 {
	177	compatible = "samsung,s5pv210-spi";
	178	reg = <0xe1400000 0x1000>;
	179	interrupt-parent = <&vic1>;
	180	interrupts = <16>;
	181	dmas = <&pdma1 7>, <&pdma1 6>;
	182	dma-names = "tx", "rx";
	183	clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
	184	clock-names = "spi", "spi_busclk0";
	185	pinctrl-names = "default";
	186	pinctrl-0 = <&spi1_bus>;
	187	#address-cells = <1>;
	188	#size-cells = <0>;
	189	status = "disabled";
	190	};
	191
	192	keypad: keypad@e1600000 {
	193	compatible = "samsung,s5pv210-keypad";
	194	reg = <0xe1600000 0x1000>;
	195	interrupt-parent = <&vic2>;
	196	interrupts = <25>;
197	clocks = <&clocks CLK_KEYIF>;
198	clock-names = "keypad";
199	status = "disabled";
200	};
201
202	i2c0: i2c@e1800000 {
203	compatible = "samsung,s3c2440-i2c";
204	reg = <0xe1800000 0x1000>;
205	interrupt-parent = <&vic1>;
206	interrupts = <14>;
207	clocks = <&clocks CLK_I2C0>;
208	clock-names = "i2c";
209	pinctrl-names = "default";
210	pinctrl-0 = <&i2c0_bus>;
211	#address-cells = <1>;
212	#size-cells = <0>;
213	status = "disabled";
214	};
215
216	i2c2: i2c@e1a00000 {
217	compatible = "samsung,s3c2440-i2c";
218	reg = <0xe1a00000 0x1000>;
219	interrupt-parent = <&vic1>;
220	interrupts = <19>;
221	clocks = <&clocks CLK_I2C2>;
222	clock-names = "i2c";
223	pinctrl-0 = <&i2c2_bus>;
224	pinctrl-names = "default";
225	#address-cells = <1>;
226	#size-cells = <0>;
227	status = "disabled";
228	};
229
230	audio-subsystem {
231	compatible = "samsung,s5pv210-audss", "simple-bus";
232	#address-cells = <1>;
233	#size-cells = <1>;
234	ranges;
235
236	clk_audss: clock-controller@eee10000 {
237	compatible = "samsung,s5pv210-audss-clock";
238	reg = <0xeee10000 0x1000>;
239	clock-names = "hclk", "xxti",
240	"fout_epll",
241	"sclk_audio0";
242	clocks = <&clocks DOUT_HCLKP>, <&xxti>,
243	<&clocks FOUT_EPLL>,
244	<&clocks SCLK_AUDIO0>;
245	#clock-cells = <1>;
246	};
247
248	i2s0: i2s@eee30000 {
249	compatible = "samsung,s5pv210-i2s";
250	reg = <0xeee30000 0x1000>;
251	interrupt-parent = <&vic2>;
252	interrupts = <16>;
253	dma-names = "rx", "tx", "tx-sec";
254	dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
255	clock-names = "iis",
256	"i2s_opclk0",
257	"i2s_opclk1";
258	clocks = <&clk_audss CLK_I2S>,
259	<&clk_audss CLK_I2S>,
260	<&clk_audss CLK_DOUT_AUD_BUS>;
261	samsung,idma-addr = <0xc0010000>;
262	pinctrl-names = "default";
263	pinctrl-0 = <&i2s0_bus>;
264	#sound-dai-cells = <0>;
265	status = "disabled";
266	};
267	};
268
269	i2s1: i2s@e2100000 {
270	compatible = "samsung,s3c6410-i2s";
271	reg = <0xe2100000 0x1000>;
272	interrupt-parent = <&vic2>;
273	interrupts = <17>;
274	dma-names = "rx", "tx";
275	dmas = <&pdma1 12>, <&pdma1 13>;
276	clock-names = "iis", "i2s_opclk0";
277	clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
278	pinctrl-names = "default";
279	pinctrl-0 = <&i2s1_bus>;
280	#sound-dai-cells = <0>;
281	status = "disabled";
282	};
283
284	i2s2: i2s@e2a00000 {
285	compatible = "samsung,s3c6410-i2s";
286	reg = <0xe2a00000 0x1000>;
287	interrupt-parent = <&vic2>;
288	interrupts = <18>;
289	dma-names = "rx", "tx";
290	dmas = <&pdma1 14>, <&pdma1 15>;
291	clock-names = "iis", "i2s_opclk0";
292	clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
293	pinctrl-names = "default";
294	pinctrl-0 = <&i2s2_bus>;
295	#sound-dai-cells = <0>;
296	status = "disabled";
297	};
298
299	pwm: pwm@e2500000 {
300	compatible = "samsung,s5pc100-pwm";
301	reg = <0xe2500000 0x1000>;
302	interrupt-parent = <&vic0>;
303	interrupts = <21>, <22>, <23>, <24>, <25>;
304	clock-names = "timers";
305	clocks = <&clocks CLK_PWM>;
306	#pwm-cells = <3>;
307	};
308
309	watchdog: watchdog@e2700000 {
c70d219b	310	compatible = "samsung,s3c6410-wdt";
94ad0f6d MK	311	reg = <0xe2700000 0x1000>;
	312	interrupt-parent = <&vic0>;
	313	interrupts = <26>;
	314	clock-names = "watchdog";
	315	clocks = <&clocks CLK_WDT>;
	316	};
	317
	318	rtc: rtc@e2800000 {
	319	compatible = "samsung,s3c6410-rtc";
	320	reg = <0xe2800000 0x100>;
	321	interrupt-parent = <&vic0>;
	322	interrupts = <28>, <29>;
	323	clocks = <&clocks CLK_RTC>;
	324	clock-names = "rtc";
	325	status = "disabled";
	326	};
	327
	328	uart0: serial@e2900000 {
	329	compatible = "samsung,s5pv210-uart";
	330	reg = <0xe2900000 0x400>;
	331	interrupt-parent = <&vic1>;
	332	interrupts = <10>;
	333	clock-names = "uart", "clk_uart_baud0",
	334	"clk_uart_baud1";
	335	clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
	336	<&clocks SCLK_UART0>;
	337	status = "disabled";
	338	};
	339
	340	uart1: serial@e2900400 {
	341	compatible = "samsung,s5pv210-uart";
	342	reg = <0xe2900400 0x400>;
	343	interrupt-parent = <&vic1>;
	344	interrupts = <11>;
	345	clock-names = "uart", "clk_uart_baud0",
	346	"clk_uart_baud1";
	347	clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
	348	<&clocks SCLK_UART1>;
	349	status = "disabled";
	350	};
	351
	352	uart2: serial@e2900800 {
	353	compatible = "samsung,s5pv210-uart";
	354	reg = <0xe2900800 0x400>;
	355	interrupt-parent = <&vic1>;
	356	interrupts = <12>;
	357	clock-names = "uart", "clk_uart_baud0",
	358	"clk_uart_baud1";
	359	clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
	360	<&clocks SCLK_UART2>;
	361	status = "disabled";
	362	};
	363
	364	uart3: serial@e2900c00 {
	365	compatible = "samsung,s5pv210-uart";
	366	reg = <0xe2900c00 0x400>;
	367	interrupt-parent = <&vic1>;
	368	interrupts = <13>;
	369	clock-names = "uart", "clk_uart_baud0",
	370	"clk_uart_baud1";
	371	clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
	372	<&clocks SCLK_UART3>;
	373	status = "disabled";
	374	};
375
376	sdhci0: sdhci@eb000000 {
377	compatible = "samsung,s3c6410-sdhci";
378	reg = <0xeb000000 0x100000>;
379	interrupt-parent = <&vic1>;
380	interrupts = <26>;
381	clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
382	clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
383	<&clocks SCLK_MMC0>;
384	status = "disabled";
385	};
386
387	sdhci1: sdhci@eb100000 {
388	compatible = "samsung,s3c6410-sdhci";
389	reg = <0xeb100000 0x100000>;
390	interrupt-parent = <&vic1>;
391	interrupts = <27>;
392	clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
393	clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
394	<&clocks SCLK_MMC1>;
395	status = "disabled";
396	};
397
398	sdhci2: sdhci@eb200000 {
399	compatible = "samsung,s3c6410-sdhci";
400	reg = <0xeb200000 0x100000>;
401	interrupt-parent = <&vic1>;
402	interrupts = <28>;
403	clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
404	clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
405	<&clocks SCLK_MMC2>;
406	status = "disabled";
407	};
408
409	sdhci3: sdhci@eb300000 {
410	compatible = "samsung,s3c6410-sdhci";
411	reg = <0xeb300000 0x100000>;
412	interrupt-parent = <&vic3>;
413	interrupts = <2>;
414	clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
415	clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
416	<&clocks SCLK_MMC3>;
417	status = "disabled";
418	};
419
420	hsotg: hsotg@ec000000 {
421	compatible = "samsung,s3c6400-hsotg";
422	reg = <0xec000000 0x20000>;
423	interrupt-parent = <&vic1>;
424	interrupts = <24>;
425	clocks = <&clocks CLK_USB_OTG>;
426	clock-names = "otg";
427	phy-names = "usb2-phy";
428	phys = <&usbphy 0>;
429	status = "disabled";
430	};
431
432	usbphy: usbphy@ec100000 {
433	compatible = "samsung,s5pv210-usb2-phy";
434	reg = <0xec100000 0x100>;
435	samsung,pmureg-phandle = <&pmu_syscon>;
436	clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
437	clock-names = "phy", "ref";
438	#phy-cells = <1>;
439	status = "disabled";
440	};
441
442	ehci: ehci@ec200000 {
443	compatible = "samsung,exynos4210-ehci";
444	reg = <0xec200000 0x100>;
445	interrupts = <23>;
446	interrupt-parent = <&vic1>;
447	clocks = <&clocks CLK_USB_HOST>;
448	clock-names = "usbhost";
449	#address-cells = <1>;
450	#size-cells = <0>;
451	status = "disabled";
452
453	port@0 {
454	reg = <0>;
455	phys = <&usbphy 1>;
456	};
457	};
458
459	ohci: ohci@ec300000 {
460	compatible = "samsung,exynos4210-ohci";
461	reg = <0xec300000 0x100>;
462	interrupts = <23>;
463	clocks = <&clocks CLK_USB_HOST>;
464	clock-names = "usbhost";
465	#address-cells = <1>;
466	#size-cells = <0>;
467	status = "disabled";
468
469	port@0 {
470	reg = <0>;
471	phys = <&usbphy 1>;
472	};
473	};
474
475	mfc: codec@f1700000 {
476	compatible = "samsung,mfc-v5";
477	reg = <0xf1700000 0x10000>;
478	interrupt-parent = <&vic2>;
479	interrupts = <14>;
480	clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
481	clock-names = "sclk_mfc", "mfc";
482	};
483
484	vic0: interrupt-controller@f2000000 {
485	compatible = "arm,pl192-vic";
486	interrupt-controller;
487	reg = <0xf2000000 0x1000>;
488	#interrupt-cells = <1>;
489	};
490
491	vic1: interrupt-controller@f2100000 {
492	compatible = "arm,pl192-vic";
493	interrupt-controller;
494	reg = <0xf2100000 0x1000>;
495	#interrupt-cells = <1>;
496	};
497
498	vic2: interrupt-controller@f2200000 {
499	compatible = "arm,pl192-vic";
500	interrupt-controller;
501	reg = <0xf2200000 0x1000>;
502	#interrupt-cells = <1>;
503	};
504
505	vic3: interrupt-controller@f2300000 {
506	compatible = "arm,pl192-vic";
507	interrupt-controller;
508	reg = <0xf2300000 0x1000>;
509	#interrupt-cells = <1>;
510	};
511
512	fimd: fimd@f8000000 {
513	compatible = "samsung,exynos4210-fimd";
514	interrupt-parent = <&vic2>;
515	reg = <0xf8000000 0x20000>;
516	interrupt-names = "fifo", "vsync", "lcd_sys";
517	interrupts = <0>, <1>, <2>;
518	clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
519	clock-names = "sclk_fimd", "fimd";
520	status = "disabled";
521	};
522
523	g2d: g2d@fa000000 {
524	compatible = "samsung,s5pv210-g2d";
525	reg = <0xfa000000 0x1000>;
526	interrupt-parent = <&vic2>;
527	interrupts = <9>;
528	clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
529	clock-names = "sclk_fimg2d", "fimg2d";
530	};
531
532	mdma1: mdma@fa200000 {
533	compatible = "arm,pl330", "arm,primecell";
534	reg = <0xfa200000 0x1000>;
535	interrupt-parent = <&vic0>;
536	interrupts = <18>;
537	clocks = <&clocks CLK_MDMA>;
538	clock-names = "apb_pclk";
539	#dma-cells = <1>;
540	#dma-channels = <8>;
541	#dma-requests = <1>;
542	};
543
544	i2c1: i2c@fab00000 {
545	compatible = "samsung,s3c2440-i2c";
546	reg = <0xfab00000 0x1000>;
547	interrupt-parent = <&vic2>;
548	interrupts = <13>;
549	clocks = <&clocks CLK_I2C1>;
550	clock-names = "i2c";
551	pinctrl-names = "default";
552	pinctrl-0 = <&i2c1_bus>;
553	#address-cells = <1>;
554	#size-cells = <0>;
555	status = "disabled";
556	};
557
558	camera: camera {
559	compatible = "samsung,fimc", "simple-bus";
560	pinctrl-names = "default";
561	pinctrl-0 = <>;
562	clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
563	clock-names = "sclk_cam0", "sclk_cam1";
564	#address-cells = <1>;
565	#size-cells = <1>;
566	ranges;
567
568	clock_cam: clock-controller {
569	#clock-cells = <1>;
570	};
571
572	csis0: csis@fa600000 {
573	compatible = "samsung,s5pv210-csis";
574	reg = <0xfa600000 0x4000>;
575	interrupt-parent = <&vic2>;
576	interrupts = <29>;
577	clocks = <&clocks CLK_CSIS>,
578	<&clocks SCLK_CSIS>;
579	clock-names = "clk_csis",
580	"sclk_csis";
581	bus-width = <4>;
582	status = "disabled";
583	#address-cells = <1>;
584	#size-cells = <0>;
585	};
586
587	fimc0: fimc@fb200000 {
588	compatible = "samsung,s5pv210-fimc";
589	reg = <0xfb200000 0x1000>;
590	interrupts = <5>;
591	interrupt-parent = <&vic2>;
592	clocks = <&clocks CLK_FIMC0>,
593	<&clocks SCLK_FIMC0>;
594	clock-names = "fimc",
595	"sclk_fimc";
596	samsung,pix-limits = <4224 8192 1920 4224>;
597	samsung,mainscaler-ext;
598	samsung,cam-if;
599	};
600
601	fimc1: fimc@fb300000 {
602	compatible = "samsung,s5pv210-fimc";
603	reg = <0xfb300000 0x1000>;
604	interrupt-parent = <&vic2>;
605	interrupts = <6>;
606	clocks = <&clocks CLK_FIMC1>,
607	<&clocks SCLK_FIMC1>;
608	clock-names = "fimc",
609	"sclk_fimc";
610	samsung,pix-limits = <4224 8192 1920 4224>;
611	samsung,mainscaler-ext;
612	samsung,cam-if;
613	};
614
615	fimc2: fimc@fb400000 {
616	compatible = "samsung,s5pv210-fimc";
617	reg = <0xfb400000 0x1000>;
618	interrupt-parent = <&vic2>;
619	interrupts = <7>;
620	clocks = <&clocks CLK_FIMC2>,
621	<&clocks SCLK_FIMC2>;
622	clock-names = "fimc",
623	"sclk_fimc";
624	samsung,pix-limits = <4224 8192 1920 4224>;
625	samsung,mainscaler-ext;
626	samsung,lcd-wb;
627	};
628	};
629	};
630	};
631
632	#include "s5pv210-pinctrl.dtsi"