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ARM: dts: socfpga: Add unit name to clock nodes
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / socfpga_cyclone5_socdk.dts
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1/*
2 * Copyright (C) 2012 Altera Corporation <www.altera.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
7da9b436 18#include "socfpga_cyclone5.dtsi"
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19
20/ {
071fb4cb 21 model = "Altera SOCFPGA Cyclone V SoC Development Kit";
d1da6635 22 compatible = "altr,socfpga-cyclone5-socdk", "altr,socfpga-cyclone5", "altr,socfpga";
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23
24 chosen {
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25 bootargs = "earlyprintk";
26 stdout-path = "serial0:115200n8";
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27 };
28
29 memory {
30 name = "memory";
31 device_type = "memory";
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32 reg = <0x0 0x40000000>; /* 1GB */
33 };
34
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35 aliases {
36 /* this allow the ethaddr uboot environmnet variable contents
37 * to be added to the gmac1 device tree blob.
38 */
39 ethernet0 = &gmac1;
40 };
efb4a44e 41
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42 leds {
43 compatible = "gpio-leds";
44 hps0 {
45 label = "hps_led0";
46 gpios = <&portb 15 1>;
47 };
48
49 hps1 {
50 label = "hps_led1";
51 gpios = <&portb 14 1>;
52 };
53
54 hps2 {
55 label = "hps_led2";
56 gpios = <&portb 13 1>;
57 };
58
59 hps3 {
60 label = "hps_led3";
61 gpios = <&portb 12 1>;
62 };
63 };
64
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65 regulator_3_3v: 3-3-v-regulator {
66 compatible = "regulator-fixed";
67 regulator-name = "3.3V";
68 regulator-min-microvolt = <3300000>;
69 regulator-max-microvolt = <3300000>;
70 };
66314223 71};
2755e187 72
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73&can0 {
74 status = "okay";
75};
76
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77&gmac1 {
78 status = "okay";
79 phy-mode = "rgmii";
80
81 rxd0-skew-ps = <0>;
82 rxd1-skew-ps = <0>;
83 rxd2-skew-ps = <0>;
84 rxd3-skew-ps = <0>;
85 txen-skew-ps = <0>;
86 txc-skew-ps = <2600>;
87 rxdv-skew-ps = <0>;
88 rxc-skew-ps = <2000>;
89};
58303f1f 90
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91&gpio0 {
92 status = "okay";
93};
94
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95&gpio1 {
96 status = "okay";
97};
98
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99&gpio2 {
100 status = "okay";
101};
102
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103&i2c0 {
104 status = "okay";
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105 clock-frequency = <100000>;
106
107 /*
108 * adjust the falling times to decrease the i2c frequency to 50Khz
109 * because the LCD module does not work at the standard 100Khz
110 */
111 i2c-sda-falling-time-ns = <5000>;
112 i2c-scl-falling-time-ns = <5000>;
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113
114 eeprom@51 {
115 compatible = "atmel,24c32";
116 reg = <0x51>;
117 pagesize = <32>;
118 };
119
120 rtc@68 {
121 compatible = "dallas,ds1339";
122 reg = <0x68>;
123 };
124};
1403250b 125
8126def8 126&mmc0 {
23920c05 127 cd-gpios = <&portb 18 0>;
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128 vmmc-supply = <&regulator_3_3v>;
129 vqmmc-supply = <&regulator_3_3v>;
91f69147 130 status = "okay";
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131};
132
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133&qspi {
134 status = "okay";
135
136 flash0: n25q00@0 {
137 #address-cells = <1>;
138 #size-cells = <1>;
139 compatible = "n25q00";
140 reg = <0>; /* chip select */
141 spi-max-frequency = <100000000>;
142
143 m25p,fast-read;
144 cdns,page-size = <256>;
145 cdns,block-size = <16>;
146 cdns,read-delay = <4>;
147 cdns,tshsl-ns = <50>;
148 cdns,tsd2d-ns = <50>;
149 cdns,tchsh-ns = <4>;
150 cdns,tslch-ns = <4>;
151
152 partition@qspi-boot {
153 /* 8MB for raw data. */
154 label = "Flash 0 Raw Data";
155 reg = <0x0 0x800000>;
156 };
157
158 partition@qspi-rootfs {
159 /* 120MB for jffs2 data. */
160 label = "Flash 0 jffs2 Filesystem";
161 reg = <0x800000 0x7800000>;
162 };
163 };
164};
165
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166&spi0 {
167 status = "okay";
168
169 spidev@0 {
170 compatible = "rohm,dh2228fv";
171 reg = <0>;
172 spi-max-frequency = <1000000>;
173 };
174};
175
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176&usb1 {
177 status = "okay";
178};