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07658d9a VK |
1 | /* |
2 | * DTS file for all SPEAr1340 SoCs | |
3 | * | |
da89947b | 4 | * Copyright 2012 Viresh Kumar <vireshk@kernel.org> |
07658d9a VK |
5 | * |
6 | * The code contained herein is licensed under the GNU General Public | |
7 | * License. You may obtain a copy of the GNU General Public License | |
8 | * Version 2 or later at the following locations: | |
9 | * | |
10 | * http://www.opensource.org/licenses/gpl-license.html | |
11 | * http://www.gnu.org/copyleft/gpl.html | |
12 | */ | |
13 | ||
14 | /include/ "spear13xx.dtsi" | |
15 | ||
16 | / { | |
17 | compatible = "st,spear1340"; | |
18 | ||
19 | ahb { | |
7cef07d5 SH |
20 | |
21 | spics: spics@e0700000{ | |
22 | compatible = "st,spear-spics-gpio"; | |
23 | reg = <0xe0700000 0x1000>; | |
24 | st-spics,peripcfg-reg = <0x42c>; | |
25 | st-spics,sw-enable-bit = <21>; | |
26 | st-spics,cs-value-bit = <20>; | |
27 | st-spics,cs-enable-mask = <3>; | |
28 | st-spics,cs-enable-shift = <18>; | |
29 | gpio-controller; | |
30 | #gpio-cells = <2>; | |
31 | status = "disabled"; | |
32 | }; | |
33 | ||
549f3ae1 PA |
34 | miphy0: miphy@eb800000 { |
35 | compatible = "st,spear1340-miphy"; | |
36 | reg = <0xeb800000 0x4000>; | |
37 | misc = <&misc>; | |
38 | #phy-cells = <1>; | |
39 | status = "disabled"; | |
40 | }; | |
41 | ||
42 | ahci0: ahci@b1000000 { | |
07658d9a VK |
43 | compatible = "snps,spear-ahci"; |
44 | reg = <0xb1000000 0x10000>; | |
45 | interrupts = <0 72 0x4>; | |
549f3ae1 PA |
46 | phys = <&miphy0 0>; |
47 | phy-names = "sata-phy"; | |
48 | status = "disabled"; | |
49 | }; | |
50 | ||
51 | pcie0: pcie@b1000000 { | |
52 | compatible = "st,spear1340-pcie", "snps,dw-pcie"; | |
65aaae24 PA |
53 | reg = <0xb1000000 0x4000>, <0x80000000 0x20000>; |
54 | reg-names = "dbi", "config"; | |
549f3ae1 PA |
55 | interrupts = <0 68 0x4>; |
56 | interrupt-map-mask = <0 0 0 0>; | |
57 | interrupt-map = <0x0 0 &gic 0 68 0x4>; | |
58 | num-lanes = <1>; | |
59 | phys = <&miphy0 1>; | |
60 | phy-names = "pcie-phy"; | |
61 | #address-cells = <3>; | |
62 | #size-cells = <2>; | |
63 | device_type = "pci"; | |
65aaae24 | 64 | ranges = <0x81000000 0 0 0x80020000 0 0x00010000 /* downstream I/O */ |
549f3ae1 | 65 | 0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */ |
a7a34d11 | 66 | bus-range = <0x00 0xff>; |
07658d9a VK |
67 | status = "disabled"; |
68 | }; | |
69 | ||
8113ba91 SH |
70 | i2s-play@b2400000 { |
71 | compatible = "snps,designware-i2s"; | |
72 | reg = <0xb2400000 0x10000>; | |
73 | interrupt-names = "play_irq"; | |
74 | interrupts = <0 98 0x4 | |
75 | 0 99 0x4>; | |
76 | play; | |
77 | channel = <8>; | |
78 | status = "disabled"; | |
79 | }; | |
80 | ||
81 | i2s-rec@b2000000 { | |
82 | compatible = "snps,designware-i2s"; | |
83 | reg = <0xb2000000 0x10000>; | |
84 | interrupt-names = "record_irq"; | |
85 | interrupts = <0 100 0x4 | |
86 | 0 101 0x4>; | |
87 | record; | |
88 | channel = <8>; | |
89 | status = "disabled"; | |
90 | }; | |
91 | ||
4ddb1c29 VK |
92 | pinmux: pinmux@e0700000 { |
93 | compatible = "st,spear1340-pinmux"; | |
94 | reg = <0xe0700000 0x1000>; | |
86853c83 | 95 | #gpio-range-cells = <3>; |
4ddb1c29 VK |
96 | }; |
97 | ||
8113ba91 SH |
98 | pwm: pwm@e0180000 { |
99 | compatible ="st,spear13xx-pwm"; | |
100 | reg = <0xe0180000 0x1000>; | |
101 | #pwm-cells = <2>; | |
102 | status = "disabled"; | |
103 | }; | |
104 | ||
105 | spdif-in@d0100000 { | |
106 | compatible = "st,spdif-in"; | |
107 | reg = < 0xd0100000 0x20000 | |
108 | 0xd0110000 0x10000 >; | |
109 | interrupts = <0 84 0x4>; | |
110 | status = "disabled"; | |
111 | }; | |
112 | ||
113 | spdif-out@d0000000 { | |
114 | compatible = "st,spdif-out"; | |
115 | reg = <0xd0000000 0x20000>; | |
116 | interrupts = <0 85 0x4>; | |
117 | status = "disabled"; | |
118 | }; | |
119 | ||
07658d9a VK |
120 | spi1: spi@5d400000 { |
121 | compatible = "arm,pl022", "arm,primecell"; | |
122 | reg = <0x5d400000 0x1000>; | |
8113ba91 SH |
123 | #address-cells = <1>; |
124 | #size-cells = <0>; | |
07658d9a VK |
125 | interrupts = <0 99 0x4>; |
126 | status = "disabled"; | |
127 | }; | |
128 | ||
129 | apb { | |
130 | i2c1: i2c@b4000000 { | |
131 | #address-cells = <1>; | |
132 | #size-cells = <0>; | |
133 | compatible = "snps,designware-i2c"; | |
134 | reg = <0xb4000000 0x1000>; | |
135 | interrupts = <0 104 0x4>; | |
f631b984 | 136 | write-16bit; |
07658d9a VK |
137 | status = "disabled"; |
138 | }; | |
139 | ||
140 | serial@b4100000 { | |
141 | compatible = "arm,pl011", "arm,primecell"; | |
142 | reg = <0xb4100000 0x1000>; | |
143 | interrupts = <0 105 0x4>; | |
144 | status = "disabled"; | |
cdd10409 VK |
145 | dmas = <&dwdma0 12 0 1>, |
146 | <&dwdma0 13 1 0>; | |
6e8887f6 | 147 | dma-names = "tx", "rx"; |
07658d9a VK |
148 | }; |
149 | ||
150 | thermal@e07008c4 { | |
151 | st,thermal-flags = <0x2a00>; | |
152 | }; | |
4ddb1c29 VK |
153 | |
154 | gpiopinctrl: gpio@e2800000 { | |
155 | compatible = "st,spear-plgpio"; | |
156 | reg = <0xe2800000 0x1000>; | |
157 | interrupts = <0 107 0x4>; | |
158 | #interrupt-cells = <1>; | |
159 | interrupt-controller; | |
160 | gpio-controller; | |
161 | #gpio-cells = <2>; | |
86853c83 | 162 | gpio-ranges = <&pinmux 0 0 252>; |
4ddb1c29 VK |
163 | status = "disabled"; |
164 | ||
165 | st-plgpio,ngpio = <250>; | |
166 | st-plgpio,wdata-reg = <0x40>; | |
167 | st-plgpio,dir-reg = <0x00>; | |
168 | st-plgpio,ie-reg = <0x80>; | |
169 | st-plgpio,rdata-reg = <0x20>; | |
170 | st-plgpio,mis-reg = <0xa0>; | |
171 | st-plgpio,eit-reg = <0x60>; | |
172 | }; | |
07658d9a VK |
173 | }; |
174 | }; | |
175 | }; |