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ARM: ux500: Add TWD (fixed-factor) clock node to DBx500 Device Tree
[mirror_ubuntu-jammy-kernel.git] / arch / arm / boot / dts / ste-dbx5x0.dtsi
CommitLineData
5d0769f0
AB
1/*
2 * Copyright 2012 Linaro Ltd
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
90c40257 12#include <dt-bindings/interrupt-controller/irq.h>
841cd0c0 13#include <dt-bindings/mfd/dbx500-prcmu.h>
807e8838 14#include "skeleton.dtsi"
5d0769f0
AB
15
16/ {
b1ba1439 17 soc {
5d0769f0
AB
18 #address-cells = <1>;
19 #size-cells = <1>;
7e0ce270 20 compatible = "stericsson,db8500";
dab6487e 21 interrupt-parent = <&intc>;
5d0769f0 22 ranges;
7e0ce270 23
dab6487e
LJ
24 intc: interrupt-controller@a0411000 {
25 compatible = "arm,cortex-a9-gic";
26 #interrupt-cells = <3>;
27 #address-cells = <1>;
28 interrupt-controller;
dab6487e
LJ
29 reg = <0xa0411000 0x1000>,
30 <0xa0410100 0x100>;
31 };
32
f1949ea0
LJ
33 L2: l2-cache {
34 compatible = "arm,pl310-cache";
35 reg = <0xa0412000 0x1000>;
90c40257 36 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
f1949ea0
LJ
37 cache-unified;
38 cache-level = <2>;
39 };
40
7e0ce270
LJ
41 pmu {
42 compatible = "arm,cortex-a9-pmu";
90c40257 43 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
7e0ce270
LJ
44 };
45
841cd0c0
LJ
46 clocks {
47 compatible = "stericsson,u8500-clks";
48
49 prcmu_clk: prcmu-clock {
50 #clock-cells = <1>;
51 };
fcbe5e90
LJ
52
53 prcc_pclk: prcc-periph-clock {
54 #clock-cells = <2>;
55 };
2588fea6
LJ
56
57 prcc_kclk: prcc-kernel-clock {
58 #clock-cells = <2>;
59 };
589d9839
LJ
60
61 rtc_clk: rtc32k-clock {
62 #clock-cells = <0>;
63 };
309012d7
LJ
64
65 smp_twd_clk: smp-twd-clock {
66 #clock-cells = <0>;
67 };
841cd0c0
LJ
68 };
69
71de5c46
LJ
70 timer@a0410600 {
71 compatible = "arm,cortex-a9-twd-timer";
72 reg = <0xa0410600 0x20>;
90c40257 73 interrupts = <1 13 0x304>; /* IRQ level high per-CPU */
71de5c46
LJ
74 };
75
7e0ce270 76 rtc@80154000 {
ddb3b99c 77 compatible = "arm,rtc-pl031", "arm,primecell";
7e0ce270 78 reg = <0x80154000 0x1000>;
90c40257 79 interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
d299b5a5
LJ
80
81 clocks = <&rtc_clk>;
82 clock-names = "apb_pclk";
7e0ce270
LJ
83 };
84
85 gpio0: gpio@8012e000 {
86 compatible = "stericsson,db8500-gpio",
fd9a80b2 87 "st,nomadik-gpio";
7e0ce270 88 reg = <0x8012e000 0x80>;
90c40257 89 interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
90 interrupt-controller;
91 #interrupt-cells = <2>;
61be4981 92 st,supports-sleepmode;
7e0ce270 93 gpio-controller;
c0b133bd
LJ
94 #gpio-cells = <2>;
95 gpio-bank = <0>;
9d891073
LJ
96
97 clocks = <&prcc_pclk 1 9>;
7e0ce270
LJ
98 };
99
100 gpio1: gpio@8012e080 {
101 compatible = "stericsson,db8500-gpio",
fd9a80b2 102 "st,nomadik-gpio";
7e0ce270 103 reg = <0x8012e080 0x80>;
90c40257 104 interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
105 interrupt-controller;
106 #interrupt-cells = <2>;
61be4981 107 st,supports-sleepmode;
7e0ce270 108 gpio-controller;
c0b133bd
LJ
109 #gpio-cells = <2>;
110 gpio-bank = <1>;
9d891073
LJ
111
112 clocks = <&prcc_pclk 1 9>;
7e0ce270
LJ
113 };
114
115 gpio2: gpio@8000e000 {
116 compatible = "stericsson,db8500-gpio",
fd9a80b2 117 "st,nomadik-gpio";
7e0ce270 118 reg = <0x8000e000 0x80>;
90c40257 119 interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
120 interrupt-controller;
121 #interrupt-cells = <2>;
61be4981 122 st,supports-sleepmode;
7e0ce270 123 gpio-controller;
c0b133bd
LJ
124 #gpio-cells = <2>;
125 gpio-bank = <2>;
9d891073
LJ
126
127 clocks = <&prcc_pclk 3 8>;
7e0ce270
LJ
128 };
129
130 gpio3: gpio@8000e080 {
131 compatible = "stericsson,db8500-gpio",
fd9a80b2 132 "st,nomadik-gpio";
7e0ce270 133 reg = <0x8000e080 0x80>;
90c40257 134 interrupts = <0 122 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
135 interrupt-controller;
136 #interrupt-cells = <2>;
61be4981 137 st,supports-sleepmode;
7e0ce270 138 gpio-controller;
c0b133bd
LJ
139 #gpio-cells = <2>;
140 gpio-bank = <3>;
9d891073
LJ
141
142 clocks = <&prcc_pclk 3 8>;
7e0ce270
LJ
143 };
144
145 gpio4: gpio@8000e100 {
146 compatible = "stericsson,db8500-gpio",
fd9a80b2 147 "st,nomadik-gpio";
7e0ce270 148 reg = <0x8000e100 0x80>;
90c40257 149 interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
150 interrupt-controller;
151 #interrupt-cells = <2>;
61be4981 152 st,supports-sleepmode;
7e0ce270 153 gpio-controller;
c0b133bd
LJ
154 #gpio-cells = <2>;
155 gpio-bank = <4>;
9d891073
LJ
156
157 clocks = <&prcc_pclk 3 8>;
7e0ce270
LJ
158 };
159
160 gpio5: gpio@8000e180 {
161 compatible = "stericsson,db8500-gpio",
fd9a80b2 162 "st,nomadik-gpio";
7e0ce270 163 reg = <0x8000e180 0x80>;
90c40257 164 interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
165 interrupt-controller;
166 #interrupt-cells = <2>;
61be4981 167 st,supports-sleepmode;
7e0ce270 168 gpio-controller;
c0b133bd
LJ
169 #gpio-cells = <2>;
170 gpio-bank = <5>;
9d891073
LJ
171
172 clocks = <&prcc_pclk 3 8>;
7e0ce270
LJ
173 };
174
175 gpio6: gpio@8011e000 {
176 compatible = "stericsson,db8500-gpio",
fd9a80b2 177 "st,nomadik-gpio";
7e0ce270 178 reg = <0x8011e000 0x80>;
90c40257 179 interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
180 interrupt-controller;
181 #interrupt-cells = <2>;
61be4981 182 st,supports-sleepmode;
7e0ce270 183 gpio-controller;
c0b133bd
LJ
184 #gpio-cells = <2>;
185 gpio-bank = <6>;
9d891073
LJ
186
187 clocks = <&prcc_pclk 2 1>;
7e0ce270
LJ
188 };
189
190 gpio7: gpio@8011e080 {
191 compatible = "stericsson,db8500-gpio",
fd9a80b2 192 "st,nomadik-gpio";
7e0ce270 193 reg = <0x8011e080 0x80>;
90c40257 194 interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
195 interrupt-controller;
196 #interrupt-cells = <2>;
61be4981 197 st,supports-sleepmode;
7e0ce270 198 gpio-controller;
c0b133bd
LJ
199 #gpio-cells = <2>;
200 gpio-bank = <7>;
9d891073
LJ
201
202 clocks = <&prcc_pclk 2 1>;
7e0ce270
LJ
203 };
204
205 gpio8: gpio@a03fe000 {
206 compatible = "stericsson,db8500-gpio",
fd9a80b2 207 "st,nomadik-gpio";
7e0ce270 208 reg = <0xa03fe000 0x80>;
90c40257 209 interrupts = <0 127 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
210 interrupt-controller;
211 #interrupt-cells = <2>;
61be4981 212 st,supports-sleepmode;
7e0ce270 213 gpio-controller;
c0b133bd
LJ
214 #gpio-cells = <2>;
215 gpio-bank = <8>;
9d891073
LJ
216
217 clocks = <&prcc_pclk 6 1>;
7e0ce270
LJ
218 };
219
8979cfef 220 pinctrl {
818d99a9 221 compatible = "stericsson,db8500-pinctrl";
8979cfef 222 prcm = <&prcmu>;
5910de9e
LJ
223 };
224
b32dc865 225 usb_per5@a03e0000 {
4a6cd43f 226 compatible = "stericsson,db8500-musb";
7e0ce270 227 reg = <0xa03e0000 0x10000>;
90c40257 228 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
b32dc865
LJ
229 interrupt-names = "mc";
230
231 dr_mode = "otg";
232
233 dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */
234 <&dma 38 0 0x0>, /* Logical - MemToDev */
235 <&dma 37 0 0x2>, /* Logical - DevToMem */
236 <&dma 37 0 0x0>, /* Logical - MemToDev */
237 <&dma 36 0 0x2>, /* Logical - DevToMem */
238 <&dma 36 0 0x0>, /* Logical - MemToDev */
239 <&dma 19 0 0x2>, /* Logical - DevToMem */
240 <&dma 19 0 0x0>, /* Logical - MemToDev */
241 <&dma 18 0 0x2>, /* Logical - DevToMem */
242 <&dma 18 0 0x0>, /* Logical - MemToDev */
243 <&dma 17 0 0x2>, /* Logical - DevToMem */
244 <&dma 17 0 0x0>, /* Logical - MemToDev */
245 <&dma 16 0 0x2>, /* Logical - DevToMem */
246 <&dma 16 0 0x0>, /* Logical - MemToDev */
247 <&dma 39 0 0x2>, /* Logical - DevToMem */
248 <&dma 39 0 0x0>; /* Logical - MemToDev */
249
250 dma-names = "iep_1_9", "oep_1_9",
251 "iep_2_10", "oep_2_10",
252 "iep_3_11", "oep_3_11",
253 "iep_4_12", "oep_4_12",
254 "iep_5_13", "oep_5_13",
255 "iep_6_14", "oep_6_14",
256 "iep_7_15", "oep_7_15",
257 "iep_8", "oep_8";
e47339ff
LJ
258
259 clocks = <&prcc_pclk 5 0>;
7e0ce270
LJ
260 };
261
ba074aec
LJ
262 dma: dma-controller@801C0000 {
263 compatible = "stericsson,db8500-dma40", "stericsson,dma40";
7e0ce270 264 reg = <0x801C0000 0x1000 0x40010000 0x800>;
70d39a8d 265 reg-names = "base", "lcpa";
90c40257 266 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
ba074aec
LJ
267
268 #dma-cells = <3>;
d37fcdb6 269 memcpy-channels = <56 57 58 59 60>;
e064cb24
LJ
270
271 clocks = <&prcmu_clk PRCMU_DMACLK>;
7e0ce270
LJ
272 };
273
8979cfef 274 prcmu: prcmu@80157000 {
7e0ce270 275 compatible = "stericsson,db8500-prcmu";
4d26aa30 276 reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
e73081d9 277 reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
90c40257 278 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
7e0ce270 279 #address-cells = <1>;
3de3d749 280 #size-cells = <1>;
c09090bb
LJ
281 interrupt-controller;
282 #interrupt-cells = <2>;
3de3d749
LJ
283 ranges;
284
ccf74f76 285 prcmu-timer-4@80157450 {
3de3d749
LJ
286 compatible = "stericsson,db8500-prcmu-timer-4";
287 reg = <0x80157450 0xC>;
288 };
7e0ce270 289
dc1956b5 290 thermal@801573c0 {
291 compatible = "stericsson,db8500-thermal";
292 reg = <0x801573c0 0x40>;
90c40257
LW
293 interrupts = <21 IRQ_TYPE_LEVEL_HIGH>,
294 <22 IRQ_TYPE_LEVEL_HIGH>;
dc1956b5 295 interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH";
296 status = "disabled";
1d3f99f5 297 };
dc1956b5 298
e5999f28
LJ
299 db8500-prcmu-regulators {
300 compatible = "stericsson,db8500-prcmu-regulator";
301
302 // DB8500_REGULATOR_VAPE
303 db8500_vape_reg: db8500_vape {
da26848a 304 regulator-compatible = "db8500_vape";
e5999f28
LJ
305 regulator-always-on;
306 };
307
308 // DB8500_REGULATOR_VARM
309 db8500_varm_reg: db8500_varm {
da26848a 310 regulator-compatible = "db8500_varm";
e5999f28
LJ
311 };
312
313 // DB8500_REGULATOR_VMODEM
314 db8500_vmodem_reg: db8500_vmodem {
da26848a 315 regulator-compatible = "db8500_vmodem";
e5999f28
LJ
316 };
317
318 // DB8500_REGULATOR_VPLL
319 db8500_vpll_reg: db8500_vpll {
da26848a 320 regulator-compatible = "db8500_vpll";
e5999f28
LJ
321 };
322
323 // DB8500_REGULATOR_VSMPS1
324 db8500_vsmps1_reg: db8500_vsmps1 {
da26848a 325 regulator-compatible = "db8500_vsmps1";
e5999f28
LJ
326 };
327
328 // DB8500_REGULATOR_VSMPS2
329 db8500_vsmps2_reg: db8500_vsmps2 {
da26848a 330 regulator-compatible = "db8500_vsmps2";
e5999f28
LJ
331 };
332
333 // DB8500_REGULATOR_VSMPS3
334 db8500_vsmps3_reg: db8500_vsmps3 {
da26848a 335 regulator-compatible = "db8500_vsmps3";
e5999f28
LJ
336 };
337
338 // DB8500_REGULATOR_VRF1
339 db8500_vrf1_reg: db8500_vrf1 {
da26848a 340 regulator-compatible = "db8500_vrf1";
e5999f28
LJ
341 };
342
343 // DB8500_REGULATOR_SWITCH_SVAMMDSP
344 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
da26848a 345 regulator-compatible = "db8500_sva_mmdsp";
e5999f28
LJ
346 };
347
348 // DB8500_REGULATOR_SWITCH_SVAMMDSPRET
349 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
da26848a 350 regulator-compatible = "db8500_sva_mmdsp_ret";
e5999f28
LJ
351 };
352
353 // DB8500_REGULATOR_SWITCH_SVAPIPE
354 db8500_sva_pipe_reg: db8500_sva_pipe {
da26848a 355 regulator-compatible = "db8500_sva_pipe";
e5999f28
LJ
356 };
357
358 // DB8500_REGULATOR_SWITCH_SIAMMDSP
359 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
da26848a 360 regulator-compatible = "db8500_sia_mmdsp";
e5999f28
LJ
361 };
362
363 // DB8500_REGULATOR_SWITCH_SIAMMDSPRET
364 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
e5999f28
LJ
365 };
366
367 // DB8500_REGULATOR_SWITCH_SIAPIPE
368 db8500_sia_pipe_reg: db8500_sia_pipe {
da26848a 369 regulator-compatible = "db8500_sia_pipe";
e5999f28
LJ
370 };
371
372 // DB8500_REGULATOR_SWITCH_SGA
373 db8500_sga_reg: db8500_sga {
da26848a 374 regulator-compatible = "db8500_sga";
e5999f28
LJ
375 vin-supply = <&db8500_vape_reg>;
376 };
377
378 // DB8500_REGULATOR_SWITCH_B2R2_MCDE
379 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
da26848a 380 regulator-compatible = "db8500_b2r2_mcde";
e5999f28
LJ
381 vin-supply = <&db8500_vape_reg>;
382 };
383
384 // DB8500_REGULATOR_SWITCH_ESRAM12
385 db8500_esram12_reg: db8500_esram12 {
da26848a 386 regulator-compatible = "db8500_esram12";
e5999f28
LJ
387 };
388
389 // DB8500_REGULATOR_SWITCH_ESRAM12RET
390 db8500_esram12_ret_reg: db8500_esram12_ret {
da26848a 391 regulator-compatible = "db8500_esram12_ret";
e5999f28
LJ
392 };
393
394 // DB8500_REGULATOR_SWITCH_ESRAM34
395 db8500_esram34_reg: db8500_esram34 {
da26848a 396 regulator-compatible = "db8500_esram34";
e5999f28
LJ
397 };
398
399 // DB8500_REGULATOR_SWITCH_ESRAM34RET
400 db8500_esram34_ret_reg: db8500_esram34_ret {
da26848a 401 regulator-compatible = "db8500_esram34_ret";
e5999f28
LJ
402 };
403 };
404
d52701d3 405 ab8500 {
7e0ce270 406 compatible = "stericsson,ab8500";
8d4c6d45 407 interrupt-parent = <&intc>;
90c40257 408 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
732973c8
LJ
409 interrupt-controller;
410 #interrupt-cells = <2>;
4a85c7fa 411
348f3bc6
LJ
412 ab8500_gpio: ab8500-gpio {
413 gpio-controller;
414 #gpio-cells = <2>;
415 };
416
d4b29ac1
LJ
417 ab8500-rtc {
418 compatible = "stericsson,ab8500-rtc";
90c40257
LW
419 interrupts = <17 IRQ_TYPE_LEVEL_HIGH
420 18 IRQ_TYPE_LEVEL_HIGH>;
d4b29ac1
LJ
421 interrupt-names = "60S", "ALARM";
422 };
423
4eda9129
LJ
424 ab8500-gpadc {
425 compatible = "stericsson,ab8500-gpadc";
90c40257
LW
426 interrupts = <32 IRQ_TYPE_LEVEL_HIGH
427 39 IRQ_TYPE_LEVEL_HIGH>;
4eda9129
LJ
428 interrupt-names = "HW_CONV_END", "SW_CONV_END";
429 vddadc-supply = <&ab8500_ldo_tvout_reg>;
430 };
431
e0f1abeb
R
432 ab8500_battery: ab8500_battery {
433 stericsson,battery-type = "LIPO";
434 thermistor-on-batctrl;
435 };
436
437 ab8500_fg {
438 compatible = "stericsson,ab8500-fg";
439 battery = <&ab8500_battery>;
440 };
441
bd9e8ab2
R
442 ab8500_btemp {
443 compatible = "stericsson,ab8500-btemp";
444 battery = <&ab8500_battery>;
445 };
446
4aef72db
R
447 ab8500_charger {
448 compatible = "stericsson,ab8500-charger";
449 battery = <&ab8500_battery>;
450 vddadc-supply = <&ab8500_ldo_tvout_reg>;
451 };
452
a12810ab
R
453 ab8500_chargalg {
454 compatible = "stericsson,ab8500-chargalg";
455 battery = <&ab8500_battery>;
456 };
457
e0f1abeb 458 ab8500_usb {
ee189cef 459 compatible = "stericsson,ab8500-usb";
90c40257
LW
460 interrupts = < 90 IRQ_TYPE_LEVEL_HIGH
461 96 IRQ_TYPE_LEVEL_HIGH
462 14 IRQ_TYPE_LEVEL_HIGH
463 15 IRQ_TYPE_LEVEL_HIGH
464 79 IRQ_TYPE_LEVEL_HIGH
465 74 IRQ_TYPE_LEVEL_HIGH
466 75 IRQ_TYPE_LEVEL_HIGH>;
ee189cef
LJ
467 interrupt-names = "ID_WAKEUP_R",
468 "ID_WAKEUP_F",
469 "VBUS_DET_F",
470 "VBUS_DET_R",
471 "USB_LINK_STATUS",
472 "USB_ADP_PROBE_PLUG",
473 "USB_ADP_PROBE_UNPLUG";
99b38eef 474 vddulpivio18-supply = <&ab8500_ldo_intcore_reg>;
ee189cef
LJ
475 v-ape-supply = <&db8500_vape_reg>;
476 musb_1v8-supply = <&db8500_vsmps2_reg>;
477 };
478
12cb7bd4 479 ab8500-ponkey {
74630706 480 compatible = "stericsson,ab8500-poweron-key";
90c40257
LW
481 interrupts = <6 IRQ_TYPE_LEVEL_HIGH
482 7 IRQ_TYPE_LEVEL_HIGH>;
12cb7bd4
LJ
483 interrupt-names = "ONKEY_DBF", "ONKEY_DBR";
484 };
485
401cd1b8
LJ
486 ab8500-sysctrl {
487 compatible = "stericsson,ab8500-sysctrl";
488 };
489
78451de7
LJ
490 ab8500-pwm {
491 compatible = "stericsson,ab8500-pwm";
492 };
493
215891ec
LJ
494 ab8500-debugfs {
495 compatible = "stericsson,ab8500-debug";
496 };
4a85c7fa 497
9c06af30
LJ
498 codec: ab8500-codec {
499 compatible = "stericsson,ab8500-codec";
500
f99808a6
FB
501 V-AUD-supply = <&ab8500_ldo_audio_reg>;
502 V-AMIC1-supply = <&ab8500_ldo_anamic1_reg>;
503 V-AMIC2-supply = <&ab8500_ldo_anamic2_reg>;
504 V-DMIC-supply = <&ab8500_ldo_dmic_reg>;
505
9c06af30
LJ
506 stericsson,earpeice-cmv = <950>; /* Units in mV. */
507 };
508
62ebfe6b
LJ
509 ext_regulators: ab8500-ext-regulators {
510 compatible = "stericsson,ab8500-ext-regulator";
511
512 ab8500_ext1_reg: ab8500_ext1 {
513 regulator-compatible = "ab8500_ext1";
514 regulator-min-microvolt = <1800000>;
515 regulator-max-microvolt = <1800000>;
516 regulator-boot-on;
517 regulator-always-on;
518 };
519
520 ab8500_ext2_reg: ab8500_ext2 {
521 regulator-compatible = "ab8500_ext2";
522 regulator-min-microvolt = <1360000>;
523 regulator-max-microvolt = <1360000>;
524 regulator-boot-on;
525 regulator-always-on;
526 };
527
528 ab8500_ext3_reg: ab8500_ext3 {
529 regulator-compatible = "ab8500_ext3";
530 regulator-min-microvolt = <3400000>;
531 regulator-max-microvolt = <3400000>;
532 regulator-boot-on;
533 };
534 };
535
4a85c7fa
LJ
536 ab8500-regulators {
537 compatible = "stericsson,ab8500-regulator";
75f0999a 538 vin-supply = <&ab8500_ext3_reg>;
4a85c7fa
LJ
539
540 // supplies to the display/camera
541 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
da26848a 542 regulator-compatible = "ab8500_ldo_aux1";
4a85c7fa
LJ
543 regulator-min-microvolt = <2500000>;
544 regulator-max-microvolt = <2900000>;
545 regulator-boot-on;
546 /* BUG: If turned off MMC will be affected. */
547 regulator-always-on;
548 };
549
550 // supplies to the on-board eMMC
551 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
da26848a 552 regulator-compatible = "ab8500_ldo_aux2";
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553 regulator-min-microvolt = <1100000>;
554 regulator-max-microvolt = <3300000>;
555 };
556
557 // supply for VAUX3; SDcard slots
558 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
da26848a 559 regulator-compatible = "ab8500_ldo_aux3";
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LJ
560 regulator-min-microvolt = <1100000>;
561 regulator-max-microvolt = <3300000>;
562 };
563
564 // supply for v-intcore12; VINTCORE12 LDO
99b38eef
FB
565 ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
566 regulator-compatible = "ab8500_ldo_intcore";
4a85c7fa
LJ
567 };
568
569 // supply for tvout; gpadc; TVOUT LDO
570 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
da26848a 571 regulator-compatible = "ab8500_ldo_tvout";
4a85c7fa
LJ
572 };
573
574 // supply for ab8500-usb; USB LDO
575 ab8500_ldo_usb_reg: ab8500_ldo_usb {
da26848a 576 regulator-compatible = "ab8500_ldo_usb";
4a85c7fa
LJ
577 };
578
579 // supply for ab8500-vaudio; VAUDIO LDO
580 ab8500_ldo_audio_reg: ab8500_ldo_audio {
da26848a 581 regulator-compatible = "ab8500_ldo_audio";
4a85c7fa
LJ
582 };
583
4aa44874 584 // supply for v-anamic1 VAMIC1 LDO
4a85c7fa 585 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
da26848a 586 regulator-compatible = "ab8500_ldo_anamic1";
4a85c7fa
LJ
587 };
588
589 // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1
5510ed9f
FB
590 ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
591 regulator-compatible = "ab8500_ldo_anamic2";
4a85c7fa
LJ
592 };
593
594 // supply for v-dmic; VDMIC LDO
595 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
da26848a 596 regulator-compatible = "ab8500_ldo_dmic";
4a85c7fa
LJ
597 };
598
599 // supply for U8500 CSI/DSI; VANA LDO
600 ab8500_ldo_ana_reg: ab8500_ldo_ana {
da26848a 601 regulator-compatible = "ab8500_ldo_ana";
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LJ
602 };
603 };
7e0ce270
LJ
604 };
605 };
606
607 i2c@80004000 {
d524fa7f 608 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
7e0ce270 609 reg = <0x80004000 0x1000>;
90c40257 610 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
35b33d23 611
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612 #address-cells = <1>;
613 #size-cells = <0>;
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LJ
614 v-i2c-supply = <&db8500_vape_reg>;
615
616 clock-frequency = <400000>;
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617 clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>;
618 clock-names = "i2cclk", "apb_pclk";
7e0ce270
LJ
619 };
620
621 i2c@80122000 {
d524fa7f 622 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
7e0ce270 623 reg = <0x80122000 0x1000>;
90c40257 624 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
35b33d23 625
7e0ce270
LJ
626 #address-cells = <1>;
627 #size-cells = <0>;
d524fa7f
LJ
628 v-i2c-supply = <&db8500_vape_reg>;
629
630 clock-frequency = <400000>;
afd653e9
LJ
631
632 clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>;
633 clock-names = "i2cclk", "apb_pclk";
7e0ce270
LJ
634 };
635
636 i2c@80128000 {
d524fa7f 637 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
7e0ce270 638 reg = <0x80128000 0x1000>;
90c40257 639 interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
35b33d23 640
7e0ce270
LJ
641 #address-cells = <1>;
642 #size-cells = <0>;
d524fa7f
LJ
643 v-i2c-supply = <&db8500_vape_reg>;
644
645 clock-frequency = <400000>;
afd653e9
LJ
646
647 clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>;
648 clock-names = "i2cclk", "apb_pclk";
7e0ce270
LJ
649 };
650
651 i2c@80110000 {
d524fa7f 652 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
7e0ce270 653 reg = <0x80110000 0x1000>;
90c40257 654 interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>;
35b33d23 655
7e0ce270
LJ
656 #address-cells = <1>;
657 #size-cells = <0>;
d524fa7f
LJ
658 v-i2c-supply = <&db8500_vape_reg>;
659
660 clock-frequency = <400000>;
afd653e9
LJ
661
662 clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>;
663 clock-names = "i2cclk", "apb_pclk";
7e0ce270
LJ
664 };
665
666 i2c@8012a000 {
d524fa7f 667 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
7e0ce270 668 reg = <0x8012a000 0x1000>;
90c40257 669 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
35b33d23 670
7e0ce270
LJ
671 #address-cells = <1>;
672 #size-cells = <0>;
d524fa7f
LJ
673 v-i2c-supply = <&db8500_vape_reg>;
674
675 clock-frequency = <400000>;
afd653e9
LJ
676
677 clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 9>;
678 clock-names = "i2cclk", "apb_pclk";
7e0ce270
LJ
679 };
680
681 ssp@80002000 {
682 compatible = "arm,pl022", "arm,primecell";
c164fa62 683 reg = <0x80002000 0x1000>;
90c40257 684 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
7e0ce270
LJ
685 #address-cells = <1>;
686 #size-cells = <0>;
687 status = "disabled";
7e0ce270
LJ
688 };
689
690 uart@80120000 {
691 compatible = "arm,pl011", "arm,primecell";
692 reg = <0x80120000 0x1000>;
90c40257 693 interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
fbff01cc
LJ
694
695 dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
696 <&dma 13 0 0x0>; /* Logical - MemToDev */
697 dma-names = "rx", "tx";
698
5a323fb4
LJ
699 clocks = <&prcc_kclk 1 0>, <&prcc_pclk 1 0>;
700 clock-names = "uart", "apb_pclk";
701
7e0ce270
LJ
702 status = "disabled";
703 };
fbff01cc 704
7e0ce270
LJ
705 uart@80121000 {
706 compatible = "arm,pl011", "arm,primecell";
707 reg = <0x80121000 0x1000>;
90c40257 708 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
fbff01cc
LJ
709
710 dmas = <&dma 12 0 0x2>, /* Logical - DevToMem */
711 <&dma 12 0 0x0>; /* Logical - MemToDev */
712 dma-names = "rx", "tx";
713
5a323fb4
LJ
714 clocks = <&prcc_kclk 1 1>, <&prcc_pclk 1 1>;
715 clock-names = "uart", "apb_pclk";
716
7e0ce270
LJ
717 status = "disabled";
718 };
fbff01cc 719
7e0ce270
LJ
720 uart@80007000 {
721 compatible = "arm,pl011", "arm,primecell";
722 reg = <0x80007000 0x1000>;
90c40257 723 interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
fbff01cc
LJ
724
725 dmas = <&dma 11 0 0x2>, /* Logical - DevToMem */
726 <&dma 11 0 0x0>; /* Logical - MemToDev */
727 dma-names = "rx", "tx";
728
5a323fb4
LJ
729 clocks = <&prcc_kclk 3 6>, <&prcc_pclk 3 6>;
730 clock-names = "uart", "apb_pclk";
731
7e0ce270
LJ
732 status = "disabled";
733 };
734
81bf8c2e 735 sdi0_per1@80126000 {
7e0ce270
LJ
736 compatible = "arm,pl18x", "arm,primecell";
737 reg = <0x80126000 0x1000>;
90c40257 738 interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>;
498315b9
LJ
739
740 dmas = <&dma 29 0 0x2>, /* Logical - DevToMem */
741 <&dma 29 0 0x0>; /* Logical - MemToDev */
742 dma-names = "rx", "tx";
743
604be898
LJ
744 clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>;
745 clock-names = "sdi", "apb_pclk";
746
7e0ce270
LJ
747 status = "disabled";
748 };
76ff4e43 749
81bf8c2e 750 sdi1_per2@80118000 {
7e0ce270
LJ
751 compatible = "arm,pl18x", "arm,primecell";
752 reg = <0x80118000 0x1000>;
90c40257 753 interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
498315b9
LJ
754
755 dmas = <&dma 32 0 0x2>, /* Logical - DevToMem */
756 <&dma 32 0 0x0>; /* Logical - MemToDev */
757 dma-names = "rx", "tx";
758
604be898
LJ
759 clocks = <&prcc_kclk 2 4>, <&prcc_pclk 2 6>;
760 clock-names = "sdi", "apb_pclk";
761
7e0ce270
LJ
762 status = "disabled";
763 };
76ff4e43 764
81bf8c2e 765 sdi2_per3@80005000 {
7e0ce270
LJ
766 compatible = "arm,pl18x", "arm,primecell";
767 reg = <0x80005000 0x1000>;
90c40257 768 interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
498315b9
LJ
769
770 dmas = <&dma 28 0 0x2>, /* Logical - DevToMem */
771 <&dma 28 0 0x0>; /* Logical - MemToDev */
772 dma-names = "rx", "tx";
773
604be898
LJ
774 clocks = <&prcc_kclk 3 4>, <&prcc_pclk 3 4>;
775 clock-names = "sdi", "apb_pclk";
776
7e0ce270
LJ
777 status = "disabled";
778 };
76ff4e43 779
81bf8c2e 780 sdi3_per2@80119000 {
7e0ce270
LJ
781 compatible = "arm,pl18x", "arm,primecell";
782 reg = <0x80119000 0x1000>;
90c40257 783 interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
604be898
LJ
784
785 clocks = <&prcc_kclk 2 5>, <&prcc_pclk 2 7>;
786 clock-names = "sdi", "apb_pclk";
787
7e0ce270
LJ
788 status = "disabled";
789 };
76ff4e43 790
81bf8c2e 791 sdi4_per2@80114000 {
7e0ce270
LJ
792 compatible = "arm,pl18x", "arm,primecell";
793 reg = <0x80114000 0x1000>;
90c40257 794 interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
498315b9
LJ
795
796 dmas = <&dma 42 0 0x2>, /* Logical - DevToMem */
797 <&dma 42 0 0x0>; /* Logical - MemToDev */
798 dma-names = "rx", "tx";
799
604be898
LJ
800 clocks = <&prcc_kclk 2 2>, <&prcc_pclk 2 4>;
801 clock-names = "sdi", "apb_pclk";
802
7e0ce270
LJ
803 status = "disabled";
804 };
76ff4e43 805
81bf8c2e 806 sdi5_per3@80008000 {
7e0ce270 807 compatible = "arm,pl18x", "arm,primecell";
76ff4e43 808 reg = <0x80008000 0x1000>;
90c40257 809 interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
604be898
LJ
810
811 clocks = <&prcc_kclk 3 7>, <&prcc_pclk 3 7>;
812 clock-names = "sdi", "apb_pclk";
813
7e0ce270
LJ
814 status = "disabled";
815 };
bf76e062 816
fe164529
LJ
817 msp0: msp@80123000 {
818 compatible = "stericsson,ux500-msp-i2s";
819 reg = <0x80123000 0x1000>;
90c40257 820 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
fe164529 821 v-ape-supply = <&db8500_vape_reg>;
133e6027
LJ
822
823 clocks = <&prcc_kclk 1 3>, <&prcc_pclk 1 3>;
824 clock-names = "msp", "apb_pclk";
825
fe164529
LJ
826 status = "disabled";
827 };
828
829 msp1: msp@80124000 {
830 compatible = "stericsson,ux500-msp-i2s";
831 reg = <0x80124000 0x1000>;
90c40257 832 interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
fe164529 833 v-ape-supply = <&db8500_vape_reg>;
133e6027
LJ
834
835 clocks = <&prcc_kclk 1 4>, <&prcc_pclk 1 4>;
836 clock-names = "msp", "apb_pclk";
837
fe164529
LJ
838 status = "disabled";
839 };
840
841 // HDMI sound
842 msp2: msp@80117000 {
843 compatible = "stericsson,ux500-msp-i2s";
844 reg = <0x80117000 0x1000>;
90c40257 845 interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
fe164529 846 v-ape-supply = <&db8500_vape_reg>;
133e6027
LJ
847
848 clocks = <&prcc_kclk 2 3>, <&prcc_pclk 2 5>;
849 clock-names = "msp", "apb_pclk";
850
fe164529
LJ
851 status = "disabled";
852 };
853
854 msp3: msp@80125000 {
855 compatible = "stericsson,ux500-msp-i2s";
856 reg = <0x80125000 0x1000>;
90c40257 857 interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
fe164529 858 v-ape-supply = <&db8500_vape_reg>;
133e6027
LJ
859
860 clocks = <&prcc_kclk 1 10>, <&prcc_pclk 1 11>;
861 clock-names = "msp", "apb_pclk";
862
fe164529
LJ
863 status = "disabled";
864 };
865
bf76e062
LJ
866 external-bus@50000000 {
867 compatible = "simple-bus";
868 reg = <0x50000000 0x4000000>;
869 #address-cells = <1>;
870 #size-cells = <1>;
871 ranges = <0 0x50000000 0x4000000>;
872 status = "disabled";
873 };
dc1956b5 874
875 cpufreq-cooling {
876 compatible = "stericsson,db8500-cpufreq-cooling";
877 status = "disabled";
878 };
879
0563f638
LJ
880 vmmci: regulator-gpio {
881 compatible = "regulator-gpio";
882
883 regulator-min-microvolt = <1800000>;
4f902b42 884 regulator-max-microvolt = <2900000>;
0563f638
LJ
885 regulator-name = "mmci-reg";
886 regulator-type = "voltage";
887
874c9202 888 startup-delay-us = <100>;
e7bda303
LJ
889 enable-active-high;
890
0563f638
LJ
891 states = <1800000 0x1
892 2900000 0x0>;
c94a4ab7
LJ
893
894 status = "disabled";
0563f638 895 };
fe2e9f92
LJ
896
897 cryp@a03cb000 {
898 compatible = "stericsson,ux500-cryp";
899 reg = <0xa03cb000 0x1000>;
90c40257 900 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
fe2e9f92
LJ
901
902 v-ape-supply = <&db8500_vape_reg>;
fe2e9f92 903 };
61122cf2
LJ
904
905 hash@a03c2000 {
906 compatible = "stericsson,ux500-hash";
907 reg = <0xa03c2000 0x1000>;
908
909 v-ape-supply = <&db8500_vape_reg>;
61122cf2 910 };
5d0769f0
AB
911 };
912};