projects / mirror_ubuntu-jammy-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 5d0769f0 AB |
1 | /* |
| 2 | * Copyright 2012 Linaro Ltd | |
| 3 | * | |
| 4 | * The code contained herein is licensed under the GNU General Public | |
| 5 | * License. You may obtain a copy of the GNU General Public License | |
| 6 | * Version 2 or later at the following locations: | |
| 7 | * | |
| 8 | * http://www.opensource.org/licenses/gpl-license.html | |
| 9 | * http://www.gnu.org/copyleft/gpl.html | |
| 10 | */ | |
| 11 | ||
| 90c40257 | 12 | #include <dt-bindings/interrupt-controller/irq.h> |
| 841cd0c0 | 13 | #include <dt-bindings/mfd/dbx500-prcmu.h> |
| 807e8838 | 14 | #include "skeleton.dtsi" |
| 5d0769f0 AB |
15 | |
| 16 | / { | |
| b1ba1439 | 17 | soc { |
| 5d0769f0 AB |
18 | #address-cells = <1>; |
| 19 | #size-cells = <1>; | |
| 7e0ce270 | 20 | compatible = "stericsson,db8500"; |
| dab6487e | 21 | interrupt-parent = <&intc>; |
| 5d0769f0 | 22 | ranges; |
| 7e0ce270 | 23 | |
| dab6487e LJ |
24 | intc: interrupt-controller@a0411000 { |
| 25 | compatible = "arm,cortex-a9-gic"; | |
| 26 | #interrupt-cells = <3>; | |
| 27 | #address-cells = <1>; | |
| 28 | interrupt-controller; | |
| dab6487e LJ |
29 | reg = <0xa0411000 0x1000>, |
| 30 | <0xa0410100 0x100>; | |
| 31 | }; | |
| 32 | ||
| f1949ea0 LJ |
33 | L2: l2-cache { |
| 34 | compatible = "arm,pl310-cache"; | |
| 35 | reg = <0xa0412000 0x1000>; | |
| 90c40257 | 36 | interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>; |
| f1949ea0 LJ |
37 | cache-unified; |
| 38 | cache-level = <2>; | |
| 39 | }; | |
| 40 | ||
| 7e0ce270 LJ |
41 | pmu { |
| 42 | compatible = "arm,cortex-a9-pmu"; | |
| 90c40257 | 43 | interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>; |
| 7e0ce270 LJ |
44 | }; |
| 45 | ||
| 841cd0c0 LJ |
46 | clocks { |
| 47 | compatible = "stericsson,u8500-clks"; | |
| 48 | ||
| 49 | prcmu_clk: prcmu-clock { | |
| 50 | #clock-cells = <1>; | |
| 51 | }; | |
| fcbe5e90 LJ |
52 | |
| 53 | prcc_pclk: prcc-periph-clock { | |
| 54 | #clock-cells = <2>; | |
| 55 | }; | |
| 2588fea6 LJ |
56 | |
| 57 | prcc_kclk: prcc-kernel-clock { | |
| 58 | #clock-cells = <2>; | |
| 59 | }; | |
| 589d9839 LJ |
60 | |
| 61 | rtc_clk: rtc32k-clock { | |
| 62 | #clock-cells = <0>; | |
| 63 | }; | |
| 841cd0c0 LJ |
64 | }; |
| 65 | ||
| 71de5c46 LJ |
66 | timer@a0410600 { |
| 67 | compatible = "arm,cortex-a9-twd-timer"; | |
| 68 | reg = <0xa0410600 0x20>; | |
| 90c40257 | 69 | interrupts = <1 13 0x304>; /* IRQ level high per-CPU */ |
| 71de5c46 LJ |
70 | }; |
| 71 | ||
| 7e0ce270 | 72 | rtc@80154000 { |
| ddb3b99c | 73 | compatible = "arm,rtc-pl031", "arm,primecell"; |
| 7e0ce270 | 74 | reg = <0x80154000 0x1000>; |
| 90c40257 | 75 | interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>; |
| 7e0ce270 LJ |
76 | }; |
| 77 | ||
| 78 | gpio0: gpio@8012e000 { | |
| 79 | compatible = "stericsson,db8500-gpio", | |
| fd9a80b2 | 80 | "st,nomadik-gpio"; |
| 7e0ce270 | 81 | reg = <0x8012e000 0x80>; |
| 90c40257 | 82 | interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>; |
| 93b5698a LJ |
83 | interrupt-controller; |
| 84 | #interrupt-cells = <2>; | |
| 61be4981 | 85 | st,supports-sleepmode; |
| 7e0ce270 | 86 | gpio-controller; |
| c0b133bd LJ |
87 | #gpio-cells = <2>; |
| 88 | gpio-bank = <0>; | |
| 9d891073 LJ |
89 | |
| 90 | clocks = <&prcc_pclk 1 9>; | |
| 7e0ce270 LJ |
91 | }; |
| 92 | ||
| 93 | gpio1: gpio@8012e080 { | |
| 94 | compatible = "stericsson,db8500-gpio", | |
| fd9a80b2 | 95 | "st,nomadik-gpio"; |
| 7e0ce270 | 96 | reg = <0x8012e080 0x80>; |
| 90c40257 | 97 | interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>; |
| 93b5698a LJ |
98 | interrupt-controller; |
| 99 | #interrupt-cells = <2>; | |
| 61be4981 | 100 | st,supports-sleepmode; |
| 7e0ce270 | 101 | gpio-controller; |
| c0b133bd LJ |
102 | #gpio-cells = <2>; |
| 103 | gpio-bank = <1>; | |
| 9d891073 LJ |
104 | |
| 105 | clocks = <&prcc_pclk 1 9>; | |
| 7e0ce270 LJ |
106 | }; |
| 107 | ||
| 108 | gpio2: gpio@8000e000 { | |
| 109 | compatible = "stericsson,db8500-gpio", | |
| fd9a80b2 | 110 | "st,nomadik-gpio"; |
| 7e0ce270 | 111 | reg = <0x8000e000 0x80>; |
| 90c40257 | 112 | interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH>; |
| 93b5698a LJ |
113 | interrupt-controller; |
| 114 | #interrupt-cells = <2>; | |
| 61be4981 | 115 | st,supports-sleepmode; |
| 7e0ce270 | 116 | gpio-controller; |
| c0b133bd LJ |
117 | #gpio-cells = <2>; |
| 118 | gpio-bank = <2>; | |
| 9d891073 LJ |
119 | |
| 120 | clocks = <&prcc_pclk 3 8>; | |
| 7e0ce270 LJ |
121 | }; |
| 122 | ||
| 123 | gpio3: gpio@8000e080 { | |
| 124 | compatible = "stericsson,db8500-gpio", | |
| fd9a80b2 | 125 | "st,nomadik-gpio"; |
| 7e0ce270 | 126 | reg = <0x8000e080 0x80>; |
| 90c40257 | 127 | interrupts = <0 122 IRQ_TYPE_LEVEL_HIGH>; |
| 93b5698a LJ |
128 | interrupt-controller; |
| 129 | #interrupt-cells = <2>; | |
| 61be4981 | 130 | st,supports-sleepmode; |
| 7e0ce270 | 131 | gpio-controller; |
| c0b133bd LJ |
132 | #gpio-cells = <2>; |
| 133 | gpio-bank = <3>; | |
| 9d891073 LJ |
134 | |
| 135 | clocks = <&prcc_pclk 3 8>; | |
| 7e0ce270 LJ |
136 | }; |
| 137 | ||
| 138 | gpio4: gpio@8000e100 { | |
| 139 | compatible = "stericsson,db8500-gpio", | |
| fd9a80b2 | 140 | "st,nomadik-gpio"; |
| 7e0ce270 | 141 | reg = <0x8000e100 0x80>; |
| 90c40257 | 142 | interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>; |
| 93b5698a LJ |
143 | interrupt-controller; |
| 144 | #interrupt-cells = <2>; | |
| 61be4981 | 145 | st,supports-sleepmode; |
| 7e0ce270 | 146 | gpio-controller; |
| c0b133bd LJ |
147 | #gpio-cells = <2>; |
| 148 | gpio-bank = <4>; | |
| 9d891073 LJ |
149 | |
| 150 | clocks = <&prcc_pclk 3 8>; | |
| 7e0ce270 LJ |
151 | }; |
| 152 | ||
| 153 | gpio5: gpio@8000e180 { | |
| 154 | compatible = "stericsson,db8500-gpio", | |
| fd9a80b2 | 155 | "st,nomadik-gpio"; |
| 7e0ce270 | 156 | reg = <0x8000e180 0x80>; |
| 90c40257 | 157 | interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>; |
| 93b5698a LJ |
158 | interrupt-controller; |
| 159 | #interrupt-cells = <2>; | |
| 61be4981 | 160 | st,supports-sleepmode; |
| 7e0ce270 | 161 | gpio-controller; |
| c0b133bd LJ |
162 | #gpio-cells = <2>; |
| 163 | gpio-bank = <5>; | |
| 9d891073 LJ |
164 | |
| 165 | clocks = <&prcc_pclk 3 8>; | |
| 7e0ce270 LJ |
166 | }; |
| 167 | ||
| 168 | gpio6: gpio@8011e000 { | |
| 169 | compatible = "stericsson,db8500-gpio", | |
| fd9a80b2 | 170 | "st,nomadik-gpio"; |
| 7e0ce270 | 171 | reg = <0x8011e000 0x80>; |
| 90c40257 | 172 | interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>; |
| 93b5698a LJ |
173 | interrupt-controller; |
| 174 | #interrupt-cells = <2>; | |
| 61be4981 | 175 | st,supports-sleepmode; |
| 7e0ce270 | 176 | gpio-controller; |
| c0b133bd LJ |
177 | #gpio-cells = <2>; |
| 178 | gpio-bank = <6>; | |
| 9d891073 LJ |
179 | |
| 180 | clocks = <&prcc_pclk 2 1>; | |
| 7e0ce270 LJ |
181 | }; |
| 182 | ||
| 183 | gpio7: gpio@8011e080 { | |
| 184 | compatible = "stericsson,db8500-gpio", | |
| fd9a80b2 | 185 | "st,nomadik-gpio"; |
| 7e0ce270 | 186 | reg = <0x8011e080 0x80>; |
| 90c40257 | 187 | interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; |
| 93b5698a LJ |
188 | interrupt-controller; |
| 189 | #interrupt-cells = <2>; | |
| 61be4981 | 190 | st,supports-sleepmode; |
| 7e0ce270 | 191 | gpio-controller; |
| c0b133bd LJ |
192 | #gpio-cells = <2>; |
| 193 | gpio-bank = <7>; | |
| 9d891073 LJ |
194 | |
| 195 | clocks = <&prcc_pclk 2 1>; | |
| 7e0ce270 LJ |
196 | }; |
| 197 | ||
| 198 | gpio8: gpio@a03fe000 { | |
| 199 | compatible = "stericsson,db8500-gpio", | |
| fd9a80b2 | 200 | "st,nomadik-gpio"; |
| 7e0ce270 | 201 | reg = <0xa03fe000 0x80>; |
| 90c40257 | 202 | interrupts = <0 127 IRQ_TYPE_LEVEL_HIGH>; |
| 93b5698a LJ |
203 | interrupt-controller; |
| 204 | #interrupt-cells = <2>; | |
| 61be4981 | 205 | st,supports-sleepmode; |
| 7e0ce270 | 206 | gpio-controller; |
| c0b133bd LJ |
207 | #gpio-cells = <2>; |
| 208 | gpio-bank = <8>; | |
| 9d891073 LJ |
209 | |
| 210 | clocks = <&prcc_pclk 6 1>; | |
| 7e0ce270 LJ |
211 | }; |
| 212 | ||
| 8979cfef | 213 | pinctrl { |
| 818d99a9 | 214 | compatible = "stericsson,db8500-pinctrl"; |
| 8979cfef | 215 | prcm = <&prcmu>; |
| 5910de9e LJ |
216 | }; |
| 217 | ||
| b32dc865 | 218 | usb_per5@a03e0000 { |
| 4a6cd43f | 219 | compatible = "stericsson,db8500-musb"; |
| 7e0ce270 | 220 | reg = <0xa03e0000 0x10000>; |
| 90c40257 | 221 | interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; |
| b32dc865 LJ |
222 | interrupt-names = "mc"; |
| 223 | ||
| 224 | dr_mode = "otg"; | |
| 225 | ||
| 226 | dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */ | |
| 227 | <&dma 38 0 0x0>, /* Logical - MemToDev */ | |
| 228 | <&dma 37 0 0x2>, /* Logical - DevToMem */ | |
| 229 | <&dma 37 0 0x0>, /* Logical - MemToDev */ | |
| 230 | <&dma 36 0 0x2>, /* Logical - DevToMem */ | |
| 231 | <&dma 36 0 0x0>, /* Logical - MemToDev */ | |
| 232 | <&dma 19 0 0x2>, /* Logical - DevToMem */ | |
| 233 | <&dma 19 0 0x0>, /* Logical - MemToDev */ | |
| 234 | <&dma 18 0 0x2>, /* Logical - DevToMem */ | |
| 235 | <&dma 18 0 0x0>, /* Logical - MemToDev */ | |
| 236 | <&dma 17 0 0x2>, /* Logical - DevToMem */ | |
| 237 | <&dma 17 0 0x0>, /* Logical - MemToDev */ | |
| 238 | <&dma 16 0 0x2>, /* Logical - DevToMem */ | |
| 239 | <&dma 16 0 0x0>, /* Logical - MemToDev */ | |
| 240 | <&dma 39 0 0x2>, /* Logical - DevToMem */ | |
| 241 | <&dma 39 0 0x0>; /* Logical - MemToDev */ | |
| 242 | ||
| 243 | dma-names = "iep_1_9", "oep_1_9", | |
| 244 | "iep_2_10", "oep_2_10", | |
| 245 | "iep_3_11", "oep_3_11", | |
| 246 | "iep_4_12", "oep_4_12", | |
| 247 | "iep_5_13", "oep_5_13", | |
| 248 | "iep_6_14", "oep_6_14", | |
| 249 | "iep_7_15", "oep_7_15", | |
| 250 | "iep_8", "oep_8"; | |
| e47339ff LJ |
251 | |
| 252 | clocks = <&prcc_pclk 5 0>; | |
| 7e0ce270 LJ |
253 | }; |
| 254 | ||
| ba074aec LJ |
255 | dma: dma-controller@801C0000 { |
| 256 | compatible = "stericsson,db8500-dma40", "stericsson,dma40"; | |
| 7e0ce270 | 257 | reg = <0x801C0000 0x1000 0x40010000 0x800>; |
| 70d39a8d | 258 | reg-names = "base", "lcpa"; |
| 90c40257 | 259 | interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; |
| ba074aec LJ |
260 | |
| 261 | #dma-cells = <3>; | |
| d37fcdb6 | 262 | memcpy-channels = <56 57 58 59 60>; |
| e064cb24 LJ |
263 | |
| 264 | clocks = <&prcmu_clk PRCMU_DMACLK>; | |
| 7e0ce270 LJ |
265 | }; |
| 266 | ||
| 8979cfef | 267 | prcmu: prcmu@80157000 { |
| 7e0ce270 | 268 | compatible = "stericsson,db8500-prcmu"; |
| 4d26aa30 | 269 | reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>; |
| e73081d9 | 270 | reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm"; |
| 90c40257 | 271 | interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; |
| 7e0ce270 | 272 | #address-cells = <1>; |
| 3de3d749 | 273 | #size-cells = <1>; |
| c09090bb LJ |
274 | interrupt-controller; |
| 275 | #interrupt-cells = <2>; | |
| 3de3d749 LJ |
276 | ranges; |
| 277 | ||
| ccf74f76 | 278 | prcmu-timer-4@80157450 { |
| 3de3d749 LJ |
279 | compatible = "stericsson,db8500-prcmu-timer-4"; |
| 280 | reg = <0x80157450 0xC>; | |
| 281 | }; | |
| 7e0ce270 | 282 | |
| dc1956b5 | 283 | thermal@801573c0 { |
| 284 | compatible = "stericsson,db8500-thermal"; | |
| 285 | reg = <0x801573c0 0x40>; | |
| 90c40257 LW |
286 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH>, |
| 287 | <22 IRQ_TYPE_LEVEL_HIGH>; | |
| dc1956b5 | 288 | interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH"; |
| 289 | status = "disabled"; | |
| 1d3f99f5 | 290 | }; |
| dc1956b5 | 291 | |
| e5999f28 LJ |
292 | db8500-prcmu-regulators { |
| 293 | compatible = "stericsson,db8500-prcmu-regulator"; | |
| 294 | ||
| 295 | // DB8500_REGULATOR_VAPE | |
| 296 | db8500_vape_reg: db8500_vape { | |
| da26848a | 297 | regulator-compatible = "db8500_vape"; |
| e5999f28 LJ |
298 | regulator-always-on; |
| 299 | }; | |
| 300 | ||
| 301 | // DB8500_REGULATOR_VARM | |
| 302 | db8500_varm_reg: db8500_varm { | |
| da26848a | 303 | regulator-compatible = "db8500_varm"; |
| e5999f28 LJ |
304 | }; |
| 305 | ||
| 306 | // DB8500_REGULATOR_VMODEM | |
| 307 | db8500_vmodem_reg: db8500_vmodem { | |
| da26848a | 308 | regulator-compatible = "db8500_vmodem"; |
| e5999f28 LJ |
309 | }; |
| 310 | ||
| 311 | // DB8500_REGULATOR_VPLL | |
| 312 | db8500_vpll_reg: db8500_vpll { | |
| da26848a | 313 | regulator-compatible = "db8500_vpll"; |
| e5999f28 LJ |
314 | }; |
| 315 | ||
| 316 | // DB8500_REGULATOR_VSMPS1 | |
| 317 | db8500_vsmps1_reg: db8500_vsmps1 { | |
| da26848a | 318 | regulator-compatible = "db8500_vsmps1"; |
| e5999f28 LJ |
319 | }; |
| 320 | ||
| 321 | // DB8500_REGULATOR_VSMPS2 | |
| 322 | db8500_vsmps2_reg: db8500_vsmps2 { | |
| da26848a | 323 | regulator-compatible = "db8500_vsmps2"; |
| e5999f28 LJ |
324 | }; |
| 325 | ||
| 326 | // DB8500_REGULATOR_VSMPS3 | |
| 327 | db8500_vsmps3_reg: db8500_vsmps3 { | |
| da26848a | 328 | regulator-compatible = "db8500_vsmps3"; |
| e5999f28 LJ |
329 | }; |
| 330 | ||
| 331 | // DB8500_REGULATOR_VRF1 | |
| 332 | db8500_vrf1_reg: db8500_vrf1 { | |
| da26848a | 333 | regulator-compatible = "db8500_vrf1"; |
| e5999f28 LJ |
334 | }; |
| 335 | ||
| 336 | // DB8500_REGULATOR_SWITCH_SVAMMDSP | |
| 337 | db8500_sva_mmdsp_reg: db8500_sva_mmdsp { | |
| da26848a | 338 | regulator-compatible = "db8500_sva_mmdsp"; |
| e5999f28 LJ |
339 | }; |
| 340 | ||
| 341 | // DB8500_REGULATOR_SWITCH_SVAMMDSPRET | |
| 342 | db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { | |
| da26848a | 343 | regulator-compatible = "db8500_sva_mmdsp_ret"; |
| e5999f28 LJ |
344 | }; |
| 345 | ||
| 346 | // DB8500_REGULATOR_SWITCH_SVAPIPE | |
| 347 | db8500_sva_pipe_reg: db8500_sva_pipe { | |
| da26848a | 348 | regulator-compatible = "db8500_sva_pipe"; |
| e5999f28 LJ |
349 | }; |
| 350 | ||
| 351 | // DB8500_REGULATOR_SWITCH_SIAMMDSP | |
| 352 | db8500_sia_mmdsp_reg: db8500_sia_mmdsp { | |
| da26848a | 353 | regulator-compatible = "db8500_sia_mmdsp"; |
| e5999f28 LJ |
354 | }; |
| 355 | ||
| 356 | // DB8500_REGULATOR_SWITCH_SIAMMDSPRET | |
| 357 | db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { | |
| e5999f28 LJ |
358 | }; |
| 359 | ||
| 360 | // DB8500_REGULATOR_SWITCH_SIAPIPE | |
| 361 | db8500_sia_pipe_reg: db8500_sia_pipe { | |
| da26848a | 362 | regulator-compatible = "db8500_sia_pipe"; |
| e5999f28 LJ |
363 | }; |
| 364 | ||
| 365 | // DB8500_REGULATOR_SWITCH_SGA | |
| 366 | db8500_sga_reg: db8500_sga { | |
| da26848a | 367 | regulator-compatible = "db8500_sga"; |
| e5999f28 LJ |
368 | vin-supply = <&db8500_vape_reg>; |
| 369 | }; | |
| 370 | ||
| 371 | // DB8500_REGULATOR_SWITCH_B2R2_MCDE | |
| 372 | db8500_b2r2_mcde_reg: db8500_b2r2_mcde { | |
| da26848a | 373 | regulator-compatible = "db8500_b2r2_mcde"; |
| e5999f28 LJ |
374 | vin-supply = <&db8500_vape_reg>; |
| 375 | }; | |
| 376 | ||
| 377 | // DB8500_REGULATOR_SWITCH_ESRAM12 | |
| 378 | db8500_esram12_reg: db8500_esram12 { | |
| da26848a | 379 | regulator-compatible = "db8500_esram12"; |
| e5999f28 LJ |
380 | }; |
| 381 | ||
| 382 | // DB8500_REGULATOR_SWITCH_ESRAM12RET | |
| 383 | db8500_esram12_ret_reg: db8500_esram12_ret { | |
| da26848a | 384 | regulator-compatible = "db8500_esram12_ret"; |
| e5999f28 LJ |
385 | }; |
| 386 | ||
| 387 | // DB8500_REGULATOR_SWITCH_ESRAM34 | |
| 388 | db8500_esram34_reg: db8500_esram34 { | |
| da26848a | 389 | regulator-compatible = "db8500_esram34"; |
| e5999f28 LJ |
390 | }; |
| 391 | ||
| 392 | // DB8500_REGULATOR_SWITCH_ESRAM34RET | |
| 393 | db8500_esram34_ret_reg: db8500_esram34_ret { | |
| da26848a | 394 | regulator-compatible = "db8500_esram34_ret"; |
| e5999f28 LJ |
395 | }; |
| 396 | }; | |
| 397 | ||
| d52701d3 | 398 | ab8500 { |
| 7e0ce270 | 399 | compatible = "stericsson,ab8500"; |
| 8d4c6d45 | 400 | interrupt-parent = <&intc>; |
| 90c40257 | 401 | interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>; |
| 732973c8 LJ |
402 | interrupt-controller; |
| 403 | #interrupt-cells = <2>; | |
| 4a85c7fa | 404 | |
| 348f3bc6 LJ |
405 | ab8500_gpio: ab8500-gpio { |
| 406 | gpio-controller; | |
| 407 | #gpio-cells = <2>; | |
| 408 | }; | |
| 409 | ||
| d4b29ac1 LJ |
410 | ab8500-rtc { |
| 411 | compatible = "stericsson,ab8500-rtc"; | |
| 90c40257 LW |
412 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH |
| 413 | 18 IRQ_TYPE_LEVEL_HIGH>; | |
| d4b29ac1 LJ |
414 | interrupt-names = "60S", "ALARM"; |
| 415 | }; | |
| 416 | ||
| 4eda9129 LJ |
417 | ab8500-gpadc { |
| 418 | compatible = "stericsson,ab8500-gpadc"; | |
| 90c40257 LW |
419 | interrupts = <32 IRQ_TYPE_LEVEL_HIGH |
| 420 | 39 IRQ_TYPE_LEVEL_HIGH>; | |
| 4eda9129 LJ |
421 | interrupt-names = "HW_CONV_END", "SW_CONV_END"; |
| 422 | vddadc-supply = <&ab8500_ldo_tvout_reg>; | |
| 423 | }; | |
| 424 | ||
| e0f1abeb R |
425 | ab8500_battery: ab8500_battery { |
| 426 | stericsson,battery-type = "LIPO"; | |
| 427 | thermistor-on-batctrl; | |
| 428 | }; | |
| 429 | ||
| 430 | ab8500_fg { | |
| 431 | compatible = "stericsson,ab8500-fg"; | |
| 432 | battery = <&ab8500_battery>; | |
| 433 | }; | |
| 434 | ||
| bd9e8ab2 R |
435 | ab8500_btemp { |
| 436 | compatible = "stericsson,ab8500-btemp"; | |
| 437 | battery = <&ab8500_battery>; | |
| 438 | }; | |
| 439 | ||
| 4aef72db R |
440 | ab8500_charger { |
| 441 | compatible = "stericsson,ab8500-charger"; | |
| 442 | battery = <&ab8500_battery>; | |
| 443 | vddadc-supply = <&ab8500_ldo_tvout_reg>; | |
| 444 | }; | |
| 445 | ||
| a12810ab R |
446 | ab8500_chargalg { |
| 447 | compatible = "stericsson,ab8500-chargalg"; | |
| 448 | battery = <&ab8500_battery>; | |
| 449 | }; | |
| 450 | ||
| e0f1abeb | 451 | ab8500_usb { |
| ee189cef | 452 | compatible = "stericsson,ab8500-usb"; |
| 90c40257 LW |
453 | interrupts = < 90 IRQ_TYPE_LEVEL_HIGH |
| 454 | 96 IRQ_TYPE_LEVEL_HIGH | |
| 455 | 14 IRQ_TYPE_LEVEL_HIGH | |
| 456 | 15 IRQ_TYPE_LEVEL_HIGH | |
| 457 | 79 IRQ_TYPE_LEVEL_HIGH | |
| 458 | 74 IRQ_TYPE_LEVEL_HIGH | |
| 459 | 75 IRQ_TYPE_LEVEL_HIGH>; | |
| ee189cef LJ |
460 | interrupt-names = "ID_WAKEUP_R", |
| 461 | "ID_WAKEUP_F", | |
| 462 | "VBUS_DET_F", | |
| 463 | "VBUS_DET_R", | |
| 464 | "USB_LINK_STATUS", | |
| 465 | "USB_ADP_PROBE_PLUG", | |
| 466 | "USB_ADP_PROBE_UNPLUG"; | |
| 99b38eef | 467 | vddulpivio18-supply = <&ab8500_ldo_intcore_reg>; |
| ee189cef LJ |
468 | v-ape-supply = <&db8500_vape_reg>; |
| 469 | musb_1v8-supply = <&db8500_vsmps2_reg>; | |
| 470 | }; | |
| 471 | ||
| 12cb7bd4 | 472 | ab8500-ponkey { |
| 74630706 | 473 | compatible = "stericsson,ab8500-poweron-key"; |
| 90c40257 LW |
474 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH |
| 475 | 7 IRQ_TYPE_LEVEL_HIGH>; | |
| 12cb7bd4 LJ |
476 | interrupt-names = "ONKEY_DBF", "ONKEY_DBR"; |
| 477 | }; | |
| 478 | ||
| 401cd1b8 LJ |
479 | ab8500-sysctrl { |
| 480 | compatible = "stericsson,ab8500-sysctrl"; | |
| 481 | }; | |
| 482 | ||
| 78451de7 LJ |
483 | ab8500-pwm { |
| 484 | compatible = "stericsson,ab8500-pwm"; | |
| 485 | }; | |
| 486 | ||
| 215891ec LJ |
487 | ab8500-debugfs { |
| 488 | compatible = "stericsson,ab8500-debug"; | |
| 489 | }; | |
| 4a85c7fa | 490 | |
| 9c06af30 LJ |
491 | codec: ab8500-codec { |
| 492 | compatible = "stericsson,ab8500-codec"; | |
| 493 | ||
| f99808a6 FB |
494 | V-AUD-supply = <&ab8500_ldo_audio_reg>; |
| 495 | V-AMIC1-supply = <&ab8500_ldo_anamic1_reg>; | |
| 496 | V-AMIC2-supply = <&ab8500_ldo_anamic2_reg>; | |
| 497 | V-DMIC-supply = <&ab8500_ldo_dmic_reg>; | |
| 498 | ||
| 9c06af30 LJ |
499 | stericsson,earpeice-cmv = <950>; /* Units in mV. */ |
| 500 | }; | |
| 501 | ||
| 62ebfe6b LJ |
502 | ext_regulators: ab8500-ext-regulators { |
| 503 | compatible = "stericsson,ab8500-ext-regulator"; | |
| 504 | ||
| 505 | ab8500_ext1_reg: ab8500_ext1 { | |
| 506 | regulator-compatible = "ab8500_ext1"; | |
| 507 | regulator-min-microvolt = <1800000>; | |
| 508 | regulator-max-microvolt = <1800000>; | |
| 509 | regulator-boot-on; | |
| 510 | regulator-always-on; | |
| 511 | }; | |
| 512 | ||
| 513 | ab8500_ext2_reg: ab8500_ext2 { | |
| 514 | regulator-compatible = "ab8500_ext2"; | |
| 515 | regulator-min-microvolt = <1360000>; | |
| 516 | regulator-max-microvolt = <1360000>; | |
| 517 | regulator-boot-on; | |
| 518 | regulator-always-on; | |
| 519 | }; | |
| 520 | ||
| 521 | ab8500_ext3_reg: ab8500_ext3 { | |
| 522 | regulator-compatible = "ab8500_ext3"; | |
| 523 | regulator-min-microvolt = <3400000>; | |
| 524 | regulator-max-microvolt = <3400000>; | |
| 525 | regulator-boot-on; | |
| 526 | }; | |
| 527 | }; | |
| 528 | ||
| 4a85c7fa LJ |
529 | ab8500-regulators { |
| 530 | compatible = "stericsson,ab8500-regulator"; | |
| 75f0999a | 531 | vin-supply = <&ab8500_ext3_reg>; |
| 4a85c7fa LJ |
532 | |
| 533 | // supplies to the display/camera | |
| 534 | ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { | |
| da26848a | 535 | regulator-compatible = "ab8500_ldo_aux1"; |
| 4a85c7fa LJ |
536 | regulator-min-microvolt = <2500000>; |
| 537 | regulator-max-microvolt = <2900000>; | |
| 538 | regulator-boot-on; | |
| 539 | /* BUG: If turned off MMC will be affected. */ | |
| 540 | regulator-always-on; | |
| 541 | }; | |
| 542 | ||
| 543 | // supplies to the on-board eMMC | |
| 544 | ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { | |
| da26848a | 545 | regulator-compatible = "ab8500_ldo_aux2"; |
| 4a85c7fa LJ |
546 | regulator-min-microvolt = <1100000>; |
| 547 | regulator-max-microvolt = <3300000>; | |
| 548 | }; | |
| 549 | ||
| 550 | // supply for VAUX3; SDcard slots | |
| 551 | ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { | |
| da26848a | 552 | regulator-compatible = "ab8500_ldo_aux3"; |
| 4a85c7fa LJ |
553 | regulator-min-microvolt = <1100000>; |
| 554 | regulator-max-microvolt = <3300000>; | |
| 555 | }; | |
| 556 | ||
| 557 | // supply for v-intcore12; VINTCORE12 LDO | |
| 99b38eef FB |
558 | ab8500_ldo_intcore_reg: ab8500_ldo_intcore { |
| 559 | regulator-compatible = "ab8500_ldo_intcore"; | |
| 4a85c7fa LJ |
560 | }; |
| 561 | ||
| 562 | // supply for tvout; gpadc; TVOUT LDO | |
| 563 | ab8500_ldo_tvout_reg: ab8500_ldo_tvout { | |
| da26848a | 564 | regulator-compatible = "ab8500_ldo_tvout"; |
| 4a85c7fa LJ |
565 | }; |
| 566 | ||
| 567 | // supply for ab8500-usb; USB LDO | |
| 568 | ab8500_ldo_usb_reg: ab8500_ldo_usb { | |
| da26848a | 569 | regulator-compatible = "ab8500_ldo_usb"; |
| 4a85c7fa LJ |
570 | }; |
| 571 | ||
| 572 | // supply for ab8500-vaudio; VAUDIO LDO | |
| 573 | ab8500_ldo_audio_reg: ab8500_ldo_audio { | |
| da26848a | 574 | regulator-compatible = "ab8500_ldo_audio"; |
| 4a85c7fa LJ |
575 | }; |
| 576 | ||
| 4aa44874 | 577 | // supply for v-anamic1 VAMIC1 LDO |
| 4a85c7fa | 578 | ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { |
| da26848a | 579 | regulator-compatible = "ab8500_ldo_anamic1"; |
| 4a85c7fa LJ |
580 | }; |
| 581 | ||
| 582 | // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1 | |
| 5510ed9f FB |
583 | ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 { |
| 584 | regulator-compatible = "ab8500_ldo_anamic2"; | |
| 4a85c7fa LJ |
585 | }; |
| 586 | ||
| 587 | // supply for v-dmic; VDMIC LDO | |
| 588 | ab8500_ldo_dmic_reg: ab8500_ldo_dmic { | |
| da26848a | 589 | regulator-compatible = "ab8500_ldo_dmic"; |
| 4a85c7fa LJ |
590 | }; |
| 591 | ||
| 592 | // supply for U8500 CSI/DSI; VANA LDO | |
| 593 | ab8500_ldo_ana_reg: ab8500_ldo_ana { | |
| da26848a | 594 | regulator-compatible = "ab8500_ldo_ana"; |
| 4a85c7fa LJ |
595 | }; |
| 596 | }; | |
| 7e0ce270 LJ |
597 | }; |
| 598 | }; | |
| 599 | ||
| 600 | i2c@80004000 { | |
| d524fa7f | 601 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; |
| 7e0ce270 | 602 | reg = <0x80004000 0x1000>; |
| 90c40257 | 603 | interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; |
| 35b33d23 | 604 | |
| 7e0ce270 LJ |
605 | #address-cells = <1>; |
| 606 | #size-cells = <0>; | |
| d524fa7f LJ |
607 | v-i2c-supply = <&db8500_vape_reg>; |
| 608 | ||
| 609 | clock-frequency = <400000>; | |
| afd653e9 LJ |
610 | clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>; |
| 611 | clock-names = "i2cclk", "apb_pclk"; | |
| 7e0ce270 LJ |
612 | }; |
| 613 | ||
| 614 | i2c@80122000 { | |
| d524fa7f | 615 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; |
| 7e0ce270 | 616 | reg = <0x80122000 0x1000>; |
| 90c40257 | 617 | interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; |
| 35b33d23 | 618 | |
| 7e0ce270 LJ |
619 | #address-cells = <1>; |
| 620 | #size-cells = <0>; | |
| d524fa7f LJ |
621 | v-i2c-supply = <&db8500_vape_reg>; |
| 622 | ||
| 623 | clock-frequency = <400000>; | |
| afd653e9 LJ |
624 | |
| 625 | clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>; | |
| 626 | clock-names = "i2cclk", "apb_pclk"; | |
| 7e0ce270 LJ |
627 | }; |
| 628 | ||
| 629 | i2c@80128000 { | |
| d524fa7f | 630 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; |
| 7e0ce270 | 631 | reg = <0x80128000 0x1000>; |
| 90c40257 | 632 | interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>; |
| 35b33d23 | 633 | |
| 7e0ce270 LJ |
634 | #address-cells = <1>; |
| 635 | #size-cells = <0>; | |
| d524fa7f LJ |
636 | v-i2c-supply = <&db8500_vape_reg>; |
| 637 | ||
| 638 | clock-frequency = <400000>; | |
| afd653e9 LJ |
639 | |
| 640 | clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>; | |
| 641 | clock-names = "i2cclk", "apb_pclk"; | |
| 7e0ce270 LJ |
642 | }; |
| 643 | ||
| 644 | i2c@80110000 { | |
| d524fa7f | 645 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; |
| 7e0ce270 | 646 | reg = <0x80110000 0x1000>; |
| 90c40257 | 647 | interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>; |
| 35b33d23 | 648 | |
| 7e0ce270 LJ |
649 | #address-cells = <1>; |
| 650 | #size-cells = <0>; | |
| d524fa7f LJ |
651 | v-i2c-supply = <&db8500_vape_reg>; |
| 652 | ||
| 653 | clock-frequency = <400000>; | |
| afd653e9 LJ |
654 | |
| 655 | clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>; | |
| 656 | clock-names = "i2cclk", "apb_pclk"; | |
| 7e0ce270 LJ |
657 | }; |
| 658 | ||
| 659 | i2c@8012a000 { | |
| d524fa7f | 660 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; |
| 7e0ce270 | 661 | reg = <0x8012a000 0x1000>; |
| 90c40257 | 662 | interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>; |
| 35b33d23 | 663 | |
| 7e0ce270 LJ |
664 | #address-cells = <1>; |
| 665 | #size-cells = <0>; | |
| d524fa7f LJ |
666 | v-i2c-supply = <&db8500_vape_reg>; |
| 667 | ||
| 668 | clock-frequency = <400000>; | |
| afd653e9 LJ |
669 | |
| 670 | clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 9>; | |
| 671 | clock-names = "i2cclk", "apb_pclk"; | |
| 7e0ce270 LJ |
672 | }; |
| 673 | ||
| 674 | ssp@80002000 { | |
| 675 | compatible = "arm,pl022", "arm,primecell"; | |
| c164fa62 | 676 | reg = <0x80002000 0x1000>; |
| 90c40257 | 677 | interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>; |
| 7e0ce270 LJ |
678 | #address-cells = <1>; |
| 679 | #size-cells = <0>; | |
| 680 | status = "disabled"; | |
| 7e0ce270 LJ |
681 | }; |
| 682 | ||
| 683 | uart@80120000 { | |
| 684 | compatible = "arm,pl011", "arm,primecell"; | |
| 685 | reg = <0x80120000 0x1000>; | |
| 90c40257 | 686 | interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; |
| fbff01cc LJ |
687 | |
| 688 | dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */ | |
| 689 | <&dma 13 0 0x0>; /* Logical - MemToDev */ | |
| 690 | dma-names = "rx", "tx"; | |
| 691 | ||
| 5a323fb4 LJ |
692 | clocks = <&prcc_kclk 1 0>, <&prcc_pclk 1 0>; |
| 693 | clock-names = "uart", "apb_pclk"; | |
| 694 | ||
| 7e0ce270 LJ |
695 | status = "disabled"; |
| 696 | }; | |
| fbff01cc | 697 | |
| 7e0ce270 LJ |
698 | uart@80121000 { |
| 699 | compatible = "arm,pl011", "arm,primecell"; | |
| 700 | reg = <0x80121000 0x1000>; | |
| 90c40257 | 701 | interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>; |
| fbff01cc LJ |
702 | |
| 703 | dmas = <&dma 12 0 0x2>, /* Logical - DevToMem */ | |
| 704 | <&dma 12 0 0x0>; /* Logical - MemToDev */ | |
| 705 | dma-names = "rx", "tx"; | |
| 706 | ||
| 5a323fb4 LJ |
707 | clocks = <&prcc_kclk 1 1>, <&prcc_pclk 1 1>; |
| 708 | clock-names = "uart", "apb_pclk"; | |
| 709 | ||
| 7e0ce270 LJ |
710 | status = "disabled"; |
| 711 | }; | |
| fbff01cc | 712 | |
| 7e0ce270 LJ |
713 | uart@80007000 { |
| 714 | compatible = "arm,pl011", "arm,primecell"; | |
| 715 | reg = <0x80007000 0x1000>; | |
| 90c40257 | 716 | interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>; |
| fbff01cc LJ |
717 | |
| 718 | dmas = <&dma 11 0 0x2>, /* Logical - DevToMem */ | |
| 719 | <&dma 11 0 0x0>; /* Logical - MemToDev */ | |
| 720 | dma-names = "rx", "tx"; | |
| 721 | ||
| 5a323fb4 LJ |
722 | clocks = <&prcc_kclk 3 6>, <&prcc_pclk 3 6>; |
| 723 | clock-names = "uart", "apb_pclk"; | |
| 724 | ||
| 7e0ce270 LJ |
725 | status = "disabled"; |
| 726 | }; | |
| 727 | ||
| 81bf8c2e | 728 | sdi0_per1@80126000 { |
| 7e0ce270 LJ |
729 | compatible = "arm,pl18x", "arm,primecell"; |
| 730 | reg = <0x80126000 0x1000>; | |
| 90c40257 | 731 | interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>; |
| 498315b9 LJ |
732 | |
| 733 | dmas = <&dma 29 0 0x2>, /* Logical - DevToMem */ | |
| 734 | <&dma 29 0 0x0>; /* Logical - MemToDev */ | |
| 735 | dma-names = "rx", "tx"; | |
| 736 | ||
| 604be898 LJ |
737 | clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>; |
| 738 | clock-names = "sdi", "apb_pclk"; | |
| 739 | ||
| 7e0ce270 LJ |
740 | status = "disabled"; |
| 741 | }; | |
| 76ff4e43 | 742 | |
| 81bf8c2e | 743 | sdi1_per2@80118000 { |
| 7e0ce270 LJ |
744 | compatible = "arm,pl18x", "arm,primecell"; |
| 745 | reg = <0x80118000 0x1000>; | |
| 90c40257 | 746 | interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; |
| 498315b9 LJ |
747 | |
| 748 | dmas = <&dma 32 0 0x2>, /* Logical - DevToMem */ | |
| 749 | <&dma 32 0 0x0>; /* Logical - MemToDev */ | |
| 750 | dma-names = "rx", "tx"; | |
| 751 | ||
| 604be898 LJ |
752 | clocks = <&prcc_kclk 2 4>, <&prcc_pclk 2 6>; |
| 753 | clock-names = "sdi", "apb_pclk"; | |
| 754 | ||
| 7e0ce270 LJ |
755 | status = "disabled"; |
| 756 | }; | |
| 76ff4e43 | 757 | |
| 81bf8c2e | 758 | sdi2_per3@80005000 { |
| 7e0ce270 LJ |
759 | compatible = "arm,pl18x", "arm,primecell"; |
| 760 | reg = <0x80005000 0x1000>; | |
| 90c40257 | 761 | interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; |
| 498315b9 LJ |
762 | |
| 763 | dmas = <&dma 28 0 0x2>, /* Logical - DevToMem */ | |
| 764 | <&dma 28 0 0x0>; /* Logical - MemToDev */ | |
| 765 | dma-names = "rx", "tx"; | |
| 766 | ||
| 604be898 LJ |
767 | clocks = <&prcc_kclk 3 4>, <&prcc_pclk 3 4>; |
| 768 | clock-names = "sdi", "apb_pclk"; | |
| 769 | ||
| 7e0ce270 LJ |
770 | status = "disabled"; |
| 771 | }; | |
| 76ff4e43 | 772 | |
| 81bf8c2e | 773 | sdi3_per2@80119000 { |
| 7e0ce270 LJ |
774 | compatible = "arm,pl18x", "arm,primecell"; |
| 775 | reg = <0x80119000 0x1000>; | |
| 90c40257 | 776 | interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>; |
| 604be898 LJ |
777 | |
| 778 | clocks = <&prcc_kclk 2 5>, <&prcc_pclk 2 7>; | |
| 779 | clock-names = "sdi", "apb_pclk"; | |
| 780 | ||
| 7e0ce270 LJ |
781 | status = "disabled"; |
| 782 | }; | |
| 76ff4e43 | 783 | |
| 81bf8c2e | 784 | sdi4_per2@80114000 { |
| 7e0ce270 LJ |
785 | compatible = "arm,pl18x", "arm,primecell"; |
| 786 | reg = <0x80114000 0x1000>; | |
| 90c40257 | 787 | interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>; |
| 498315b9 LJ |
788 | |
| 789 | dmas = <&dma 42 0 0x2>, /* Logical - DevToMem */ | |
| 790 | <&dma 42 0 0x0>; /* Logical - MemToDev */ | |
| 791 | dma-names = "rx", "tx"; | |
| 792 | ||
| 604be898 LJ |
793 | clocks = <&prcc_kclk 2 2>, <&prcc_pclk 2 4>; |
| 794 | clock-names = "sdi", "apb_pclk"; | |
| 795 | ||
| 7e0ce270 LJ |
796 | status = "disabled"; |
| 797 | }; | |
| 76ff4e43 | 798 | |
| 81bf8c2e | 799 | sdi5_per3@80008000 { |
| 7e0ce270 | 800 | compatible = "arm,pl18x", "arm,primecell"; |
| 76ff4e43 | 801 | reg = <0x80008000 0x1000>; |
| 90c40257 | 802 | interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>; |
| 604be898 LJ |
803 | |
| 804 | clocks = <&prcc_kclk 3 7>, <&prcc_pclk 3 7>; | |
| 805 | clock-names = "sdi", "apb_pclk"; | |
| 806 | ||
| 7e0ce270 LJ |
807 | status = "disabled"; |
| 808 | }; | |
| bf76e062 | 809 | |
| fe164529 LJ |
810 | msp0: msp@80123000 { |
| 811 | compatible = "stericsson,ux500-msp-i2s"; | |
| 812 | reg = <0x80123000 0x1000>; | |
| 90c40257 | 813 | interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; |
| fe164529 | 814 | v-ape-supply = <&db8500_vape_reg>; |
| 133e6027 LJ |
815 | |
| 816 | clocks = <&prcc_kclk 1 3>, <&prcc_pclk 1 3>; | |
| 817 | clock-names = "msp", "apb_pclk"; | |
| 818 | ||
| fe164529 LJ |
819 | status = "disabled"; |
| 820 | }; | |
| 821 | ||
| 822 | msp1: msp@80124000 { | |
| 823 | compatible = "stericsson,ux500-msp-i2s"; | |
| 824 | reg = <0x80124000 0x1000>; | |
| 90c40257 | 825 | interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>; |
| fe164529 | 826 | v-ape-supply = <&db8500_vape_reg>; |
| 133e6027 LJ |
827 | |
| 828 | clocks = <&prcc_kclk 1 4>, <&prcc_pclk 1 4>; | |
| 829 | clock-names = "msp", "apb_pclk"; | |
| 830 | ||
| fe164529 LJ |
831 | status = "disabled"; |
| 832 | }; | |
| 833 | ||
| 834 | // HDMI sound | |
| 835 | msp2: msp@80117000 { | |
| 836 | compatible = "stericsson,ux500-msp-i2s"; | |
| 837 | reg = <0x80117000 0x1000>; | |
| 90c40257 | 838 | interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>; |
| fe164529 | 839 | v-ape-supply = <&db8500_vape_reg>; |
| 133e6027 LJ |
840 | |
| 841 | clocks = <&prcc_kclk 2 3>, <&prcc_pclk 2 5>; | |
| 842 | clock-names = "msp", "apb_pclk"; | |
| 843 | ||
| fe164529 LJ |
844 | status = "disabled"; |
| 845 | }; | |
| 846 | ||
| 847 | msp3: msp@80125000 { | |
| 848 | compatible = "stericsson,ux500-msp-i2s"; | |
| 849 | reg = <0x80125000 0x1000>; | |
| 90c40257 | 850 | interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>; |
| fe164529 | 851 | v-ape-supply = <&db8500_vape_reg>; |
| 133e6027 LJ |
852 | |
| 853 | clocks = <&prcc_kclk 1 10>, <&prcc_pclk 1 11>; | |
| 854 | clock-names = "msp", "apb_pclk"; | |
| 855 | ||
| fe164529 LJ |
856 | status = "disabled"; |
| 857 | }; | |
| 858 | ||
| bf76e062 LJ |
859 | external-bus@50000000 { |
| 860 | compatible = "simple-bus"; | |
| 861 | reg = <0x50000000 0x4000000>; | |
| 862 | #address-cells = <1>; | |
| 863 | #size-cells = <1>; | |
| 864 | ranges = <0 0x50000000 0x4000000>; | |
| 865 | status = "disabled"; | |
| 866 | }; | |
| dc1956b5 | 867 | |
| 868 | cpufreq-cooling { | |
| 869 | compatible = "stericsson,db8500-cpufreq-cooling"; | |
| 870 | status = "disabled"; | |
| 871 | }; | |
| 872 | ||
| 0563f638 LJ |
873 | vmmci: regulator-gpio { |
| 874 | compatible = "regulator-gpio"; | |
| 875 | ||
| 876 | regulator-min-microvolt = <1800000>; | |
| 4f902b42 | 877 | regulator-max-microvolt = <2900000>; |
| 0563f638 LJ |
878 | regulator-name = "mmci-reg"; |
| 879 | regulator-type = "voltage"; | |
| 880 | ||
| 874c9202 | 881 | startup-delay-us = <100>; |
| e7bda303 LJ |
882 | enable-active-high; |
| 883 | ||
| 0563f638 LJ |
884 | states = <1800000 0x1 |
| 885 | 2900000 0x0>; | |
| c94a4ab7 LJ |
886 | |
| 887 | status = "disabled"; | |
| 0563f638 | 888 | }; |
| fe2e9f92 LJ |
889 | |
| 890 | cryp@a03cb000 { | |
| 891 | compatible = "stericsson,ux500-cryp"; | |
| 892 | reg = <0xa03cb000 0x1000>; | |
| 90c40257 | 893 | interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; |
| fe2e9f92 LJ |
894 | |
| 895 | v-ape-supply = <&db8500_vape_reg>; | |
| fe2e9f92 | 896 | }; |
| 61122cf2 LJ |
897 | |
| 898 | hash@a03c2000 { | |
| 899 | compatible = "stericsson,ux500-hash"; | |
| 900 | reg = <0xa03c2000 0x1000>; | |
| 901 | ||
| 902 | v-ape-supply = <&db8500_vape_reg>; | |
| 61122cf2 | 903 | }; |
| 5d0769f0 AB |
904 | }; |
| 905 | }; |