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ARM: ux500: Provide a clock lookup for the Crypto driver
[mirror_ubuntu-jammy-kernel.git] / arch / arm / boot / dts / ste-dbx5x0.dtsi
CommitLineData
5d0769f0
AB
1/*
2 * Copyright 2012 Linaro Ltd
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
90c40257 12#include <dt-bindings/interrupt-controller/irq.h>
841cd0c0 13#include <dt-bindings/mfd/dbx500-prcmu.h>
807e8838 14#include "skeleton.dtsi"
5d0769f0
AB
15
16/ {
b1ba1439 17 soc {
5d0769f0
AB
18 #address-cells = <1>;
19 #size-cells = <1>;
7e0ce270 20 compatible = "stericsson,db8500";
dab6487e 21 interrupt-parent = <&intc>;
5d0769f0 22 ranges;
7e0ce270 23
dab6487e
LJ
24 intc: interrupt-controller@a0411000 {
25 compatible = "arm,cortex-a9-gic";
26 #interrupt-cells = <3>;
27 #address-cells = <1>;
28 interrupt-controller;
dab6487e
LJ
29 reg = <0xa0411000 0x1000>,
30 <0xa0410100 0x100>;
31 };
32
f1949ea0
LJ
33 L2: l2-cache {
34 compatible = "arm,pl310-cache";
35 reg = <0xa0412000 0x1000>;
90c40257 36 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
f1949ea0
LJ
37 cache-unified;
38 cache-level = <2>;
39 };
40
7e0ce270
LJ
41 pmu {
42 compatible = "arm,cortex-a9-pmu";
90c40257 43 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
7e0ce270
LJ
44 };
45
8132ed1b 46
841cd0c0
LJ
47 clocks {
48 compatible = "stericsson,u8500-clks";
49
50 prcmu_clk: prcmu-clock {
51 #clock-cells = <1>;
52 };
fcbe5e90
LJ
53
54 prcc_pclk: prcc-periph-clock {
55 #clock-cells = <2>;
56 };
2588fea6
LJ
57
58 prcc_kclk: prcc-kernel-clock {
59 #clock-cells = <2>;
60 };
589d9839
LJ
61
62 rtc_clk: rtc32k-clock {
63 #clock-cells = <0>;
64 };
309012d7
LJ
65
66 smp_twd_clk: smp-twd-clock {
67 #clock-cells = <0>;
68 };
841cd0c0
LJ
69 };
70
8132ed1b
LJ
71 mtu@a03c6000 {
72 /* Nomadik System Timer */
73 compatible = "st,nomadik-mtu";
74 reg = <0xa03c6000 0x1000>;
75 interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
76
77 clocks = <&prcmu_clk PRCMU_TIMCLK>, <&prcc_pclk 6 6>;
78 clock-names = "timclk", "apb_pclk";
79 };
80
71de5c46
LJ
81 timer@a0410600 {
82 compatible = "arm,cortex-a9-twd-timer";
83 reg = <0xa0410600 0x20>;
90c40257 84 interrupts = <1 13 0x304>; /* IRQ level high per-CPU */
a8acb1ec
LJ
85
86 clocks = <&smp_twd_clk>;
71de5c46
LJ
87 };
88
7e0ce270 89 rtc@80154000 {
ddb3b99c 90 compatible = "arm,rtc-pl031", "arm,primecell";
7e0ce270 91 reg = <0x80154000 0x1000>;
90c40257 92 interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
d299b5a5
LJ
93
94 clocks = <&rtc_clk>;
95 clock-names = "apb_pclk";
7e0ce270
LJ
96 };
97
98 gpio0: gpio@8012e000 {
99 compatible = "stericsson,db8500-gpio",
fd9a80b2 100 "st,nomadik-gpio";
7e0ce270 101 reg = <0x8012e000 0x80>;
90c40257 102 interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
103 interrupt-controller;
104 #interrupt-cells = <2>;
61be4981 105 st,supports-sleepmode;
7e0ce270 106 gpio-controller;
c0b133bd
LJ
107 #gpio-cells = <2>;
108 gpio-bank = <0>;
9d891073
LJ
109
110 clocks = <&prcc_pclk 1 9>;
7e0ce270
LJ
111 };
112
113 gpio1: gpio@8012e080 {
114 compatible = "stericsson,db8500-gpio",
fd9a80b2 115 "st,nomadik-gpio";
7e0ce270 116 reg = <0x8012e080 0x80>;
90c40257 117 interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
118 interrupt-controller;
119 #interrupt-cells = <2>;
61be4981 120 st,supports-sleepmode;
7e0ce270 121 gpio-controller;
c0b133bd
LJ
122 #gpio-cells = <2>;
123 gpio-bank = <1>;
9d891073
LJ
124
125 clocks = <&prcc_pclk 1 9>;
7e0ce270
LJ
126 };
127
128 gpio2: gpio@8000e000 {
129 compatible = "stericsson,db8500-gpio",
fd9a80b2 130 "st,nomadik-gpio";
7e0ce270 131 reg = <0x8000e000 0x80>;
90c40257 132 interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
133 interrupt-controller;
134 #interrupt-cells = <2>;
61be4981 135 st,supports-sleepmode;
7e0ce270 136 gpio-controller;
c0b133bd
LJ
137 #gpio-cells = <2>;
138 gpio-bank = <2>;
9d891073
LJ
139
140 clocks = <&prcc_pclk 3 8>;
7e0ce270
LJ
141 };
142
143 gpio3: gpio@8000e080 {
144 compatible = "stericsson,db8500-gpio",
fd9a80b2 145 "st,nomadik-gpio";
7e0ce270 146 reg = <0x8000e080 0x80>;
90c40257 147 interrupts = <0 122 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
148 interrupt-controller;
149 #interrupt-cells = <2>;
61be4981 150 st,supports-sleepmode;
7e0ce270 151 gpio-controller;
c0b133bd
LJ
152 #gpio-cells = <2>;
153 gpio-bank = <3>;
9d891073
LJ
154
155 clocks = <&prcc_pclk 3 8>;
7e0ce270
LJ
156 };
157
158 gpio4: gpio@8000e100 {
159 compatible = "stericsson,db8500-gpio",
fd9a80b2 160 "st,nomadik-gpio";
7e0ce270 161 reg = <0x8000e100 0x80>;
90c40257 162 interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
163 interrupt-controller;
164 #interrupt-cells = <2>;
61be4981 165 st,supports-sleepmode;
7e0ce270 166 gpio-controller;
c0b133bd
LJ
167 #gpio-cells = <2>;
168 gpio-bank = <4>;
9d891073
LJ
169
170 clocks = <&prcc_pclk 3 8>;
7e0ce270
LJ
171 };
172
173 gpio5: gpio@8000e180 {
174 compatible = "stericsson,db8500-gpio",
fd9a80b2 175 "st,nomadik-gpio";
7e0ce270 176 reg = <0x8000e180 0x80>;
90c40257 177 interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
178 interrupt-controller;
179 #interrupt-cells = <2>;
61be4981 180 st,supports-sleepmode;
7e0ce270 181 gpio-controller;
c0b133bd
LJ
182 #gpio-cells = <2>;
183 gpio-bank = <5>;
9d891073
LJ
184
185 clocks = <&prcc_pclk 3 8>;
7e0ce270
LJ
186 };
187
188 gpio6: gpio@8011e000 {
189 compatible = "stericsson,db8500-gpio",
fd9a80b2 190 "st,nomadik-gpio";
7e0ce270 191 reg = <0x8011e000 0x80>;
90c40257 192 interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
193 interrupt-controller;
194 #interrupt-cells = <2>;
61be4981 195 st,supports-sleepmode;
7e0ce270 196 gpio-controller;
c0b133bd
LJ
197 #gpio-cells = <2>;
198 gpio-bank = <6>;
9d891073
LJ
199
200 clocks = <&prcc_pclk 2 1>;
7e0ce270
LJ
201 };
202
203 gpio7: gpio@8011e080 {
204 compatible = "stericsson,db8500-gpio",
fd9a80b2 205 "st,nomadik-gpio";
7e0ce270 206 reg = <0x8011e080 0x80>;
90c40257 207 interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
208 interrupt-controller;
209 #interrupt-cells = <2>;
61be4981 210 st,supports-sleepmode;
7e0ce270 211 gpio-controller;
c0b133bd
LJ
212 #gpio-cells = <2>;
213 gpio-bank = <7>;
9d891073
LJ
214
215 clocks = <&prcc_pclk 2 1>;
7e0ce270
LJ
216 };
217
218 gpio8: gpio@a03fe000 {
219 compatible = "stericsson,db8500-gpio",
fd9a80b2 220 "st,nomadik-gpio";
7e0ce270 221 reg = <0xa03fe000 0x80>;
90c40257 222 interrupts = <0 127 IRQ_TYPE_LEVEL_HIGH>;
93b5698a
LJ
223 interrupt-controller;
224 #interrupt-cells = <2>;
61be4981 225 st,supports-sleepmode;
7e0ce270 226 gpio-controller;
c0b133bd
LJ
227 #gpio-cells = <2>;
228 gpio-bank = <8>;
9d891073
LJ
229
230 clocks = <&prcc_pclk 6 1>;
7e0ce270
LJ
231 };
232
8979cfef 233 pinctrl {
818d99a9 234 compatible = "stericsson,db8500-pinctrl";
8979cfef 235 prcm = <&prcmu>;
5910de9e
LJ
236 };
237
b32dc865 238 usb_per5@a03e0000 {
4a6cd43f 239 compatible = "stericsson,db8500-musb";
7e0ce270 240 reg = <0xa03e0000 0x10000>;
90c40257 241 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
b32dc865
LJ
242 interrupt-names = "mc";
243
244 dr_mode = "otg";
245
246 dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */
247 <&dma 38 0 0x0>, /* Logical - MemToDev */
248 <&dma 37 0 0x2>, /* Logical - DevToMem */
249 <&dma 37 0 0x0>, /* Logical - MemToDev */
250 <&dma 36 0 0x2>, /* Logical - DevToMem */
251 <&dma 36 0 0x0>, /* Logical - MemToDev */
252 <&dma 19 0 0x2>, /* Logical - DevToMem */
253 <&dma 19 0 0x0>, /* Logical - MemToDev */
254 <&dma 18 0 0x2>, /* Logical - DevToMem */
255 <&dma 18 0 0x0>, /* Logical - MemToDev */
256 <&dma 17 0 0x2>, /* Logical - DevToMem */
257 <&dma 17 0 0x0>, /* Logical - MemToDev */
258 <&dma 16 0 0x2>, /* Logical - DevToMem */
259 <&dma 16 0 0x0>, /* Logical - MemToDev */
260 <&dma 39 0 0x2>, /* Logical - DevToMem */
261 <&dma 39 0 0x0>; /* Logical - MemToDev */
262
263 dma-names = "iep_1_9", "oep_1_9",
264 "iep_2_10", "oep_2_10",
265 "iep_3_11", "oep_3_11",
266 "iep_4_12", "oep_4_12",
267 "iep_5_13", "oep_5_13",
268 "iep_6_14", "oep_6_14",
269 "iep_7_15", "oep_7_15",
270 "iep_8", "oep_8";
e47339ff
LJ
271
272 clocks = <&prcc_pclk 5 0>;
7e0ce270
LJ
273 };
274
ba074aec
LJ
275 dma: dma-controller@801C0000 {
276 compatible = "stericsson,db8500-dma40", "stericsson,dma40";
7e0ce270 277 reg = <0x801C0000 0x1000 0x40010000 0x800>;
70d39a8d 278 reg-names = "base", "lcpa";
90c40257 279 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
ba074aec
LJ
280
281 #dma-cells = <3>;
d37fcdb6 282 memcpy-channels = <56 57 58 59 60>;
e064cb24
LJ
283
284 clocks = <&prcmu_clk PRCMU_DMACLK>;
7e0ce270
LJ
285 };
286
8979cfef 287 prcmu: prcmu@80157000 {
7e0ce270 288 compatible = "stericsson,db8500-prcmu";
4d26aa30 289 reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
e73081d9 290 reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
90c40257 291 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
7e0ce270 292 #address-cells = <1>;
3de3d749 293 #size-cells = <1>;
c09090bb
LJ
294 interrupt-controller;
295 #interrupt-cells = <2>;
3de3d749
LJ
296 ranges;
297
ccf74f76 298 prcmu-timer-4@80157450 {
3de3d749
LJ
299 compatible = "stericsson,db8500-prcmu-timer-4";
300 reg = <0x80157450 0xC>;
301 };
7e0ce270 302
dc1956b5 303 thermal@801573c0 {
304 compatible = "stericsson,db8500-thermal";
305 reg = <0x801573c0 0x40>;
90c40257
LW
306 interrupts = <21 IRQ_TYPE_LEVEL_HIGH>,
307 <22 IRQ_TYPE_LEVEL_HIGH>;
dc1956b5 308 interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH";
309 status = "disabled";
1d3f99f5 310 };
dc1956b5 311
e5999f28
LJ
312 db8500-prcmu-regulators {
313 compatible = "stericsson,db8500-prcmu-regulator";
314
315 // DB8500_REGULATOR_VAPE
316 db8500_vape_reg: db8500_vape {
da26848a 317 regulator-compatible = "db8500_vape";
e5999f28
LJ
318 regulator-always-on;
319 };
320
321 // DB8500_REGULATOR_VARM
322 db8500_varm_reg: db8500_varm {
da26848a 323 regulator-compatible = "db8500_varm";
e5999f28
LJ
324 };
325
326 // DB8500_REGULATOR_VMODEM
327 db8500_vmodem_reg: db8500_vmodem {
da26848a 328 regulator-compatible = "db8500_vmodem";
e5999f28
LJ
329 };
330
331 // DB8500_REGULATOR_VPLL
332 db8500_vpll_reg: db8500_vpll {
da26848a 333 regulator-compatible = "db8500_vpll";
e5999f28
LJ
334 };
335
336 // DB8500_REGULATOR_VSMPS1
337 db8500_vsmps1_reg: db8500_vsmps1 {
da26848a 338 regulator-compatible = "db8500_vsmps1";
e5999f28
LJ
339 };
340
341 // DB8500_REGULATOR_VSMPS2
342 db8500_vsmps2_reg: db8500_vsmps2 {
da26848a 343 regulator-compatible = "db8500_vsmps2";
e5999f28
LJ
344 };
345
346 // DB8500_REGULATOR_VSMPS3
347 db8500_vsmps3_reg: db8500_vsmps3 {
da26848a 348 regulator-compatible = "db8500_vsmps3";
e5999f28
LJ
349 };
350
351 // DB8500_REGULATOR_VRF1
352 db8500_vrf1_reg: db8500_vrf1 {
da26848a 353 regulator-compatible = "db8500_vrf1";
e5999f28
LJ
354 };
355
356 // DB8500_REGULATOR_SWITCH_SVAMMDSP
357 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
da26848a 358 regulator-compatible = "db8500_sva_mmdsp";
e5999f28
LJ
359 };
360
361 // DB8500_REGULATOR_SWITCH_SVAMMDSPRET
362 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
da26848a 363 regulator-compatible = "db8500_sva_mmdsp_ret";
e5999f28
LJ
364 };
365
366 // DB8500_REGULATOR_SWITCH_SVAPIPE
367 db8500_sva_pipe_reg: db8500_sva_pipe {
da26848a 368 regulator-compatible = "db8500_sva_pipe";
e5999f28
LJ
369 };
370
371 // DB8500_REGULATOR_SWITCH_SIAMMDSP
372 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
da26848a 373 regulator-compatible = "db8500_sia_mmdsp";
e5999f28
LJ
374 };
375
376 // DB8500_REGULATOR_SWITCH_SIAMMDSPRET
377 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
e5999f28
LJ
378 };
379
380 // DB8500_REGULATOR_SWITCH_SIAPIPE
381 db8500_sia_pipe_reg: db8500_sia_pipe {
da26848a 382 regulator-compatible = "db8500_sia_pipe";
e5999f28
LJ
383 };
384
385 // DB8500_REGULATOR_SWITCH_SGA
386 db8500_sga_reg: db8500_sga {
da26848a 387 regulator-compatible = "db8500_sga";
e5999f28
LJ
388 vin-supply = <&db8500_vape_reg>;
389 };
390
391 // DB8500_REGULATOR_SWITCH_B2R2_MCDE
392 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
da26848a 393 regulator-compatible = "db8500_b2r2_mcde";
e5999f28
LJ
394 vin-supply = <&db8500_vape_reg>;
395 };
396
397 // DB8500_REGULATOR_SWITCH_ESRAM12
398 db8500_esram12_reg: db8500_esram12 {
da26848a 399 regulator-compatible = "db8500_esram12";
e5999f28
LJ
400 };
401
402 // DB8500_REGULATOR_SWITCH_ESRAM12RET
403 db8500_esram12_ret_reg: db8500_esram12_ret {
da26848a 404 regulator-compatible = "db8500_esram12_ret";
e5999f28
LJ
405 };
406
407 // DB8500_REGULATOR_SWITCH_ESRAM34
408 db8500_esram34_reg: db8500_esram34 {
da26848a 409 regulator-compatible = "db8500_esram34";
e5999f28
LJ
410 };
411
412 // DB8500_REGULATOR_SWITCH_ESRAM34RET
413 db8500_esram34_ret_reg: db8500_esram34_ret {
da26848a 414 regulator-compatible = "db8500_esram34_ret";
e5999f28
LJ
415 };
416 };
417
d52701d3 418 ab8500 {
7e0ce270 419 compatible = "stericsson,ab8500";
8d4c6d45 420 interrupt-parent = <&intc>;
90c40257 421 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
732973c8
LJ
422 interrupt-controller;
423 #interrupt-cells = <2>;
4a85c7fa 424
348f3bc6
LJ
425 ab8500_gpio: ab8500-gpio {
426 gpio-controller;
427 #gpio-cells = <2>;
428 };
429
d4b29ac1
LJ
430 ab8500-rtc {
431 compatible = "stericsson,ab8500-rtc";
90c40257
LW
432 interrupts = <17 IRQ_TYPE_LEVEL_HIGH
433 18 IRQ_TYPE_LEVEL_HIGH>;
d4b29ac1
LJ
434 interrupt-names = "60S", "ALARM";
435 };
436
4eda9129
LJ
437 ab8500-gpadc {
438 compatible = "stericsson,ab8500-gpadc";
90c40257
LW
439 interrupts = <32 IRQ_TYPE_LEVEL_HIGH
440 39 IRQ_TYPE_LEVEL_HIGH>;
4eda9129
LJ
441 interrupt-names = "HW_CONV_END", "SW_CONV_END";
442 vddadc-supply = <&ab8500_ldo_tvout_reg>;
443 };
444
e0f1abeb
R
445 ab8500_battery: ab8500_battery {
446 stericsson,battery-type = "LIPO";
447 thermistor-on-batctrl;
448 };
449
450 ab8500_fg {
451 compatible = "stericsson,ab8500-fg";
452 battery = <&ab8500_battery>;
453 };
454
bd9e8ab2
R
455 ab8500_btemp {
456 compatible = "stericsson,ab8500-btemp";
457 battery = <&ab8500_battery>;
458 };
459
4aef72db
R
460 ab8500_charger {
461 compatible = "stericsson,ab8500-charger";
462 battery = <&ab8500_battery>;
463 vddadc-supply = <&ab8500_ldo_tvout_reg>;
464 };
465
a12810ab
R
466 ab8500_chargalg {
467 compatible = "stericsson,ab8500-chargalg";
468 battery = <&ab8500_battery>;
469 };
470
e0f1abeb 471 ab8500_usb {
ee189cef 472 compatible = "stericsson,ab8500-usb";
90c40257
LW
473 interrupts = < 90 IRQ_TYPE_LEVEL_HIGH
474 96 IRQ_TYPE_LEVEL_HIGH
475 14 IRQ_TYPE_LEVEL_HIGH
476 15 IRQ_TYPE_LEVEL_HIGH
477 79 IRQ_TYPE_LEVEL_HIGH
478 74 IRQ_TYPE_LEVEL_HIGH
479 75 IRQ_TYPE_LEVEL_HIGH>;
ee189cef
LJ
480 interrupt-names = "ID_WAKEUP_R",
481 "ID_WAKEUP_F",
482 "VBUS_DET_F",
483 "VBUS_DET_R",
484 "USB_LINK_STATUS",
485 "USB_ADP_PROBE_PLUG",
486 "USB_ADP_PROBE_UNPLUG";
99b38eef 487 vddulpivio18-supply = <&ab8500_ldo_intcore_reg>;
ee189cef
LJ
488 v-ape-supply = <&db8500_vape_reg>;
489 musb_1v8-supply = <&db8500_vsmps2_reg>;
490 };
491
12cb7bd4 492 ab8500-ponkey {
74630706 493 compatible = "stericsson,ab8500-poweron-key";
90c40257
LW
494 interrupts = <6 IRQ_TYPE_LEVEL_HIGH
495 7 IRQ_TYPE_LEVEL_HIGH>;
12cb7bd4
LJ
496 interrupt-names = "ONKEY_DBF", "ONKEY_DBR";
497 };
498
401cd1b8
LJ
499 ab8500-sysctrl {
500 compatible = "stericsson,ab8500-sysctrl";
501 };
502
78451de7
LJ
503 ab8500-pwm {
504 compatible = "stericsson,ab8500-pwm";
505 };
506
215891ec
LJ
507 ab8500-debugfs {
508 compatible = "stericsson,ab8500-debug";
509 };
4a85c7fa 510
9c06af30
LJ
511 codec: ab8500-codec {
512 compatible = "stericsson,ab8500-codec";
513
f99808a6
FB
514 V-AUD-supply = <&ab8500_ldo_audio_reg>;
515 V-AMIC1-supply = <&ab8500_ldo_anamic1_reg>;
516 V-AMIC2-supply = <&ab8500_ldo_anamic2_reg>;
517 V-DMIC-supply = <&ab8500_ldo_dmic_reg>;
518
9c06af30
LJ
519 stericsson,earpeice-cmv = <950>; /* Units in mV. */
520 };
521
62ebfe6b
LJ
522 ext_regulators: ab8500-ext-regulators {
523 compatible = "stericsson,ab8500-ext-regulator";
524
525 ab8500_ext1_reg: ab8500_ext1 {
526 regulator-compatible = "ab8500_ext1";
527 regulator-min-microvolt = <1800000>;
528 regulator-max-microvolt = <1800000>;
529 regulator-boot-on;
530 regulator-always-on;
531 };
532
533 ab8500_ext2_reg: ab8500_ext2 {
534 regulator-compatible = "ab8500_ext2";
535 regulator-min-microvolt = <1360000>;
536 regulator-max-microvolt = <1360000>;
537 regulator-boot-on;
538 regulator-always-on;
539 };
540
541 ab8500_ext3_reg: ab8500_ext3 {
542 regulator-compatible = "ab8500_ext3";
543 regulator-min-microvolt = <3400000>;
544 regulator-max-microvolt = <3400000>;
545 regulator-boot-on;
546 };
547 };
548
4a85c7fa
LJ
549 ab8500-regulators {
550 compatible = "stericsson,ab8500-regulator";
75f0999a 551 vin-supply = <&ab8500_ext3_reg>;
4a85c7fa
LJ
552
553 // supplies to the display/camera
554 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
da26848a 555 regulator-compatible = "ab8500_ldo_aux1";
4a85c7fa
LJ
556 regulator-min-microvolt = <2500000>;
557 regulator-max-microvolt = <2900000>;
558 regulator-boot-on;
559 /* BUG: If turned off MMC will be affected. */
560 regulator-always-on;
561 };
562
563 // supplies to the on-board eMMC
564 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
da26848a 565 regulator-compatible = "ab8500_ldo_aux2";
4a85c7fa
LJ
566 regulator-min-microvolt = <1100000>;
567 regulator-max-microvolt = <3300000>;
568 };
569
570 // supply for VAUX3; SDcard slots
571 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
da26848a 572 regulator-compatible = "ab8500_ldo_aux3";
4a85c7fa
LJ
573 regulator-min-microvolt = <1100000>;
574 regulator-max-microvolt = <3300000>;
575 };
576
577 // supply for v-intcore12; VINTCORE12 LDO
99b38eef
FB
578 ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
579 regulator-compatible = "ab8500_ldo_intcore";
4a85c7fa
LJ
580 };
581
582 // supply for tvout; gpadc; TVOUT LDO
583 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
da26848a 584 regulator-compatible = "ab8500_ldo_tvout";
4a85c7fa
LJ
585 };
586
587 // supply for ab8500-usb; USB LDO
588 ab8500_ldo_usb_reg: ab8500_ldo_usb {
da26848a 589 regulator-compatible = "ab8500_ldo_usb";
4a85c7fa
LJ
590 };
591
592 // supply for ab8500-vaudio; VAUDIO LDO
593 ab8500_ldo_audio_reg: ab8500_ldo_audio {
da26848a 594 regulator-compatible = "ab8500_ldo_audio";
4a85c7fa
LJ
595 };
596
4aa44874 597 // supply for v-anamic1 VAMIC1 LDO
4a85c7fa 598 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
da26848a 599 regulator-compatible = "ab8500_ldo_anamic1";
4a85c7fa
LJ
600 };
601
602 // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1
5510ed9f
FB
603 ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
604 regulator-compatible = "ab8500_ldo_anamic2";
4a85c7fa
LJ
605 };
606
607 // supply for v-dmic; VDMIC LDO
608 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
da26848a 609 regulator-compatible = "ab8500_ldo_dmic";
4a85c7fa
LJ
610 };
611
612 // supply for U8500 CSI/DSI; VANA LDO
613 ab8500_ldo_ana_reg: ab8500_ldo_ana {
da26848a 614 regulator-compatible = "ab8500_ldo_ana";
4a85c7fa
LJ
615 };
616 };
7e0ce270
LJ
617 };
618 };
619
620 i2c@80004000 {
d524fa7f 621 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
7e0ce270 622 reg = <0x80004000 0x1000>;
90c40257 623 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
35b33d23 624
7e0ce270
LJ
625 #address-cells = <1>;
626 #size-cells = <0>;
d524fa7f
LJ
627 v-i2c-supply = <&db8500_vape_reg>;
628
629 clock-frequency = <400000>;
afd653e9
LJ
630 clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>;
631 clock-names = "i2cclk", "apb_pclk";
7e0ce270
LJ
632 };
633
634 i2c@80122000 {
d524fa7f 635 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
7e0ce270 636 reg = <0x80122000 0x1000>;
90c40257 637 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
35b33d23 638
7e0ce270
LJ
639 #address-cells = <1>;
640 #size-cells = <0>;
d524fa7f
LJ
641 v-i2c-supply = <&db8500_vape_reg>;
642
643 clock-frequency = <400000>;
afd653e9
LJ
644
645 clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>;
646 clock-names = "i2cclk", "apb_pclk";
7e0ce270
LJ
647 };
648
649 i2c@80128000 {
d524fa7f 650 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
7e0ce270 651 reg = <0x80128000 0x1000>;
90c40257 652 interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
35b33d23 653
7e0ce270
LJ
654 #address-cells = <1>;
655 #size-cells = <0>;
d524fa7f
LJ
656 v-i2c-supply = <&db8500_vape_reg>;
657
658 clock-frequency = <400000>;
afd653e9
LJ
659
660 clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>;
661 clock-names = "i2cclk", "apb_pclk";
7e0ce270
LJ
662 };
663
664 i2c@80110000 {
d524fa7f 665 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
7e0ce270 666 reg = <0x80110000 0x1000>;
90c40257 667 interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>;
35b33d23 668
7e0ce270
LJ
669 #address-cells = <1>;
670 #size-cells = <0>;
d524fa7f
LJ
671 v-i2c-supply = <&db8500_vape_reg>;
672
673 clock-frequency = <400000>;
afd653e9
LJ
674
675 clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>;
676 clock-names = "i2cclk", "apb_pclk";
7e0ce270
LJ
677 };
678
679 i2c@8012a000 {
d524fa7f 680 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
7e0ce270 681 reg = <0x8012a000 0x1000>;
90c40257 682 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
35b33d23 683
7e0ce270
LJ
684 #address-cells = <1>;
685 #size-cells = <0>;
d524fa7f
LJ
686 v-i2c-supply = <&db8500_vape_reg>;
687
688 clock-frequency = <400000>;
afd653e9
LJ
689
690 clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 9>;
691 clock-names = "i2cclk", "apb_pclk";
7e0ce270
LJ
692 };
693
694 ssp@80002000 {
695 compatible = "arm,pl022", "arm,primecell";
c164fa62 696 reg = <0x80002000 0x1000>;
90c40257 697 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
7e0ce270
LJ
698 #address-cells = <1>;
699 #size-cells = <0>;
700 status = "disabled";
7e0ce270
LJ
701 };
702
703 uart@80120000 {
704 compatible = "arm,pl011", "arm,primecell";
705 reg = <0x80120000 0x1000>;
90c40257 706 interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
fbff01cc
LJ
707
708 dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
709 <&dma 13 0 0x0>; /* Logical - MemToDev */
710 dma-names = "rx", "tx";
711
5a323fb4
LJ
712 clocks = <&prcc_kclk 1 0>, <&prcc_pclk 1 0>;
713 clock-names = "uart", "apb_pclk";
714
7e0ce270
LJ
715 status = "disabled";
716 };
fbff01cc 717
7e0ce270
LJ
718 uart@80121000 {
719 compatible = "arm,pl011", "arm,primecell";
720 reg = <0x80121000 0x1000>;
90c40257 721 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
fbff01cc
LJ
722
723 dmas = <&dma 12 0 0x2>, /* Logical - DevToMem */
724 <&dma 12 0 0x0>; /* Logical - MemToDev */
725 dma-names = "rx", "tx";
726
5a323fb4
LJ
727 clocks = <&prcc_kclk 1 1>, <&prcc_pclk 1 1>;
728 clock-names = "uart", "apb_pclk";
729
7e0ce270
LJ
730 status = "disabled";
731 };
fbff01cc 732
7e0ce270
LJ
733 uart@80007000 {
734 compatible = "arm,pl011", "arm,primecell";
735 reg = <0x80007000 0x1000>;
90c40257 736 interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
fbff01cc
LJ
737
738 dmas = <&dma 11 0 0x2>, /* Logical - DevToMem */
739 <&dma 11 0 0x0>; /* Logical - MemToDev */
740 dma-names = "rx", "tx";
741
5a323fb4
LJ
742 clocks = <&prcc_kclk 3 6>, <&prcc_pclk 3 6>;
743 clock-names = "uart", "apb_pclk";
744
7e0ce270
LJ
745 status = "disabled";
746 };
747
81bf8c2e 748 sdi0_per1@80126000 {
7e0ce270
LJ
749 compatible = "arm,pl18x", "arm,primecell";
750 reg = <0x80126000 0x1000>;
90c40257 751 interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>;
498315b9
LJ
752
753 dmas = <&dma 29 0 0x2>, /* Logical - DevToMem */
754 <&dma 29 0 0x0>; /* Logical - MemToDev */
755 dma-names = "rx", "tx";
756
604be898
LJ
757 clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>;
758 clock-names = "sdi", "apb_pclk";
759
7e0ce270
LJ
760 status = "disabled";
761 };
76ff4e43 762
81bf8c2e 763 sdi1_per2@80118000 {
7e0ce270
LJ
764 compatible = "arm,pl18x", "arm,primecell";
765 reg = <0x80118000 0x1000>;
90c40257 766 interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
498315b9
LJ
767
768 dmas = <&dma 32 0 0x2>, /* Logical - DevToMem */
769 <&dma 32 0 0x0>; /* Logical - MemToDev */
770 dma-names = "rx", "tx";
771
604be898
LJ
772 clocks = <&prcc_kclk 2 4>, <&prcc_pclk 2 6>;
773 clock-names = "sdi", "apb_pclk";
774
7e0ce270
LJ
775 status = "disabled";
776 };
76ff4e43 777
81bf8c2e 778 sdi2_per3@80005000 {
7e0ce270
LJ
779 compatible = "arm,pl18x", "arm,primecell";
780 reg = <0x80005000 0x1000>;
90c40257 781 interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
498315b9
LJ
782
783 dmas = <&dma 28 0 0x2>, /* Logical - DevToMem */
784 <&dma 28 0 0x0>; /* Logical - MemToDev */
785 dma-names = "rx", "tx";
786
604be898
LJ
787 clocks = <&prcc_kclk 3 4>, <&prcc_pclk 3 4>;
788 clock-names = "sdi", "apb_pclk";
789
7e0ce270
LJ
790 status = "disabled";
791 };
76ff4e43 792
81bf8c2e 793 sdi3_per2@80119000 {
7e0ce270
LJ
794 compatible = "arm,pl18x", "arm,primecell";
795 reg = <0x80119000 0x1000>;
90c40257 796 interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
604be898
LJ
797
798 clocks = <&prcc_kclk 2 5>, <&prcc_pclk 2 7>;
799 clock-names = "sdi", "apb_pclk";
800
7e0ce270
LJ
801 status = "disabled";
802 };
76ff4e43 803
81bf8c2e 804 sdi4_per2@80114000 {
7e0ce270
LJ
805 compatible = "arm,pl18x", "arm,primecell";
806 reg = <0x80114000 0x1000>;
90c40257 807 interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
498315b9
LJ
808
809 dmas = <&dma 42 0 0x2>, /* Logical - DevToMem */
810 <&dma 42 0 0x0>; /* Logical - MemToDev */
811 dma-names = "rx", "tx";
812
604be898
LJ
813 clocks = <&prcc_kclk 2 2>, <&prcc_pclk 2 4>;
814 clock-names = "sdi", "apb_pclk";
815
7e0ce270
LJ
816 status = "disabled";
817 };
76ff4e43 818
81bf8c2e 819 sdi5_per3@80008000 {
7e0ce270 820 compatible = "arm,pl18x", "arm,primecell";
76ff4e43 821 reg = <0x80008000 0x1000>;
90c40257 822 interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
604be898
LJ
823
824 clocks = <&prcc_kclk 3 7>, <&prcc_pclk 3 7>;
825 clock-names = "sdi", "apb_pclk";
826
7e0ce270
LJ
827 status = "disabled";
828 };
bf76e062 829
fe164529
LJ
830 msp0: msp@80123000 {
831 compatible = "stericsson,ux500-msp-i2s";
832 reg = <0x80123000 0x1000>;
90c40257 833 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
fe164529 834 v-ape-supply = <&db8500_vape_reg>;
133e6027
LJ
835
836 clocks = <&prcc_kclk 1 3>, <&prcc_pclk 1 3>;
837 clock-names = "msp", "apb_pclk";
838
fe164529
LJ
839 status = "disabled";
840 };
841
842 msp1: msp@80124000 {
843 compatible = "stericsson,ux500-msp-i2s";
844 reg = <0x80124000 0x1000>;
90c40257 845 interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
fe164529 846 v-ape-supply = <&db8500_vape_reg>;
133e6027
LJ
847
848 clocks = <&prcc_kclk 1 4>, <&prcc_pclk 1 4>;
849 clock-names = "msp", "apb_pclk";
850
fe164529
LJ
851 status = "disabled";
852 };
853
854 // HDMI sound
855 msp2: msp@80117000 {
856 compatible = "stericsson,ux500-msp-i2s";
857 reg = <0x80117000 0x1000>;
90c40257 858 interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
fe164529 859 v-ape-supply = <&db8500_vape_reg>;
133e6027
LJ
860
861 clocks = <&prcc_kclk 2 3>, <&prcc_pclk 2 5>;
862 clock-names = "msp", "apb_pclk";
863
fe164529
LJ
864 status = "disabled";
865 };
866
867 msp3: msp@80125000 {
868 compatible = "stericsson,ux500-msp-i2s";
869 reg = <0x80125000 0x1000>;
90c40257 870 interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
fe164529 871 v-ape-supply = <&db8500_vape_reg>;
133e6027
LJ
872
873 clocks = <&prcc_kclk 1 10>, <&prcc_pclk 1 11>;
874 clock-names = "msp", "apb_pclk";
875
fe164529
LJ
876 status = "disabled";
877 };
878
bf76e062
LJ
879 external-bus@50000000 {
880 compatible = "simple-bus";
881 reg = <0x50000000 0x4000000>;
882 #address-cells = <1>;
883 #size-cells = <1>;
884 ranges = <0 0x50000000 0x4000000>;
885 status = "disabled";
886 };
dc1956b5 887
888 cpufreq-cooling {
889 compatible = "stericsson,db8500-cpufreq-cooling";
890 status = "disabled";
d460d28b 891 };
dc1956b5 892
0563f638
LJ
893 vmmci: regulator-gpio {
894 compatible = "regulator-gpio";
895
896 regulator-min-microvolt = <1800000>;
4f902b42 897 regulator-max-microvolt = <2900000>;
0563f638
LJ
898 regulator-name = "mmci-reg";
899 regulator-type = "voltage";
900
874c9202 901 startup-delay-us = <100>;
e7bda303
LJ
902 enable-active-high;
903
0563f638
LJ
904 states = <1800000 0x1
905 2900000 0x0>;
c94a4ab7
LJ
906
907 status = "disabled";
0563f638 908 };
fe2e9f92
LJ
909
910 cryp@a03cb000 {
911 compatible = "stericsson,ux500-cryp";
912 reg = <0xa03cb000 0x1000>;
90c40257 913 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
fe2e9f92
LJ
914
915 v-ape-supply = <&db8500_vape_reg>;
d2f898ce 916 clocks = <&prcc_pclk 6 1>;
fe2e9f92 917 };
61122cf2
LJ
918
919 hash@a03c2000 {
920 compatible = "stericsson,ux500-hash";
921 reg = <0xa03c2000 0x1000>;
922
923 v-ape-supply = <&db8500_vape_reg>;
61122cf2 924 };
5d0769f0
AB
925 };
926};