]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - arch/arm/boot/dts/ste-href.dtsi
Merge remote-tracking branches 'asoc/topic/rockchip', 'asoc/topic/rt5514', 'asoc...
[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / ste-href.dtsi
CommitLineData
d1b8bfa3
LJ
1/*
2 * Copyright 2012 ST-Ericsson AB
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
90c40257 12#include <dt-bindings/interrupt-controller/irq.h>
2ce05a14 13#include "ste-dbx5x0.dtsi"
3bfdebba 14#include "ste-href-family-pinctrl.dtsi"
d1b8bfa3
LJ
15
16/ {
17 memory {
18 reg = <0x00000000 0x20000000>;
19 };
20
b1ba1439 21 soc {
d1b8bfa3 22 uart@80120000 {
3bfdebba
LW
23 pinctrl-names = "default", "sleep";
24 pinctrl-0 = <&uart0_default_mode>;
25 pinctrl-1 = <&uart0_sleep_mode>;
d1b8bfa3
LJ
26 status = "okay";
27 };
28
1d8aca9d 29 /* This UART is unused and thus left disabled */
d1b8bfa3 30 uart@80121000 {
3bfdebba
LW
31 pinctrl-names = "default", "sleep";
32 pinctrl-0 = <&uart1_default_mode>;
33 pinctrl-1 = <&uart1_sleep_mode>;
d1b8bfa3
LJ
34 };
35
36 uart@80007000 {
3bfdebba
LW
37 pinctrl-names = "default", "sleep";
38 pinctrl-0 = <&uart2_default_mode>;
39 pinctrl-1 = <&uart2_sleep_mode>;
d1b8bfa3
LJ
40 status = "okay";
41 };
42
96fee13f
LW
43 i2c@80004000 {
44 pinctrl-names = "default","sleep";
45 pinctrl-0 = <&i2c0_default_mode>;
46 pinctrl-1 = <&i2c0_sleep_mode>;
47 };
48
49 i2c@80122000 {
50 pinctrl-names = "default","sleep";
51 pinctrl-0 = <&i2c1_default_mode>;
52 pinctrl-1 = <&i2c1_sleep_mode>;
53 };
54
d1b8bfa3 55 i2c@80128000 {
96fee13f
LW
56 pinctrl-names = "default","sleep";
57 pinctrl-0 = <&i2c2_default_mode>;
58 pinctrl-1 = <&i2c2_sleep_mode>;
2bd7378f
LW
59 lp5521@33 {
60 compatible = "national,lp5521";
d1b8bfa3 61 reg = <0x33>;
2bd7378f
LW
62 label = "lp5521_pri";
63 clock-mode = /bits/ 8 <2>;
64 chan0 {
65 led-cur = /bits/ 8 <0x2f>;
66 max-cur = /bits/ 8 <0x5f>;
385d61ce 67 linux,default-trigger = "heartbeat";
2bd7378f
LW
68 };
69 chan1 {
70 led-cur = /bits/ 8 <0x2f>;
71 max-cur = /bits/ 8 <0x5f>;
72 };
73 chan2 {
74 led-cur = /bits/ 8 <0x2f>;
75 max-cur = /bits/ 8 <0x5f>;
76 };
d1b8bfa3 77 };
2bd7378f
LW
78 lp5521@34 {
79 compatible = "national,lp5521";
d1b8bfa3 80 reg = <0x34>;
2bd7378f
LW
81 label = "lp5521_sec";
82 clock-mode = /bits/ 8 <2>;
83 chan0 {
84 led-cur = /bits/ 8 <0x2f>;
85 max-cur = /bits/ 8 <0x5f>;
86 };
87 chan1 {
88 led-cur = /bits/ 8 <0x2f>;
89 max-cur = /bits/ 8 <0x5f>;
90 };
91 chan2 {
92 led-cur = /bits/ 8 <0x2f>;
93 max-cur = /bits/ 8 <0x5f>;
94 };
d1b8bfa3 95 };
d594224a 96 bh1780@29 {
d1b8bfa3 97 compatible = "rohm,bh1780gli";
7e9dee0c 98 reg = <0x29>;
d1b8bfa3
LJ
99 };
100 };
101
96fee13f
LW
102 i2c@80110000 {
103 pinctrl-names = "default","sleep";
104 pinctrl-0 = <&i2c3_default_mode>;
105 pinctrl-1 = <&i2c3_sleep_mode>;
106 };
107
adef953b 108 /* ST6G3244ME level translator for 1.8/2.9 V */
53d26698
UH
109 vmmci: regulator-gpio {
110 compatible = "regulator-gpio";
111
112 regulator-min-microvolt = <1800000>;
113 regulator-max-microvolt = <2900000>;
114 regulator-name = "mmci-reg";
115 regulator-type = "voltage";
116
117 startup-delay-us = <100>;
53d26698
UH
118
119 states = <1800000 0x1
120 2900000 0x0>;
53d26698
UH
121 };
122
d1b8bfa3
LJ
123 // External Micro SD slot
124 sdi0_per1@80126000 {
125 arm,primecell-periphid = <0x10480180>;
90ccde4c 126 max-frequency = <100000000>;
d1b8bfa3 127 bus-width = <4>;
30cdd668
UH
128 cap-sd-highspeed;
129 cap-mmc-highspeed;
09585ab4
UH
130 sd-uhs-sdr12;
131 sd-uhs-sdr25;
132 full-pwr-cycle;
d63df63a
UH
133 st,sig-dir-dat0;
134 st,sig-dir-dat2;
135 st,sig-dir-cmd;
136 st,sig-pin-fbclk;
d1b8bfa3 137 vmmc-supply = <&ab8500_ldo_aux3_reg>;
d05b066f 138 vqmmc-supply = <&vmmci>;
1e662353
LW
139 pinctrl-names = "default", "sleep";
140 pinctrl-0 = <&sdi0_default_mode>;
141 pinctrl-1 = <&sdi0_sleep_mode>;
d1b8bfa3 142
d1b8bfa3
LJ
143 status = "okay";
144 };
145
146 // WLAN SDIO channel
147 sdi1_per2@80118000 {
148 arm,primecell-periphid = <0x10480180>;
90ccde4c 149 max-frequency = <100000000>;
d1b8bfa3 150 bus-width = <4>;
09585ab4 151 non-removable;
1e662353
LW
152 pinctrl-names = "default", "sleep";
153 pinctrl-0 = <&sdi1_default_mode>;
154 pinctrl-1 = <&sdi1_sleep_mode>;
d1b8bfa3
LJ
155
156 status = "okay";
157 };
158
159 // PoP:ed eMMC
160 sdi2_per3@80005000 {
161 arm,primecell-periphid = <0x10480180>;
90ccde4c 162 max-frequency = <100000000>;
d1b8bfa3 163 bus-width = <8>;
30cdd668 164 cap-mmc-highspeed;
09585ab4 165 non-removable;
e1a309a4 166 vmmc-supply = <&db8500_vsmps2_reg>;
1e662353
LW
167 pinctrl-names = "default", "sleep";
168 pinctrl-0 = <&sdi2_default_mode>;
169 pinctrl-1 = <&sdi2_sleep_mode>;
d1b8bfa3
LJ
170
171 status = "okay";
172 };
173
174 // On-board eMMC
175 sdi4_per2@80114000 {
176 arm,primecell-periphid = <0x10480180>;
90ccde4c 177 max-frequency = <100000000>;
d1b8bfa3 178 bus-width = <8>;
30cdd668 179 cap-mmc-highspeed;
09585ab4 180 non-removable;
d1b8bfa3 181 vmmc-supply = <&ab8500_ldo_aux2_reg>;
1e662353
LW
182 pinctrl-names = "default", "sleep";
183 pinctrl-0 = <&sdi4_default_mode>;
184 pinctrl-1 = <&sdi4_sleep_mode>;
d1b8bfa3
LJ
185
186 status = "okay";
187 };
188
70b41abc
LW
189 msp0: msp@80123000 {
190 pinctrl-names = "default";
191 pinctrl-0 = <&msp0_default_mode>;
192 status = "okay";
193 };
194
d1b8bfa3 195 msp1: msp@80124000 {
70b41abc
LW
196 pinctrl-names = "default";
197 pinctrl-0 = <&msp1_default_mode>;
198 status = "okay";
199 };
200
201 msp2: msp@80117000 {
202 pinctrl-names = "default";
203 pinctrl-0 = <&msp2_default_mode>;
d1b8bfa3
LJ
204 };
205
206 msp3: msp@80125000 {
207 status = "okay";
208 };
209
210 prcmu@80157000 {
d52701d3 211 ab8500 {
c90c36e4 212 ab8500-gpio {
c90c36e4
LW
213 };
214
6097c2d0
LW
215 ab8500_usb {
216 pinctrl-names = "default", "sleep";
217 pinctrl-0 = <&musb_default_mode>;
218 pinctrl-1 = <&musb_sleep_mode>;
219 };
220
d1b8bfa3
LJ
221 ab8500-regulators {
222 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
223 regulator-name = "V-DISPLAY";
224 };
225
226 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
227 regulator-name = "V-eMMC1";
228 };
229
230 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
231 regulator-name = "V-MMC-SD";
232 };
233
99b38eef 234 ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
d1b8bfa3
LJ
235 regulator-name = "V-INTCORE";
236 };
237
238 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
239 regulator-name = "V-TVOUT";
240 };
241
242 ab8500_ldo_usb_reg: ab8500_ldo_usb {
243 regulator-name = "dummy";
244 };
245
246 ab8500_ldo_audio_reg: ab8500_ldo_audio {
247 regulator-name = "V-AUD";
248 };
249
250 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
251 regulator-name = "V-AMIC1";
252 };
253
5510ed9f 254 ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
d1b8bfa3
LJ
255 regulator-name = "V-AMIC2";
256 };
257
258 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
259 regulator-name = "V-DMIC";
260 };
261
262 ab8500_ldo_ana_reg: ab8500_ldo_ana {
263 regulator-name = "V-CSI/DSI";
264 };
265 };
266 };
267 };
817a5b96
LW
268
269 mcde@a0350000 {
270 pinctrl-names = "default", "sleep";
271 pinctrl-0 = <&lcd_default_mode>;
272 pinctrl-1 = <&lcd_sleep_mode>;
273 };
d1b8bfa3
LJ
274 };
275};