projects / mirror_ubuntu-eoan-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| f8635abd LW |
1 | /* |
| 2 | * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC | |
| 3 | */ | |
| 4 | /include/ "skeleton.dtsi" | |
| 5 | ||
| 6 | / { | |
| 7 | #address-cells = <1>; | |
| 8 | #size-cells = <1>; | |
| 9 | ||
| 10 | memory { | |
| 11 | reg = <0x00000000 0x04000000>, | |
| 12 | <0x08000000 0x04000000>; | |
| 13 | }; | |
| 14 | ||
| 15 | L2: l2-cache { | |
| 16 | compatible = "arm,l210-cache"; | |
| 17 | reg = <0x10210000 0x1000>; | |
| 18 | interrupt-parent = <&vica>; | |
| 19 | interrupts = <30>; | |
| 20 | cache-unified; | |
| 21 | cache-level = <2>; | |
| 22 | }; | |
| 23 | ||
| 24 | mtu0 { | |
| 25 | /* Nomadik system timer */ | |
| 26 | reg = <0x101e2000 0x1000>; | |
| 27 | interrupt-parent = <&vica>; | |
| 28 | interrupts = <4>; | |
| 29 | }; | |
| 30 | ||
| 31 | mtu1 { | |
| 32 | /* Secondary timer */ | |
| 33 | reg = <0x101e3000 0x1000>; | |
| 34 | interrupt-parent = <&vica>; | |
| 35 | interrupts = <5>; | |
| 36 | }; | |
| 37 | ||
| 6010d403 LW |
38 | gpio0: gpio@101e4000 { |
| 39 | compatible = "st,nomadik-gpio"; | |
| 40 | reg = <0x101e4000 0x80>; | |
| 41 | interrupt-parent = <&vica>; | |
| 42 | interrupts = <6>; | |
| 43 | interrupt-controller; | |
| 44 | #interrupt-cells = <2>; | |
| 45 | gpio-controller; | |
| 46 | #gpio-cells = <2>; | |
| 47 | gpio-bank = <0>; | |
| 48 | }; | |
| 49 | ||
| 50 | gpio1: gpio@101e5000 { | |
| 51 | compatible = "st,nomadik-gpio"; | |
| 52 | reg = <0x101e5000 0x80>; | |
| 53 | interrupt-parent = <&vica>; | |
| 54 | interrupts = <7>; | |
| 55 | interrupt-controller; | |
| 56 | #interrupt-cells = <2>; | |
| 57 | gpio-controller; | |
| 58 | #gpio-cells = <2>; | |
| 59 | gpio-bank = <1>; | |
| 60 | }; | |
| 61 | ||
| 62 | gpio2: gpio@101e6000 { | |
| 63 | compatible = "st,nomadik-gpio"; | |
| 64 | reg = <0x101e6000 0x80>; | |
| 65 | interrupt-parent = <&vica>; | |
| 66 | interrupts = <8>; | |
| 67 | interrupt-controller; | |
| 68 | #interrupt-cells = <2>; | |
| 69 | gpio-controller; | |
| 70 | #gpio-cells = <2>; | |
| 71 | gpio-bank = <2>; | |
| 72 | }; | |
| 73 | ||
| 74 | gpio3: gpio@101e7000 { | |
| 75 | compatible = "st,nomadik-gpio"; | |
| 76 | reg = <0x101e7000 0x80>; | |
| 77 | interrupt-parent = <&vica>; | |
| 78 | interrupts = <9>; | |
| 79 | interrupt-controller; | |
| 80 | #interrupt-cells = <2>; | |
| 81 | gpio-controller; | |
| 82 | #gpio-cells = <2>; | |
| 83 | gpio-bank = <3>; | |
| 84 | }; | |
| 85 | ||
| 86 | pinctrl { | |
| 87 | compatible = "stericsson,nmk-pinctrl-stn8815"; | |
| 88 | }; | |
| 89 | ||
| ba785205 LW |
90 | /* A NAND flash of 128 MiB */ |
| 91 | fsmc: flash@40000000 { | |
| 92 | compatible = "stericsson,fsmc-nand"; | |
| 93 | #address-cells = <1>; | |
| 94 | #size-cells = <1>; | |
| 95 | reg = <0x10100000 0x1000>, /* FSMC Register*/ | |
| 96 | <0x40000000 0x2000>, /* NAND Base DATA */ | |
| 97 | <0x41000000 0x2000>, /* NAND Base ADDR */ | |
| 98 | <0x40800000 0x2000>; /* NAND Base CMD */ | |
| 99 | reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; | |
| 100 | status = "okay"; | |
| 101 | ||
| 102 | partition@0 { | |
| 103 | label = "X-Loader(NAND)"; | |
| 104 | reg = <0x0 0x40000>; | |
| 105 | }; | |
| 106 | partition@40000 { | |
| 107 | label = "MemInit(NAND)"; | |
| 108 | reg = <0x40000 0x40000>; | |
| 109 | }; | |
| 110 | partition@80000 { | |
| 111 | label = "BootLoader(NAND)"; | |
| 112 | reg = <0x80000 0x200000>; | |
| 113 | }; | |
| 114 | partition@280000 { | |
| 115 | label = "Kernel zImage(NAND)"; | |
| 116 | reg = <0x280000 0x300000>; | |
| 117 | }; | |
| 118 | partition@580000 { | |
| 119 | label = "Root Filesystem(NAND)"; | |
| 120 | reg = <0x580000 0x1600000>; | |
| 121 | }; | |
| 122 | partition@1b80000 { | |
| 123 | label = "User Filesystem(NAND)"; | |
| 124 | reg = <0x1b80000 0x6480000>; | |
| 125 | }; | |
| 126 | }; | |
| 127 | ||
| f8635abd LW |
128 | amba { |
| 129 | compatible = "arm,amba-bus"; | |
| 130 | #address-cells = <1>; | |
| 131 | #size-cells = <1>; | |
| 132 | ranges; | |
| 133 | ||
| 134 | vica: intc@0x10140000 { | |
| 135 | compatible = "arm,versatile-vic"; | |
| 136 | interrupt-controller; | |
| 137 | #interrupt-cells = <1>; | |
| 138 | reg = <0x10140000 0x20>; | |
| 139 | }; | |
| 140 | ||
| 141 | vicb: intc@0x10140020 { | |
| 142 | compatible = "arm,versatile-vic"; | |
| 143 | interrupt-controller; | |
| 144 | #interrupt-cells = <1>; | |
| 145 | reg = <0x10140020 0x20>; | |
| 146 | }; | |
| 147 | ||
| 148 | uart0: uart@101fd000 { | |
| 149 | compatible = "arm,pl011", "arm,primecell"; | |
| 150 | reg = <0x101fd000 0x1000>; | |
| 151 | interrupt-parent = <&vica>; | |
| 152 | interrupts = <12>; | |
| 153 | }; | |
| 154 | ||
| 155 | uart1: uart@101fb000 { | |
| 156 | compatible = "arm,pl011", "arm,primecell"; | |
| 157 | reg = <0x101fb000 0x1000>; | |
| 158 | interrupt-parent = <&vica>; | |
| 159 | interrupts = <17>; | |
| 160 | }; | |
| 161 | ||
| 162 | uart2: uart@101f2000 { | |
| 163 | compatible = "arm,pl011", "arm,primecell"; | |
| 164 | reg = <0x101f2000 0x1000>; | |
| 165 | interrupt-parent = <&vica>; | |
| 166 | interrupts = <28>; | |
| 167 | status = "disabled"; | |
| 168 | }; | |
| 27bda036 LW |
169 | |
| 170 | rng: rng@101b0000 { | |
| 171 | compatible = "arm,primecell"; | |
| 172 | reg = <0x101b0000 0x1000>; | |
| 173 | }; | |
| 174 | ||
| 175 | rtc: rtc@101e8000 { | |
| 176 | compatible = "arm,pl031", "arm,primecell"; | |
| 177 | reg = <0x101e8000 0x1000>; | |
| 178 | interrupt-parent = <&vica>; | |
| 179 | interrupts = <10>; | |
| 180 | }; | |
| f8635abd LW |
181 | }; |
| 182 | }; |