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Commit | Line | Data |
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978577ea LW |
1 | /* |
2 | * Device Tree for the ST-Ericsson U300 Machine and SoC | |
3 | */ | |
4 | ||
5 | /dts-v1/; | |
6 | /include/ "skeleton.dtsi" | |
7 | ||
8 | / { | |
9 | model = "ST-Ericsson U300"; | |
10 | compatible = "stericsson,u300"; | |
11 | #address-cells = <1>; | |
12 | #size-cells = <1>; | |
13 | ||
14 | chosen { | |
15 | bootargs = "root=/dev/ram0 console=ttyAMA0,115200n8 earlyprintk"; | |
16 | }; | |
17 | ||
18 | aliases { | |
19 | serial0 = &uart0; | |
20 | serial1 = &uart1; | |
21 | }; | |
22 | ||
23 | memory { | |
24 | reg = <0x48000000 0x03c00000>; | |
25 | }; | |
26 | ||
ecf5b39a LW |
27 | s365 { |
28 | compatible = "stericsson,s365"; | |
29 | vana15-supply = <&ab3100_ldo_d_reg>; | |
cf0ce095 LW |
30 | syscon = <&syscon>; |
31 | }; | |
32 | ||
33 | syscon: syscon@c0011000 { | |
34 | compatible = "stericsson,u300-syscon"; | |
35 | reg = <0xc0011000 0x1000>; | |
ecf5b39a LW |
36 | }; |
37 | ||
978577ea LW |
38 | timer: timer@c0014000 { |
39 | compatible = "stericsson,u300-apptimer"; | |
40 | reg = <0xc0014000 0x1000>; | |
41 | interrupt-parent = <&vica>; | |
42 | interrupts = <24 25 26 27>; | |
43 | }; | |
44 | ||
45 | gpio: gpio@c0016000 { | |
46 | compatible = "stericsson,gpio-coh901"; | |
47 | reg = <0xc0016000 0x1000>; | |
48 | interrupt-parent = <&vicb>; | |
49 | interrupts = <0 1 2 18 21 22 23>; | |
50 | interrupt-names = "gpio0", "gpio1", "gpio2", "gpio3", | |
51 | "gpio4", "gpio5", "gpio6"; | |
52 | interrupt-controller; | |
53 | #interrupt-cells = <2>; | |
54 | gpio-controller; | |
55 | #gpio-cells = <2>; | |
56 | }; | |
57 | ||
58 | pinctrl: pinctrl@c0011000 { | |
59 | compatible = "stericsson,pinctrl-u300"; | |
60 | reg = <0xc0011000 0x1000>; | |
61 | }; | |
62 | ||
63a62ec0 LW |
63 | watchdog: watchdog@c0012000 { |
64 | compatible = "stericsson,coh901327"; | |
65 | reg = <0xc0012000 0x1000>; | |
66 | interrupt-parent = <&vicb>; | |
67 | interrupts = <3>; | |
68 | }; | |
69 | ||
ae87bb8e LW |
70 | rtc: rtc@c0017000 { |
71 | compatible = "stericsson,coh901331"; | |
72 | reg = <0xc0017000 0x1000>; | |
73 | interrupt-parent = <&vicb>; | |
74 | interrupts = <10>; | |
75 | }; | |
76 | ||
39738cc9 LW |
77 | dmac: dma-controller@c00020000 { |
78 | compatible = "stericsson,coh901318"; | |
79 | reg = <0xc0020000 0x1000>; | |
80 | interrupt-parent = <&vica>; | |
81 | interrupts = <2>; | |
82 | #dma-cells = <1>; | |
83 | dma-channels = <40>; | |
84 | }; | |
85 | ||
d134636f LW |
86 | /* A NAND flash of 128 MiB */ |
87 | fsmc: flash@40000000 { | |
88 | compatible = "stericsson,fsmc-nand"; | |
89 | #address-cells = <1>; | |
90 | #size-cells = <1>; | |
91 | reg = <0x9f800000 0x1000>, /* FSMC Register*/ | |
92 | <0x80000000 0x4000>, /* NAND Base DATA */ | |
93 | <0x80020000 0x4000>, /* NAND Base ADDR */ | |
94 | <0x80010000 0x4000>; /* NAND Base CMD */ | |
95 | reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; | |
96 | nand-skip-bbtscan; | |
97 | ||
98 | partition@0 { | |
99 | label = "boot records"; | |
100 | reg = <0x0 0x20000>; | |
101 | }; | |
102 | partition@20000 { | |
103 | label = "free"; | |
104 | reg = <0x20000 0x7e0000>; | |
105 | }; | |
106 | partition@800000 { | |
107 | label = "platform"; | |
108 | reg = <0x800000 0xf800000>; | |
109 | }; | |
110 | }; | |
111 | ||
c023b8b2 LW |
112 | i2c0: i2c@c0004000 { |
113 | compatible = "st,ddci2c"; | |
114 | reg = <0xc0004000 0x1000>; | |
115 | interrupt-parent = <&vicb>; | |
116 | interrupts = <8>; | |
117 | #address-cells = <1>; | |
118 | #size-cells = <0>; | |
ecf5b39a LW |
119 | ab3100: ab3100@0x48 { |
120 | compatible = "stericsson,ab3100"; | |
121 | reg = <0x48>; | |
122 | interrupt-parent = <&vica>; | |
123 | interrupts = <0>; /* EXT0 IRQ */ | |
124 | ab3100-regulators { | |
125 | compatible = "stericsson,ab3100-regulators"; | |
126 | ab3100_ldo_a_reg: ab3100_ldo_a { | |
127 | regulator-compatible = "ab3100_ldo_a"; | |
128 | startup-delay-us = <200>; | |
129 | regulator-always-on; | |
130 | regulator-boot-on; | |
131 | }; | |
132 | ab3100_ldo_c_reg: ab3100_ldo_c { | |
133 | regulator-compatible = "ab3100_ldo_c"; | |
134 | startup-delay-us = <200>; | |
135 | }; | |
136 | ab3100_ldo_d_reg: ab3100_ldo_d { | |
137 | regulator-compatible = "ab3100_ldo_d"; | |
138 | startup-delay-us = <200>; | |
139 | }; | |
140 | ab3100_ldo_e_reg: ab3100_ldo_e { | |
141 | regulator-compatible = "ab3100_ldo_e"; | |
142 | regulator-min-microvolt = <1800000>; | |
143 | regulator-max-microvolt = <1800000>; | |
144 | startup-delay-us = <200>; | |
145 | regulator-always-on; | |
146 | regulator-boot-on; | |
147 | }; | |
148 | ab3100_ldo_f_reg: ab3100_ldo_f { | |
149 | regulator-compatible = "ab3100_ldo_f"; | |
150 | regulator-min-microvolt = <2500000>; | |
151 | regulator-max-microvolt = <2500000>; | |
152 | startup-delay-us = <600>; | |
153 | regulator-always-on; | |
154 | regulator-boot-on; | |
155 | }; | |
156 | ab3100_ldo_g_reg: ab3100_ldo_g { | |
157 | regulator-compatible = "ab3100_ldo_g"; | |
158 | regulator-min-microvolt = <1500000>; | |
159 | regulator-max-microvolt = <2850000>; | |
160 | startup-delay-us = <400>; | |
161 | }; | |
162 | ab3100_ldo_h_reg: ab3100_ldo_h { | |
163 | regulator-compatible = "ab3100_ldo_h"; | |
164 | regulator-min-microvolt = <1200000>; | |
165 | regulator-max-microvolt = <2750000>; | |
166 | startup-delay-us = <200>; | |
167 | }; | |
168 | ab3100_ldo_k_reg: ab3100_ldo_k { | |
169 | regulator-compatible = "ab3100_ldo_k"; | |
170 | regulator-min-microvolt = <1800000>; | |
171 | regulator-max-microvolt = <2750000>; | |
172 | startup-delay-us = <200>; | |
173 | }; | |
174 | ab3100_ext_reg: ab3100_ext { | |
175 | regulator-compatible = "ab3100_ext"; | |
176 | }; | |
177 | ab3100_buck_reg: ab3100_buck { | |
178 | regulator-compatible = "ab3100_buck"; | |
179 | regulator-min-microvolt = <1200000>; | |
180 | regulator-max-microvolt = <1800000>; | |
181 | startup-delay-us = <1000>; | |
182 | regulator-always-on; | |
183 | regulator-boot-on; | |
184 | }; | |
185 | }; | |
186 | }; | |
c023b8b2 LW |
187 | }; |
188 | ||
189 | i2c1: i2c@c0005000 { | |
190 | compatible = "st,ddci2c"; | |
191 | reg = <0xc0005000 0x1000>; | |
192 | interrupt-parent = <&vicb>; | |
193 | interrupts = <9>; | |
194 | #address-cells = <1>; | |
195 | #size-cells = <0>; | |
ecf5b39a LW |
196 | fwcam0: fwcam@0x10 { |
197 | reg = <0x10>; | |
198 | }; | |
199 | fwcam1: fwcam@0x5d { | |
200 | reg = <0x5d>; | |
201 | }; | |
c023b8b2 LW |
202 | }; |
203 | ||
978577ea LW |
204 | amba { |
205 | compatible = "arm,amba-bus"; | |
206 | #address-cells = <1>; | |
207 | #size-cells = <1>; | |
208 | ranges; | |
209 | ||
210 | vica: interrupt-controller@a0001000 { | |
211 | compatible = "arm,versatile-vic"; | |
212 | interrupt-controller; | |
213 | #interrupt-cells = <1>; | |
214 | reg = <0xa0001000 0x20>; | |
215 | }; | |
216 | ||
217 | vicb: interrupt-controller@a0002000 { | |
218 | compatible = "arm,versatile-vic"; | |
219 | interrupt-controller; | |
220 | #interrupt-cells = <1>; | |
221 | reg = <0xa0002000 0x20>; | |
222 | }; | |
223 | ||
224 | uart0: serial@c0013000 { | |
225 | compatible = "arm,pl011", "arm,primecell"; | |
226 | reg = <0xc0013000 0x1000>; | |
227 | interrupt-parent = <&vica>; | |
228 | interrupts = <22>; | |
efb9bc2e LW |
229 | dmas = <&dmac 17 &dmac 18>; |
230 | dma-names = "tx", "rx"; | |
978577ea LW |
231 | }; |
232 | ||
233 | uart1: serial@c0007000 { | |
234 | compatible = "arm,pl011", "arm,primecell"; | |
235 | reg = <0xc0007000 0x1000>; | |
236 | interrupt-parent = <&vicb>; | |
237 | interrupts = <20>; | |
efb9bc2e LW |
238 | dmas = <&dmac 38 &dmac 39>; |
239 | dma-names = "tx", "rx"; | |
978577ea | 240 | }; |
ba078d1b LW |
241 | |
242 | mmcsd: mmcsd@c0001000 { | |
243 | compatible = "arm,pl18x", "arm,primecell"; | |
244 | reg = <0xc0001000 0x1000>; | |
245 | interrupt-parent = <&vicb>; | |
246 | interrupts = <6 7>; | |
247 | max-frequency = <24000000>; | |
248 | bus-width = <4>; // SD-card slot | |
249 | mmc-cap-mmc-highspeed; | |
250 | mmc-cap-sd-highspeed; | |
251 | cd-gpios = <&gpio 12 0x4>; | |
252 | cd-inverted; | |
253 | vmmc-supply = <&ab3100_ldo_g_reg>; | |
efb9bc2e LW |
254 | dmas = <&dmac 14>; |
255 | dma-names = "rx"; | |
ba078d1b | 256 | }; |
cf4af867 LW |
257 | |
258 | spi: ssp@c0006000 { | |
259 | compatible = "arm,pl022", "arm,primecell"; | |
260 | reg = <0xc0006000 0x1000>; | |
261 | interrupt-parent = <&vica>; | |
262 | interrupts = <23>; | |
263 | dmas = <&dmac 27 &dmac 28>; | |
264 | dma-names = "tx", "rx"; | |
265 | num-cs = <3>; | |
266 | #address-cells = <1>; | |
267 | #size-cells = <0>; | |
20d4af68 LW |
268 | spi-dummy@1 { |
269 | compatible = "arm,pl022-dummy"; | |
270 | reg = <1>; | |
271 | spi-max-frequency = <20000000>; | |
272 | }; | |
cf4af867 | 273 | }; |
978577ea LW |
274 | }; |
275 | }; |