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ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / stih407-clock.dtsi
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1/*
2 * Copyright (C) 2014 STMicroelectronics R&D Limited
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/ {
9 clocks {
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10 #address-cells = <1>;
11 #size-cells = <1>;
12 ranges;
13
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14 /*
15 * Fixed 30MHz oscillator inputs to SoC
16 */
17 clk_sysin: clk-sysin {
18 #clock-cells = <0>;
19 compatible = "fixed-clock";
20 clock-frequency = <30000000>;
21 };
22
23 /*
24 * ARM Peripheral clock for timers
25 */
26 arm_periph_clk: arm-periph-clk {
27 #clock-cells = <0>;
28 compatible = "fixed-clock";
29 clock-frequency = <600000000>;
30 };
31
32 /*
33 * Bootloader initialized system infrastructure clock for
34 * serial devices.
35 */
36 clk_ext2f_a9: clockgen-c0@13 {
37 #clock-cells = <0>;
38 compatible = "fixed-clock";
39 clock-frequency = <200000000>;
40 clock-output-names = "clk-s-icn-reg-0";
41 };
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42
43 clockgen-a@090ff000 {
44 compatible = "st,clkgen-c32";
45 reg = <0x90ff000 0x1000>;
46
47 clk_s_a0_pll: clk-s-a0-pll {
48 #clock-cells = <1>;
49 compatible = "st,stih407-plls-c32-a0", "st,clkgen-plls-c32";
50
51 clocks = <&clk_sysin>;
52
53 clock-output-names = "clk-s-a0-pll-ofd-0";
54 };
55
56 clk_s_a0_flexgen: clk-s-a0-flexgen {
57 compatible = "st,flexgen";
58
59 #clock-cells = <1>;
60
61 clocks = <&clk_s_a0_pll 0>,
62 <&clk_sysin>;
63
64 clock-output-names = "clk-ic-lmi0";
65 };
66 };
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67 };
68};