[mirror_ubuntu-zesty-kernel.git] / arch / arm / boot / dts / stih407-pinctrl.dtsi

/*
 * Copyright (C) 2014 STMicroelectronics Limited.
 * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * publishhed by the Free Software Foundation.
 */
#include "st-pincfg.h"
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {

	aliases {
		/* 0-5: PIO_SBC */
		gpio0 = &pio0;
		gpio1 = &pio1;
		gpio2 = &pio2;
		gpio3 = &pio3;
		gpio4 = &pio4;
		gpio5 = &pio5;
		/* 10-19: PIO_FRONT0 */
		gpio6 = &pio10;
		gpio7 = &pio11;
		gpio8 = &pio12;
		gpio9 = &pio13;
		gpio10 = &pio14;
		gpio11 = &pio15;
		gpio12 = &pio16;
		gpio13 = &pio17;
		gpio14 = &pio18;
		gpio15 = &pio19;
		/* 20: PIO_FRONT1 */
		gpio16 = &pio20;
		/* 30-35: PIO_REAR */
		gpio17 = &pio30;
		gpio18 = &pio31;
		gpio19 = &pio32;
		gpio20 = &pio33;
		gpio21 = &pio34;
		gpio22 = &pio35;
		/* 40-42: PIO_FLASH */
		gpio23 = &pio40;
		gpio24 = &pio41;
		gpio25 = &pio42;
	};

	soc {
		pin-controller-sbc {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "st,stih407-sbc-pinctrl";
			st,syscfg = <&syscfg_sbc>;
			reg = <0x0961f080 0x4>;
			reg-names = "irqmux";
			interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;
			interrupts-names = "irqmux";
			ranges = <0 0x09610000 0x6000>;

			pio0: gpio@09610000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x0 0x100>;
				st,bank-name = "PIO0";
			};
			pio1: gpio@09611000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x1000 0x100>;
				st,bank-name = "PIO1";
			};
			pio2: gpio@09612000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x2000 0x100>;
				st,bank-name = "PIO2";
			};
			pio3: gpio@09613000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x3000 0x100>;
				st,bank-name = "PIO3";
			};
			pio4: gpio@09614000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x4000 0x100>;
				st,bank-name = "PIO4";
			};

			pio5: gpio@09615000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x5000 0x100>;
				st,bank-name = "PIO5";
				st,retime-pin-mask = <0x3f>;
			};

			rc {
				pinctrl_ir: ir0 {
					st,pins {
						ir = <&pio4 0 ALT2 IN>;
					};
				};
			};

			/* SBC_ASC0 - UART10 */
			sbc_serial0 {
				pinctrl_sbc_serial0: sbc_serial0-0 {
					st,pins {
						tx = <&pio3 4 ALT1 OUT>;
						rx = <&pio3 5 ALT1 IN>;
					};
				};
			};
			/* SBC_ASC1 - UART11 */
			sbc_serial1 {
				pinctrl_sbc_serial1: sbc_serial1-0 {
					st,pins {
						tx = <&pio2 6 ALT3 OUT>;
						rx = <&pio2 7 ALT3 IN>;
					};
				};
			};

			i2c10 {
				pinctrl_i2c10_default: i2c10-default {
					st,pins {
						sda = <&pio4 6 ALT1 BIDIR>;
						scl = <&pio4 5 ALT1 BIDIR>;
					};
				};
			};

			i2c11 {
				pinctrl_i2c11_default: i2c11-default {
					st,pins {
						sda = <&pio5 1 ALT1 BIDIR>;
						scl = <&pio5 0 ALT1 BIDIR>;
					};
				};
			};

			keyscan {
				pinctrl_keyscan: keyscan {
					st,pins {
						keyin0 = <&pio4 0 ALT6 IN>;
						keyin1 = <&pio4 5 ALT4 IN>;
						keyin2 = <&pio0 4 ALT2 IN>;
						keyin3 = <&pio2 6 ALT2 IN>;

						keyout0 = <&pio4 6 ALT4 OUT>;
						keyout1 = <&pio1 7 ALT2 OUT>;
						keyout2 = <&pio0 6 ALT2 OUT>;
						keyout3 = <&pio2 7 ALT2 OUT>;
					};
				};
			};

			gmac1 {
				/*
				 * Almost all the boards based on STiH407 SoC have an embedded
				 * switch where the mdio/mdc have been used for managing the SMI
				 * iface via I2C. For this reason these lines can be allocated
				 * by using dedicated configuration (in case of there will be a
				 * standard PHY transceiver on-board).
				 */
				pinctrl_rgmii1: rgmii1-0 {
					st,pins {

						txd0 = <&pio0 0 ALT1 OUT DE_IO 0 CLK_A>;
						txd1 = <&pio0 1 ALT1 OUT DE_IO 0 CLK_A>;
						txd2 = <&pio0 2 ALT1 OUT DE_IO 0 CLK_A>;
						txd3 = <&pio0 3 ALT1 OUT DE_IO 0 CLK_A>;
						txen = <&pio0 5 ALT1 OUT DE_IO 0 CLK_A>;
						txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
						rxd0 = <&pio1 4 ALT1 IN DE_IO 0 CLK_A>;
						rxd1 = <&pio1 5 ALT1 IN DE_IO 0 CLK_A>;
						rxd2 = <&pio1 6 ALT1 IN DE_IO 0 CLK_A>;
						rxd3 = <&pio1 7 ALT1 IN DE_IO 0 CLK_A>;
						rxdv = <&pio2 0 ALT1 IN DE_IO 0 CLK_A>;
						rxclk = <&pio2 2 ALT1 IN NICLK 500 CLK_A>;
						clk125 = <&pio3 7 ALT4 IN NICLK 0 CLK_A>;
						phyclk = <&pio2 3 ALT4 OUT NICLK 1750 CLK_B>;
					};
				};

				pinctrl_rgmii1_mdio: rgmii1-mdio {
					st,pins {
						mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
						mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
						mdint = <&pio1 3 ALT1 IN BYPASS 0>;
					};
				};

				pinctrl_mii1: mii1 {
					st,pins {
						txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
						txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
						txd2 = <&pio0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
						txd3 = <&pio0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
						txer = <&pio0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
						txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
						txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
						col = <&pio0 7 ALT1 IN BYPASS 1000>;

						mdio = <&pio1 0 ALT1 OUT BYPASS 1500>;
						mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
						crs = <&pio1 2 ALT1 IN BYPASS 1000>;
						mdint = <&pio1 3 ALT1 IN BYPASS 0>;
						rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
						rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
						rxd2 = <&pio1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
						rxd3 = <&pio1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;

						rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
						rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
						rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;
						phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
					};
				};
			};

			pwm1 {
				pinctrl_pwm1_chan0_default: pwm1-0-default {
					st,pins {
						pwm-out = <&pio3 0 ALT1 OUT>;
					};
				};
				pinctrl_pwm1_chan1_default: pwm1-1-default {
					st,pins {
						pwm-out = <&pio4 4 ALT1 OUT>;
					};
				};
				pinctrl_pwm1_chan2_default: pwm1-2-default {
					st,pins {
						pwm-out = <&pio4 6 ALT3 OUT>;
					};
				};
				pinctrl_pwm1_chan3_default: pwm1-3-default {
					st,pins {
						pwm-out = <&pio4 7 ALT3 OUT>;
					};
				};
			};
		};

		pin-controller-front0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "st,stih407-front-pinctrl";
			st,syscfg = <&syscfg_front>;
			reg = <0x0920f080 0x4>;
			reg-names = "irqmux";
			interrupts = <GIC_SPI 189 IRQ_TYPE_NONE>;
			interrupts-names = "irqmux";
			ranges = <0 0x09200000 0x10000>;

			pio10: pio@09200000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x0 0x100>;
				st,bank-name = "PIO10";
			};
			pio11: pio@09201000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x1000 0x100>;
				st,bank-name = "PIO11";
			};
			pio12: pio@09202000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x2000 0x100>;
				st,bank-name = "PIO12";
			};
			pio13: pio@09203000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x3000 0x100>;
				st,bank-name = "PIO13";
			};
			pio14: pio@09204000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x4000 0x100>;
				st,bank-name = "PIO14";
			};
			pio15: pio@09205000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x5000 0x100>;
				st,bank-name = "PIO15";
			};
			pio16: pio@09206000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x6000 0x100>;
				st,bank-name = "PIO16";
			};
			pio17: pio@09207000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x7000 0x100>;
				st,bank-name = "PIO17";
			};
			pio18: pio@09208000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x8000 0x100>;
				st,bank-name = "PIO18";
			};
			pio19: pio@09209000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x9000 0x100>;
				st,bank-name = "PIO19";
			};

			/* Comms */
			serial0 {
				pinctrl_serial0: serial0-0 {
					st,pins {
						tx = <&pio17 0 ALT1 OUT>;
						rx = <&pio17 1 ALT1 IN>;
					};
				};
			};

			serial1 {
				pinctrl_serial1: serial1-0 {
					st,pins {
						tx = <&pio16 0 ALT1 OUT>;
						rx = <&pio16 1 ALT1 IN>;
					};
				};
			};

			serial2 {
				pinctrl_serial2: serial2-0 {
					st,pins {
						tx = <&pio15 0 ALT1 OUT>;
						rx = <&pio15 1 ALT1 IN>;
					};
				};
			};

			mmc1 {
				pinctrl_sd1: sd1-0 {
					st,pins {
						sd_clk = <&pio19 3 ALT5 BIDIR NICLK 0 CLK_B>;
						sd_cmd = <&pio19 2 ALT5 BIDIR_PU BYPASS 0>;
						sd_dat0 = <&pio19 4 ALT5 BIDIR_PU BYPASS 0>;
						sd_dat1 = <&pio19 5 ALT5 BIDIR_PU BYPASS 0>;
						sd_dat2 = <&pio19 6 ALT5 BIDIR_PU BYPASS 0>;
						sd_dat3 = <&pio19 7 ALT5 BIDIR_PU BYPASS 0>;
						sd_led = <&pio16 6 ALT6 OUT>;
						sd_pwren = <&pio16 7 ALT6 OUT>;
						sd_cd = <&pio19 0 ALT6 IN>;
						sd_wp = <&pio19 1 ALT6 IN>;
					};
				};
			};


			i2c0 {
				pinctrl_i2c0_default: i2c0-default {
					st,pins {
						sda = <&pio10 6 ALT2 BIDIR>;
						scl = <&pio10 5 ALT2 BIDIR>;
					};
				};
			};

			i2c1 {
				pinctrl_i2c1_default: i2c1-default {
					st,pins {
						sda = <&pio11 1 ALT2 BIDIR>;
						scl = <&pio11 0 ALT2 BIDIR>;
					};
				};
			};

			i2c2 {
				pinctrl_i2c2_default: i2c2-default {
					st,pins {
						sda = <&pio15 6 ALT2 BIDIR>;
						scl = <&pio15 5 ALT2 BIDIR>;
					};
				};
			};

			i2c3 {
				pinctrl_i2c3_default: i2c3-default {
					st,pins {
						sda = <&pio18 6 ALT1 BIDIR>;
						scl = <&pio18 5 ALT1 BIDIR>;
					};
				};
			};

			spi0 {
				pinctrl_spi0_default: spi0-default {
					st,pins {
						mtsr = <&pio12 6 ALT2 BIDIR>;
						mrst = <&pio12 7 ALT2 BIDIR>;
						scl = <&pio12 5 ALT2 BIDIR>;
					};
				};
			};
		};

		pin-controller-front1 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "st,stih407-front-pinctrl";
			st,syscfg = <&syscfg_front>;
			reg = <0x0921f080 0x4>;
			reg-names = "irqmux";
			interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
			interrupts-names = "irqmux";
			ranges = <0 0x09210000 0x10000>;

			pio20: pio@09210000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x0 0x100>;
				st,bank-name = "PIO20";
			};
		};

		pin-controller-rear {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "st,stih407-rear-pinctrl";
			st,syscfg = <&syscfg_rear>;
			reg = <0x0922f080 0x4>;
			reg-names = "irqmux";
			interrupts = <GIC_SPI 191 IRQ_TYPE_NONE>;
			interrupts-names = "irqmux";
			ranges = <0 0x09220000 0x6000>;

			pio30: gpio@09220000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x0 0x100>;
				st,bank-name = "PIO30";
			};
			pio31: gpio@09221000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x1000 0x100>;
				st,bank-name = "PIO31";
			};
			pio32: gpio@09222000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x2000 0x100>;
				st,bank-name = "PIO32";
			};
			pio33: gpio@09223000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x3000 0x100>;
				st,bank-name = "PIO33";
			};
			pio34: gpio@09224000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x4000 0x100>;
				st,bank-name = "PIO34";
			};
			pio35: gpio@09225000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x5000 0x100>;
				st,bank-name = "PIO35";
				st,retime-pin-mask = <0x7f>;
			};

			i2c4 {
				pinctrl_i2c4_default: i2c4-default {
					st,pins {
						sda = <&pio30 1 ALT1 BIDIR>;
						scl = <&pio30 0 ALT1 BIDIR>;
					};
				};
			};

			i2c5 {
				pinctrl_i2c5_default: i2c5-default {
					st,pins {
						sda = <&pio34 4 ALT1 BIDIR>;
						scl = <&pio34 3 ALT1 BIDIR>;
					};
				};
			};

			usb3 {
				pinctrl_usb3: usb3-2 {
					st,pins {
						usb-oc-detect = <&pio35 4 ALT1 IN>;
						usb-pwr-enable = <&pio35 5 ALT1 OUT>;
						usb-vbus-valid = <&pio35 6 ALT1 IN>;
					};
				};
			};

			pwm0 {
				pinctrl_pwm0_chan0_default: pwm0-0-default {
					st,pins {
						pwm-out = <&pio31 1 ALT1 OUT>;
					};
				};
			};
		};

		pin-controller-flash {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "st,stih407-flash-pinctrl";
			st,syscfg = <&syscfg_flash>;
			reg = <0x0923f080 0x4>;
			reg-names = "irqmux";
			interrupts = <GIC_SPI 192 IRQ_TYPE_NONE>;
			interrupts-names = "irqmux";
			ranges = <0 0x09230000 0x3000>;

			pio40: gpio@09230000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0 0x100>;
				st,bank-name = "PIO40";
			};
			pio41: gpio@09231000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x1000 0x100>;
				st,bank-name = "PIO41";
			};
			pio42: gpio@09232000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x2000 0x100>;
				st,bank-name = "PIO42";
			};

			mmc0 {
				pinctrl_mmc0: mmc0-0 {
					st,pins {
						emmc_clk = <&pio40 6 ALT1 BIDIR>;
						emmc_cmd = <&pio40 7 ALT1 BIDIR_PU>;
						emmc_d0 = <&pio41 0 ALT1 BIDIR_PU>;
						emmc_d1 = <&pio41 1 ALT1 BIDIR_PU>;
						emmc_d2 = <&pio41 2 ALT1 BIDIR_PU>;
						emmc_d3 = <&pio41 3 ALT1 BIDIR_PU>;
						emmc_d4 = <&pio41 4 ALT1 BIDIR_PU>;
						emmc_d5 = <&pio41 5 ALT1 BIDIR_PU>;
						emmc_d6 = <&pio41 6 ALT1 BIDIR_PU>;
						emmc_d7 = <&pio41 7 ALT1 BIDIR_PU>;
					};
				};
			};
		};
	};
};
Commit	Line	Data
f563a571 MC	1	/*
	2	* Copyright (C) 2014 STMicroelectronics Limited.
	3	* Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* publishhed by the Free Software Foundation.
	8	*/
	9	#include "st-pincfg.h"
	10	#include <dt-bindings/interrupt-controller/arm-gic.h>
	11	/ {
	12
	13	aliases {
	14	/* 0-5: PIO_SBC */
	15	gpio0 = &pio0;
	16	gpio1 = &pio1;
	17	gpio2 = &pio2;
	18	gpio3 = &pio3;
	19	gpio4 = &pio4;
	20	gpio5 = &pio5;
	21	/* 10-19: PIO_FRONT0 */
	22	gpio6 = &pio10;
	23	gpio7 = &pio11;
	24	gpio8 = &pio12;
	25	gpio9 = &pio13;
	26	gpio10 = &pio14;
	27	gpio11 = &pio15;
	28	gpio12 = &pio16;
	29	gpio13 = &pio17;
	30	gpio14 = &pio18;
	31	gpio15 = &pio19;
	32	/* 20: PIO_FRONT1 */
	33	gpio16 = &pio20;
	34	/* 30-35: PIO_REAR */
	35	gpio17 = &pio30;
	36	gpio18 = &pio31;
	37	gpio19 = &pio32;
	38	gpio20 = &pio33;
	39	gpio21 = &pio34;
	40	gpio22 = &pio35;
	41	/* 40-42: PIO_FLASH */
	42	gpio23 = &pio40;
	43	gpio24 = &pio41;
	44	gpio25 = &pio42;
	45	};
	46
	47	soc {
	48	pin-controller-sbc {
	49	#address-cells = <1>;
	50	#size-cells = <1>;
	51	compatible = "st,stih407-sbc-pinctrl";
	52	st,syscfg = <&syscfg_sbc>;
	53	reg = <0x0961f080 0x4>;
	54	reg-names = "irqmux";
	55	interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;
	56	interrupts-names = "irqmux";
	57	ranges = <0 0x09610000 0x6000>;
	58
	59	pio0: gpio@09610000 {
	60	gpio-controller;
	61	#gpio-cells = <1>;
	62	interrupt-controller;
	63	#interrupt-cells = <2>;
	64	reg = <0x0 0x100>;
65	st,bank-name = "PIO0";
66	};
67	pio1: gpio@09611000 {
68	gpio-controller;
69	#gpio-cells = <1>;
70	interrupt-controller;
71	#interrupt-cells = <2>;
72	reg = <0x1000 0x100>;
73	st,bank-name = "PIO1";
74	};
75	pio2: gpio@09612000 {
76	gpio-controller;
77	#gpio-cells = <1>;
78	interrupt-controller;
79	#interrupt-cells = <2>;
80	reg = <0x2000 0x100>;
81	st,bank-name = "PIO2";
82	};
83	pio3: gpio@09613000 {
84	gpio-controller;
85	#gpio-cells = <1>;
86	interrupt-controller;
87	#interrupt-cells = <2>;
88	reg = <0x3000 0x100>;
89	st,bank-name = "PIO3";
90	};
91	pio4: gpio@09614000 {
92	gpio-controller;
93	#gpio-cells = <1>;
94	interrupt-controller;
95	#interrupt-cells = <2>;
96	reg = <0x4000 0x100>;
97	st,bank-name = "PIO4";
98	};
99
100	pio5: gpio@09615000 {
101	gpio-controller;
102	#gpio-cells = <1>;
103	interrupt-controller;
104	#interrupt-cells = <2>;
105	reg = <0x5000 0x100>;
106	st,bank-name = "PIO5";
d90accb9	107	st,retime-pin-mask = <0x3f>;
f563a571 MC	108	};
	109
	110	rc {
	111	pinctrl_ir: ir0 {
	112	st,pins {
	113	ir = <&pio4 0 ALT2 IN>;
	114	};
	115	};
	116	};
	117
	118	/* SBC_ASC0 - UART10 */
	119	sbc_serial0 {
	120	pinctrl_sbc_serial0: sbc_serial0-0 {
	121	st,pins {
	122	tx = <&pio3 4 ALT1 OUT>;
	123	rx = <&pio3 5 ALT1 IN>;
	124	};
	125	};
	126	};
	127	/* SBC_ASC1 - UART11 */
	128	sbc_serial1 {
	129	pinctrl_sbc_serial1: sbc_serial1-0 {
	130	st,pins {
	131	tx = <&pio2 6 ALT3 OUT>;
	132	rx = <&pio2 7 ALT3 IN>;
	133	};
	134	};
	135	};
	136
	137	i2c10 {
	138	pinctrl_i2c10_default: i2c10-default {
	139	st,pins {
	140	sda = <&pio4 6 ALT1 BIDIR>;
	141	scl = <&pio4 5 ALT1 BIDIR>;
	142	};
	143	};
	144	};
	145
	146	i2c11 {
	147	pinctrl_i2c11_default: i2c11-default {
	148	st,pins {
	149	sda = <&pio5 1 ALT1 BIDIR>;
	150	scl = <&pio5 0 ALT1 BIDIR>;
	151	};
	152	};
	153	};
	154
	155	keyscan {
	156	pinctrl_keyscan: keyscan {
	157	st,pins {
	158	keyin0 = <&pio4 0 ALT6 IN>;
	159	keyin1 = <&pio4 5 ALT4 IN>;
	160	keyin2 = <&pio0 4 ALT2 IN>;
	161	keyin3 = <&pio2 6 ALT2 IN>;
	162
	163	keyout0 = <&pio4 6 ALT4 OUT>;
	164	keyout1 = <&pio1 7 ALT2 OUT>;
	165	keyout2 = <&pio0 6 ALT2 OUT>;
	166	keyout3 = <&pio2 7 ALT2 OUT>;
	167	};
	168	};
	169	};
	170
	171	gmac1 {
172	/*
173	* Almost all the boards based on STiH407 SoC have an embedded
174	* switch where the mdio/mdc have been used for managing the SMI
175	* iface via I2C. For this reason these lines can be allocated
176	* by using dedicated configuration (in case of there will be a
177	* standard PHY transceiver on-board).
178	*/
179	pinctrl_rgmii1: rgmii1-0 {
180	st,pins {
181
182	txd0 = <&pio0 0 ALT1 OUT DE_IO 0 CLK_A>;
183	txd1 = <&pio0 1 ALT1 OUT DE_IO 0 CLK_A>;
184	txd2 = <&pio0 2 ALT1 OUT DE_IO 0 CLK_A>;
185	txd3 = <&pio0 3 ALT1 OUT DE_IO 0 CLK_A>;
186	txen = <&pio0 5 ALT1 OUT DE_IO 0 CLK_A>;
187	txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
188	rxd0 = <&pio1 4 ALT1 IN DE_IO 0 CLK_A>;
189	rxd1 = <&pio1 5 ALT1 IN DE_IO 0 CLK_A>;
190	rxd2 = <&pio1 6 ALT1 IN DE_IO 0 CLK_A>;
191	rxd3 = <&pio1 7 ALT1 IN DE_IO 0 CLK_A>;
192	rxdv = <&pio2 0 ALT1 IN DE_IO 0 CLK_A>;
193	rxclk = <&pio2 2 ALT1 IN NICLK 500 CLK_A>;
194	clk125 = <&pio3 7 ALT4 IN NICLK 0 CLK_A>;
195	phyclk = <&pio2 3 ALT4 OUT NICLK 1750 CLK_B>;
196	};
197	};
198
199	pinctrl_rgmii1_mdio: rgmii1-mdio {
200	st,pins {
201	mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
202	mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
203	mdint = <&pio1 3 ALT1 IN BYPASS 0>;
204	};
205	};
206
207	pinctrl_mii1: mii1 {
208	st,pins {
209	txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
210	txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
211	txd2 = <&pio0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
212	txd3 = <&pio0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
213	txer = <&pio0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
214	txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
215	txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
216	col = <&pio0 7 ALT1 IN BYPASS 1000>;
217
218	mdio = <&pio1 0 ALT1 OUT BYPASS 1500>;
219	mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
220	crs = <&pio1 2 ALT1 IN BYPASS 1000>;
221	mdint = <&pio1 3 ALT1 IN BYPASS 0>;
222	rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
223	rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
224	rxd2 = <&pio1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
225	rxd3 = <&pio1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;
226
227	rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
228	rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
229	rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;
230	phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
231	};
232	};
233	};
234
235	pwm1 {
236	pinctrl_pwm1_chan0_default: pwm1-0-default {
237	st,pins {
238	pwm-out = <&pio3 0 ALT1 OUT>;
239	};
240	};
241	pinctrl_pwm1_chan1_default: pwm1-1-default {
242	st,pins {
243	pwm-out = <&pio4 4 ALT1 OUT>;
244	};
245	};
246	pinctrl_pwm1_chan2_default: pwm1-2-default {
247	st,pins {
248	pwm-out = <&pio4 6 ALT3 OUT>;
249	};
250	};
251	pinctrl_pwm1_chan3_default: pwm1-3-default {
252	st,pins {
253	pwm-out = <&pio4 7 ALT3 OUT>;
254	};
255	};
256	};
257	};
258
259	pin-controller-front0 {
260	#address-cells = <1>;
261	#size-cells = <1>;
262	compatible = "st,stih407-front-pinctrl";
263	st,syscfg = <&syscfg_front>;
264	reg = <0x0920f080 0x4>;
265	reg-names = "irqmux";
266	interrupts = <GIC_SPI 189 IRQ_TYPE_NONE>;
267	interrupts-names = "irqmux";
268	ranges = <0 0x09200000 0x10000>;
269
270	pio10: pio@09200000 {
271	gpio-controller;
272	#gpio-cells = <1>;
273	interrupt-controller;
274	#interrupt-cells = <2>;
275	reg = <0x0 0x100>;
276	st,bank-name = "PIO10";
277	};
278	pio11: pio@09201000 {
279	gpio-controller;
280	#gpio-cells = <1>;
281	interrupt-controller;
282	#interrupt-cells = <2>;
283	reg = <0x1000 0x100>;
284	st,bank-name = "PIO11";
285	};
286	pio12: pio@09202000 {
287	gpio-controller;
288	#gpio-cells = <1>;
289	interrupt-controller;
290	#interrupt-cells = <2>;
291	reg = <0x2000 0x100>;
292	st,bank-name = "PIO12";
293	};
294	pio13: pio@09203000 {
295	gpio-controller;
296	#gpio-cells = <1>;
297	interrupt-controller;
298	#interrupt-cells = <2>;
299	reg = <0x3000 0x100>;
300	st,bank-name = "PIO13";
301	};
302	pio14: pio@09204000 {
303	gpio-controller;
304	#gpio-cells = <1>;
305	interrupt-controller;
306	#interrupt-cells = <2>;
307	reg = <0x4000 0x100>;
308	st,bank-name = "PIO14";
309	};
310	pio15: pio@09205000 {
311	gpio-controller;
312	#gpio-cells = <1>;
313	interrupt-controller;
314	#interrupt-cells = <2>;
315	reg = <0x5000 0x100>;
316	st,bank-name = "PIO15";
317	};
318	pio16: pio@09206000 {
319	gpio-controller;
320	#gpio-cells = <1>;
321	interrupt-controller;
322	#interrupt-cells = <2>;
323	reg = <0x6000 0x100>;
324	st,bank-name = "PIO16";
325	};
326	pio17: pio@09207000 {
327	gpio-controller;
328	#gpio-cells = <1>;
329	interrupt-controller;
330	#interrupt-cells = <2>;
331	reg = <0x7000 0x100>;
332	st,bank-name = "PIO17";
333	};
334	pio18: pio@09208000 {
335	gpio-controller;
336	#gpio-cells = <1>;
337	interrupt-controller;
338	#interrupt-cells = <2>;
339	reg = <0x8000 0x100>;
340	st,bank-name = "PIO18";
341	};
342	pio19: pio@09209000 {
343	gpio-controller;
344	#gpio-cells = <1>;
345	interrupt-controller;
346	#interrupt-cells = <2>;
347	reg = <0x9000 0x100>;
348	st,bank-name = "PIO19";
349	};
350
351	/* Comms */
352	serial0 {
353	pinctrl_serial0: serial0-0 {
354	st,pins {
355	tx = <&pio17 0 ALT1 OUT>;
356	rx = <&pio17 1 ALT1 IN>;
357	};
358	};
359	};
360
361	serial1 {
362	pinctrl_serial1: serial1-0 {
363	st,pins {
364	tx = <&pio16 0 ALT1 OUT>;
365	rx = <&pio16 1 ALT1 IN>;
366	};
367	};
368	};
369
370	serial2 {
371	pinctrl_serial2: serial2-0 {
372	st,pins {
373	tx = <&pio15 0 ALT1 OUT>;
374	rx = <&pio15 1 ALT1 IN>;
375	};
376	};
377	};
378
379	mmc1 {
380	pinctrl_sd1: sd1-0 {
381	st,pins {
382	sd_clk = <&pio19 3 ALT5 BIDIR NICLK 0 CLK_B>;
383	sd_cmd = <&pio19 2 ALT5 BIDIR_PU BYPASS 0>;
384	sd_dat0 = <&pio19 4 ALT5 BIDIR_PU BYPASS 0>;
385	sd_dat1 = <&pio19 5 ALT5 BIDIR_PU BYPASS 0>;
386	sd_dat2 = <&pio19 6 ALT5 BIDIR_PU BYPASS 0>;
387	sd_dat3 = <&pio19 7 ALT5 BIDIR_PU BYPASS 0>;
388	sd_led = <&pio16 6 ALT6 OUT>;
389	sd_pwren = <&pio16 7 ALT6 OUT>;
390	sd_cd = <&pio19 0 ALT6 IN>;
391	sd_wp = <&pio19 1 ALT6 IN>;
392	};
393	};
394	};
395
396
397	i2c0 {
398	pinctrl_i2c0_default: i2c0-default {
399	st,pins {
400	sda = <&pio10 6 ALT2 BIDIR>;
401	scl = <&pio10 5 ALT2 BIDIR>;
402	};
403	};
404	};
405
406	i2c1 {
407	pinctrl_i2c1_default: i2c1-default {
408	st,pins {
409	sda = <&pio11 1 ALT2 BIDIR>;
410	scl = <&pio11 0 ALT2 BIDIR>;
411	};
412	};
413	};
414
415	i2c2 {
416	pinctrl_i2c2_default: i2c2-default {
417	st,pins {
418	sda = <&pio15 6 ALT2 BIDIR>;
419	scl = <&pio15 5 ALT2 BIDIR>;
420	};
421	};
422	};
423
424	i2c3 {
425	pinctrl_i2c3_default: i2c3-default {
426	st,pins {
427	sda = <&pio18 6 ALT1 BIDIR>;
428	scl = <&pio18 5 ALT1 BIDIR>;
429	};
430	};
431	};
432
433	spi0 {
434	pinctrl_spi0_default: spi0-default {
435	st,pins {
436	mtsr = <&pio12 6 ALT2 BIDIR>;
437	mrst = <&pio12 7 ALT2 BIDIR>;
438	scl = <&pio12 5 ALT2 BIDIR>;
439	};
440	};
441	};
442	};
443
444	pin-controller-front1 {
445	#address-cells = <1>;
446	#size-cells = <1>;
447	compatible = "st,stih407-front-pinctrl";
448	st,syscfg = <&syscfg_front>;
449	reg = <0x0921f080 0x4>;
450	reg-names = "irqmux";
451	interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
452	interrupts-names = "irqmux";
453	ranges = <0 0x09210000 0x10000>;
454
455	pio20: pio@09210000 {
456	gpio-controller;
457	#gpio-cells = <1>;
458	interrupt-controller;
459	#interrupt-cells = <2>;
460	reg = <0x0 0x100>;
461	st,bank-name = "PIO20";
462	};
463	};
464
465	pin-controller-rear {
466	#address-cells = <1>;
467	#size-cells = <1>;
468	compatible = "st,stih407-rear-pinctrl";
469	st,syscfg = <&syscfg_rear>;
470	reg = <0x0922f080 0x4>;
471	reg-names = "irqmux";
472	interrupts = <GIC_SPI 191 IRQ_TYPE_NONE>;
473	interrupts-names = "irqmux";
474	ranges = <0 0x09220000 0x6000>;
475
476	pio30: gpio@09220000 {
477	gpio-controller;
478	#gpio-cells = <1>;
479	interrupt-controller;
480	#interrupt-cells = <2>;
481	reg = <0x0 0x100>;
482	st,bank-name = "PIO30";
483	};
484	pio31: gpio@09221000 {
485	gpio-controller;
486	#gpio-cells = <1>;
487	interrupt-controller;
488	#interrupt-cells = <2>;
489	reg = <0x1000 0x100>;
490	st,bank-name = "PIO31";
491	};
492	pio32: gpio@09222000 {
493	gpio-controller;
494	#gpio-cells = <1>;
495	interrupt-controller;
496	#interrupt-cells = <2>;
497	reg = <0x2000 0x100>;
498	st,bank-name = "PIO32";
499	};
500	pio33: gpio@09223000 {
501	gpio-controller;
502	#gpio-cells = <1>;
503	interrupt-controller;
504	#interrupt-cells = <2>;
505	reg = <0x3000 0x100>;
506	st,bank-name = "PIO33";
507	};
508	pio34: gpio@09224000 {
509	gpio-controller;
510	#gpio-cells = <1>;
511	interrupt-controller;
512	#interrupt-cells = <2>;
513	reg = <0x4000 0x100>;
514	st,bank-name = "PIO34";
515	};
516	pio35: gpio@09225000 {
517	gpio-controller;
518	#gpio-cells = <1>;
519	interrupt-controller;
520	#interrupt-cells = <2>;
521	reg = <0x5000 0x100>;
522	st,bank-name = "PIO35";
d90accb9	523	st,retime-pin-mask = <0x7f>;
f563a571 MC	524	};
	525
	526	i2c4 {
	527	pinctrl_i2c4_default: i2c4-default {
	528	st,pins {
	529	sda = <&pio30 1 ALT1 BIDIR>;
	530	scl = <&pio30 0 ALT1 BIDIR>;
	531	};
	532	};
	533	};
	534
	535	i2c5 {
	536	pinctrl_i2c5_default: i2c5-default {
	537	st,pins {
	538	sda = <&pio34 4 ALT1 BIDIR>;
	539	scl = <&pio34 3 ALT1 BIDIR>;
	540	};
	541	};
	542	};
	543
	544	usb3 {
	545	pinctrl_usb3: usb3-2 {
	546	st,pins {
	547	usb-oc-detect = <&pio35 4 ALT1 IN>;
	548	usb-pwr-enable = <&pio35 5 ALT1 OUT>;
	549	usb-vbus-valid = <&pio35 6 ALT1 IN>;
	550	};
	551	};
	552	};
	553
	554	pwm0 {
	555	pinctrl_pwm0_chan0_default: pwm0-0-default {
	556	st,pins {
	557	pwm-out = <&pio31 1 ALT1 OUT>;
	558	};
	559	};
	560	};
	561	};
	562
	563	pin-controller-flash {
	564	#address-cells = <1>;
	565	#size-cells = <1>;
	566	compatible = "st,stih407-flash-pinctrl";
	567	st,syscfg = <&syscfg_flash>;
	568	reg = <0x0923f080 0x4>;
	569	reg-names = "irqmux";
	570	interrupts = <GIC_SPI 192 IRQ_TYPE_NONE>;
	571	interrupts-names = "irqmux";
	572	ranges = <0 0x09230000 0x3000>;
	573
	574	pio40: gpio@09230000 {
	575	gpio-controller;
	576	#gpio-cells = <1>;
	577	interrupt-controller;
	578	#interrupt-cells = <2>;
	579	reg = <0 0x100>;
	580	st,bank-name = "PIO40";
	581	};
	582	pio41: gpio@09231000 {
	583	gpio-controller;
	584	#gpio-cells = <1>;
	585	interrupt-controller;
	586	#interrupt-cells = <2>;
	587	reg = <0x1000 0x100>;
588	st,bank-name = "PIO41";
589	};
590	pio42: gpio@09232000 {
591	gpio-controller;
592	#gpio-cells = <1>;
593	interrupt-controller;
594	#interrupt-cells = <2>;
595	reg = <0x2000 0x100>;
596	st,bank-name = "PIO42";
597	};
598
599	mmc0 {
600	pinctrl_mmc0: mmc0-0 {
601	st,pins {
602	emmc_clk = <&pio40 6 ALT1 BIDIR>;
603	emmc_cmd = <&pio40 7 ALT1 BIDIR_PU>;
604	emmc_d0 = <&pio41 0 ALT1 BIDIR_PU>;
605	emmc_d1 = <&pio41 1 ALT1 BIDIR_PU>;
606	emmc_d2 = <&pio41 2 ALT1 BIDIR_PU>;
607	emmc_d3 = <&pio41 3 ALT1 BIDIR_PU>;
608	emmc_d4 = <&pio41 4 ALT1 BIDIR_PU>;
609	emmc_d5 = <&pio41 5 ALT1 BIDIR_PU>;
610	emmc_d6 = <&pio41 6 ALT1 BIDIR_PU>;
611	emmc_d7 = <&pio41 7 ALT1 BIDIR_PU>;
612	};
613	};
614	};
615	};
616	};
617	};