[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / sun5i-r8-chip.dts

/*
 * Copyright 2015 Free Electrons
 * Copyright 2015 NextThing Co
 *
 * Maxime Ripard <maxime.ripard@free-electrons.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;
#include "sun5i-r8.dtsi"
#include "sunxi-common-regulators.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "NextThing C.H.I.P.";
	compatible = "nextthing,chip", "allwinner,sun5i-r8", "allwinner,sun5i-a13";

	aliases {
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		serial0 = &uart1;
		serial1 = &uart3;
		spi0 = &spi2;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	leds {
		compatible = "gpio-leds";

		status {
			label = "chip:white:status";
			gpios = <&axp_gpio 2 GPIO_ACTIVE_HIGH>;
			default-state = "on";
		};
	};

	mmc0_pwrseq: mmc0_pwrseq {
		compatible = "mmc-pwrseq-simple";
		pinctrl-names = "default";
		pinctrl-0 = <&chip_wifi_reg_on_pin>;
		reset-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */
	};

	onewire {
		compatible = "w1-gpio";
		gpios = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */
		pinctrl-names = "default";
		pinctrl-0 = <&chip_w1_pin>;
	};
};

&be0 {
	status = "okay";
};

&codec {
	status = "okay";
};

&cpu0 {
	cpu-supply = <&reg_dcdc2>;
};

&ehci0 {
	status = "okay";
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins_a>;
	status = "okay";

	axp209: pmic@34 {
		reg = <0x34>;

		/*
		 * The interrupt is routed through the "External Fast
		 * Interrupt Request" pin (ball G13 of the module)
		 * directly to the main interrupt controller, without
		 * any other controller interfering.
		 */
		interrupts = <0>;
	};
};

#include "axp209.dtsi"

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins_a>;
	status = "disabled";
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins_a>;
	status = "okay";

	xio: gpio@38 {
		compatible = "nxp,pcf8574a";
		reg = <0x38>;

		gpio-controller;
		#gpio-cells = <2>;

		interrupt-parent = <&pio>;
		interrupts = <6 0 IRQ_TYPE_EDGE_FALLING>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};
};

&mmc0_pins_a {
	bias-pull-up;
};

&mmc0 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc0_pins_a>;
	vmmc-supply = <&reg_vcc3v3>;
	mmc-pwrseq = <&mmc0_pwrseq>;
	bus-width = <4>;
	non-removable;
	status = "okay";
};

&ohci0 {
	status = "okay";
};

&otg_sram {
	status = "okay";
};

&pio {
	chip_vbus_pin: chip_vbus_pin@0 {
		pins = "PB10";
		function = "gpio_out";
	};

	chip_wifi_reg_on_pin: chip_wifi_reg_on_pin@0 {
	        pins = "PC19";
	        function = "gpio_out";
	};

	chip_id_det_pin: chip_id_det_pin@0 {
		pins = "PG2";
		function = "gpio_in";
	};

	chip_w1_pin: chip_w1_pin@0 {
		pins = "PD2";
		function = "gpio_in";
	        bias-pull-up;
	};
};

&reg_dcdc2 {
	regulator-min-microvolt = <1000000>;
	regulator-max-microvolt = <1400000>;
	regulator-name = "cpuvdd";
	regulator-always-on;
};

&reg_dcdc3 {
	regulator-min-microvolt = <1000000>;
	regulator-max-microvolt = <1300000>;
	regulator-name = "corevdd";
	regulator-always-on;
};

&reg_ldo1 {
	regulator-name = "rtcvdd";
};

&reg_ldo2 {
	regulator-min-microvolt = <2700000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "avcc";
	regulator-always-on;
};

/*
 * Both LDO3 and LDO4 are used in parallel to power up the WiFi/BT
 * Chip.
 *
 * If those are not enabled, the SDIO part will not enumerate, and
 * since there's no way currently to pass DT infos to an SDIO device,
 * we cannot really do better than this ugly hack for now.
 */
&reg_ldo3 {
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-wifi-1";
	regulator-always-on;
};

&reg_ldo4 {
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-wifi-2";
	regulator-always-on;
};

&reg_ldo5 {
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-name = "vcc-1v8";
};

&reg_usb0_vbus {
	pinctrl-0 = <&chip_vbus_pin>;
	vin-supply = <&reg_vcc5v0>;
	gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
	status = "okay";
};

&spi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi2_pins_a>;
	status = "disabled";
};

&tcon0 {
	status = "okay";
};

&tve0 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins_b>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins_a>,
		    <&uart3_pins_cts_rts_a>;
	status = "okay";
};

&usb_otg {
	dr_mode = "otg";
	status = "okay";
};

&usb_power_supply {
	status = "okay";
};

&usbphy {
	pinctrl-names = "default";
	pinctrl-0 = <&chip_id_det_pin>;
	status = "okay";

	usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
	usb0_vbus_power-supply = <&usb_power_supply>;
	usb0_vbus-supply = <&reg_usb0_vbus>;
	usb1_vbus-supply = <&reg_vcc5v0>;
};
Commit	Line	Data
465a225f MR	1	/*
	2	* Copyright 2015 Free Electrons
	3	* Copyright 2015 NextThing Co
	4	*
	5	* Maxime Ripard <maxime.ripard@free-electrons.com>
	6	*
	7	* This file is dual-licensed: you can use it either under the terms
	8	* of the GPL or the X11 license, at your option. Note that this dual
	9	* licensing only applies to this file, and not this project as a
	10	* whole.
	11	*
	12	* a) This file is free software; you can redistribute it and/or
	13	* modify it under the terms of the GNU General Public License as
	14	* published by the Free Software Foundation; either version 2 of the
	15	* License, or (at your option) any later version.
	16	*
	17	* This file is distributed in the hope that it will be useful,
	18	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	* GNU General Public License for more details.
	21	*
	22	* Or, alternatively,
	23	*
	24	* b) Permission is hereby granted, free of charge, to any person
	25	* obtaining a copy of this software and associated documentation
	26	* files (the "Software"), to deal in the Software without
	27	* restriction, including without limitation the rights to use,
	28	* copy, modify, merge, publish, distribute, sublicense, and/or
	29	* sell copies of the Software, and to permit persons to whom the
	30	* Software is furnished to do so, subject to the following
	31	* conditions:
	32	*
	33	* The above copyright notice and this permission notice shall be
	34	* included in all copies or substantial portions of the Software.
	35	*
	36	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	37	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	38	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	39	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	40	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	41	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	42	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	43	* OTHER DEALINGS IN THE SOFTWARE.
	44	*/
	45
	46	/dts-v1/;
	47	#include "sun5i-r8.dtsi"
	48	#include "sunxi-common-regulators.dtsi"
	49
	50	#include <dt-bindings/gpio/gpio.h>
	51	#include <dt-bindings/interrupt-controller/irq.h>
	52
	53	/ {
	54	model = "NextThing C.H.I.P.";
5fc39d34	55	compatible = "nextthing,chip", "allwinner,sun5i-r8", "allwinner,sun5i-a13";
465a225f MR	56
	57	aliases {
	58	i2c0 = &i2c0;
77df9d66	59	i2c1 = &i2c1;
465a225f MR	60	i2c2 = &i2c2;
	61	serial0 = &uart1;
	62	serial1 = &uart3;
77df9d66	63	spi0 = &spi2;
465a225f MR	64	};
	65
	66	chosen {
	67	stdout-path = "serial0:115200n8";
	68	};
3d3f05e6 MR	69
	70	leds {
	71	compatible = "gpio-leds";
	72
	73	status {
	74	label = "chip:white:status";
	75	gpios = <&axp_gpio 2 GPIO_ACTIVE_HIGH>;
	76	default-state = "on";
	77	};
	78	};
bb1ea8bf MR	79
	80	mmc0_pwrseq: mmc0_pwrseq {
	81	compatible = "mmc-pwrseq-simple";
	82	pinctrl-names = "default";
	83	pinctrl-0 = <&chip_wifi_reg_on_pin>;
	84	reset-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */
	85	};
74194620 AT	86
	87	onewire {
	88	compatible = "w1-gpio";
	89	gpios = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */
	90	pinctrl-names = "default";
	91	pinctrl-0 = <&chip_w1_pin>;
	92	};
465a225f MR	93	};
465a225f MR	94
8be0fca6 MR	95	&be0 {
	96	status = "okay";
	97	};
	98
e54693ed MR	99	&codec {
	100	status = "okay";
	101	};
	102
db30fce1 MR	103	&cpu0 {
	104	cpu-supply = <&reg_dcdc2>;
	105	};
	106
465a225f MR	107	&ehci0 {
	108	status = "okay";
	109	};
	110
	111	&i2c0 {
	112	pinctrl-names = "default";
	113	pinctrl-0 = <&i2c0_pins_a>;
	114	status = "okay";
	115
	116	axp209: pmic@34 {
	117	reg = <0x34>;
	118
	119	/*
	120	* The interrupt is routed through the "External Fast
	121	* Interrupt Request" pin (ball G13 of the module)
	122	* directly to the main interrupt controller, without
	123	* any other controller interfering.
	124	*/
	125	interrupts = <0>;
	126	};
	127	};
	128
	129	#include "axp209.dtsi"
	130
77df9d66 MR	131	&i2c1 {
	132	pinctrl-names = "default";
	133	pinctrl-0 = <&i2c1_pins_a>;
	134	status = "disabled";
	135	};
	136
465a225f MR	137	&i2c2 {
	138	pinctrl-names = "default";
	139	pinctrl-0 = <&i2c2_pins_a>;
	140	status = "okay";
	141
	142	xio: gpio@38 {
	143	compatible = "nxp,pcf8574a";
	144	reg = <0x38>;
	145
	146	gpio-controller;
	147	#gpio-cells = <2>;
	148
	149	interrupt-parent = <&pio>;
	150	interrupts = <6 0 IRQ_TYPE_EDGE_FALLING>;
	151	interrupt-controller;
	152	#interrupt-cells = <2>;
	153	};
	154	};
	155
bb1ea8bf	156	&mmc0_pins_a {
1edcd36f	157	bias-pull-up;
bb1ea8bf MR	158	};
bb1ea8bf MR	159
465a225f MR	160	&mmc0 {
	161	pinctrl-names = "default";
	162	pinctrl-0 = <&mmc0_pins_a>;
	163	vmmc-supply = <&reg_vcc3v3>;
bb1ea8bf	164	mmc-pwrseq = <&mmc0_pwrseq>;
465a225f MR	165	bus-width = <4>;
	166	non-removable;
	167	status = "okay";
	168	};
	169
	170	&ohci0 {
	171	status = "okay";
	172	};
	173
	174	&otg_sram {
	175	status = "okay";
	176	};
	177
	178	&pio {
	179	chip_vbus_pin: chip_vbus_pin@0 {
1edcd36f MR	180	pins = "PB10";
1edcd36f MR	181	function = "gpio_out";
465a225f MR	182	};
465a225f MR	183
bb1ea8bf	184	chip_wifi_reg_on_pin: chip_wifi_reg_on_pin@0 {
1edcd36f MR	185	pins = "PC19";
1edcd36f MR	186	function = "gpio_out";
bb1ea8bf MR	187	};
bb1ea8bf MR	188
465a225f	189	chip_id_det_pin: chip_id_det_pin@0 {
1edcd36f MR	190	pins = "PG2";
1edcd36f MR	191	function = "gpio_in";
465a225f	192	};
74194620 AT	193
74194620 AT	194	chip_w1_pin: chip_w1_pin@0 {
1edcd36f MR	195	pins = "PD2";
	196	function = "gpio_in";
	197	bias-pull-up;
74194620	198	};
465a225f MR	199	};
	200
	201	&reg_dcdc2 {
	202	regulator-min-microvolt = <1000000>;
	203	regulator-max-microvolt = <1400000>;
	204	regulator-name = "cpuvdd";
	205	regulator-always-on;
	206	};
	207
	208	&reg_dcdc3 {
	209	regulator-min-microvolt = <1000000>;
	210	regulator-max-microvolt = <1300000>;
	211	regulator-name = "corevdd";
	212	regulator-always-on;
	213	};
	214
	215	&reg_ldo1 {
	216	regulator-name = "rtcvdd";
	217	};
	218
	219	&reg_ldo2 {
	220	regulator-min-microvolt = <2700000>;
	221	regulator-max-microvolt = <3300000>;
	222	regulator-name = "avcc";
	223	regulator-always-on;
	224	};
	225
bb1ea8bf MR	226	/*
	227	* Both LDO3 and LDO4 are used in parallel to power up the WiFi/BT
	228	* Chip.
	229	*
	230	* If those are not enabled, the SDIO part will not enumerate, and
	231	* since there's no way currently to pass DT infos to an SDIO device,
	232	* we cannot really do better than this ugly hack for now.
	233	*/
	234	&reg_ldo3 {
	235	regulator-min-microvolt = <3300000>;
	236	regulator-max-microvolt = <3300000>;
	237	regulator-name = "vcc-wifi-1";
	238	regulator-always-on;
	239	};
	240
	241	&reg_ldo4 {
	242	regulator-min-microvolt = <3300000>;
	243	regulator-max-microvolt = <3300000>;
	244	regulator-name = "vcc-wifi-2";
	245	regulator-always-on;
	246	};
	247
465a225f MR	248	&reg_ldo5 {
	249	regulator-min-microvolt = <1800000>;
	250	regulator-max-microvolt = <1800000>;
	251	regulator-name = "vcc-1v8";
	252	};
	253
	254	&reg_usb0_vbus {
	255	pinctrl-0 = <&chip_vbus_pin>;
	256	vin-supply = <&reg_vcc5v0>;
	257	gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
	258	status = "okay";
	259	};
	260
77df9d66 MR	261	&spi2 {
	262	pinctrl-names = "default";
	263	pinctrl-0 = <&spi2_pins_a>;
	264	status = "disabled";
	265	};
	266
8be0fca6 MR	267	&tcon0 {
	268	status = "okay";
	269	};
	270
	271	&tve0 {
	272	status = "okay";
	273	};
	274
465a225f MR	275	&uart1 {
	276	pinctrl-names = "default";
	277	pinctrl-0 = <&uart1_pins_b>;
	278	status = "okay";
	279	};
	280
	281	&uart3 {
	282	pinctrl-names = "default";
	283	pinctrl-0 = <&uart3_pins_a>,
	284	<&uart3_pins_cts_rts_a>;
	285	status = "okay";
	286	};
	287
	288	&usb_otg {
	289	dr_mode = "otg";
	290	status = "okay";
	291	};
	292
	293	&usb_power_supply {
	294	status = "okay";
	295	};
	296
	297	&usbphy {
	298	pinctrl-names = "default";
	299	pinctrl-0 = <&chip_id_det_pin>;
	300	status = "okay";
	301
	302	usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
	303	usb0_vbus_power-supply = <&usb_power_supply>;
	304	usb0_vbus-supply = <&reg_usb0_vbus>;
	305	usb1_vbus-supply = <&reg_vcc5v0>;
	306	};