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35af8e4b VP |
1 | /* |
2 | * Copyright 2014 Chen-Yu Tsai | |
3 | * | |
4 | * Chen-Yu Tsai <wens@csie.org> | |
5 | * | |
6 | * This file is dual-licensed: you can use it either under the terms | |
7 | * of the GPL or the X11 license, at your option. Note that this dual | |
8 | * licensing only applies to this file, and not this project as a | |
9 | * whole. | |
10 | * | |
11 | * a) This file is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of the | |
14 | * License, or (at your option) any later version. | |
15 | * | |
16 | * This file is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * Or, alternatively, | |
22 | * | |
23 | * b) Permission is hereby granted, free of charge, to any person | |
24 | * obtaining a copy of this software and associated documentation | |
25 | * files (the "Software"), to deal in the Software without | |
26 | * restriction, including without limitation the rights to use, | |
27 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
28 | * sell copies of the Software, and to permit persons to whom the | |
29 | * Software is furnished to do so, subject to the following | |
30 | * conditions: | |
31 | * | |
32 | * The above copyright notice and this permission notice shall be | |
33 | * included in all copies or substantial portions of the Software. | |
34 | * | |
35 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
36 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
37 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
38 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
39 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
40 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
41 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
42 | * OTHER DEALINGS IN THE SOFTWARE. | |
43 | */ | |
44 | ||
45 | #include "sun8i-a23-a33.dtsi" | |
46 | ||
47 | / { | |
03749eb8 IZ |
48 | cpu0_opp_table: opp_table0 { |
49 | compatible = "operating-points-v2"; | |
50 | opp-shared; | |
51 | ||
52 | opp@648000000 { | |
53 | opp-hz = /bits/ 64 <648000000>; | |
54 | opp-microvolt = <1040000>; | |
55 | clock-latency-ns = <244144>; /* 8 32k periods */ | |
56 | }; | |
57 | ||
58 | opp@816000000 { | |
59 | opp-hz = /bits/ 64 <816000000>; | |
60 | opp-microvolt = <1100000>; | |
61 | clock-latency-ns = <244144>; /* 8 32k periods */ | |
62 | }; | |
63 | ||
64 | opp@1008000000 { | |
65 | opp-hz = /bits/ 64 <1008000000>; | |
66 | opp-microvolt = <1200000>; | |
67 | clock-latency-ns = <244144>; /* 8 32k periods */ | |
68 | }; | |
03749eb8 IZ |
69 | }; |
70 | ||
35af8e4b | 71 | cpus { |
03749eb8 IZ |
72 | cpu@0 { |
73 | clocks = <&ccu CLK_CPUX>; | |
74 | clock-names = "cpu"; | |
75 | operating-points-v2 = <&cpu0_opp_table>; | |
76 | }; | |
77 | ||
ea33c2c2 QS |
78 | cpu@1 { |
79 | operating-points-v2 = <&cpu0_opp_table>; | |
80 | }; | |
81 | ||
35af8e4b VP |
82 | cpu@2 { |
83 | compatible = "arm,cortex-a7"; | |
84 | device_type = "cpu"; | |
85 | reg = <2>; | |
ea33c2c2 | 86 | operating-points-v2 = <&cpu0_opp_table>; |
35af8e4b VP |
87 | }; |
88 | ||
89 | cpu@3 { | |
90 | compatible = "arm,cortex-a7"; | |
91 | device_type = "cpu"; | |
92 | reg = <3>; | |
ea33c2c2 | 93 | operating-points-v2 = <&cpu0_opp_table>; |
35af8e4b VP |
94 | }; |
95 | }; | |
96 | ||
b12684fe MR |
97 | de: display-engine { |
98 | compatible = "allwinner,sun8i-a33-display-engine"; | |
99 | allwinner,pipelines = <&fe0>; | |
100 | status = "disabled"; | |
101 | }; | |
102 | ||
35af8e4b VP |
103 | memory { |
104 | reg = <0x40000000 0x80000000>; | |
105 | }; | |
106 | ||
870f1bd1 MJ |
107 | sound: sound { |
108 | compatible = "simple-audio-card"; | |
109 | simple-audio-card,name = "sun8i-a33-audio"; | |
110 | simple-audio-card,format = "i2s"; | |
111 | simple-audio-card,frame-master = <&link_codec>; | |
112 | simple-audio-card,bitclock-master = <&link_codec>; | |
113 | simple-audio-card,mclk-fs = <512>; | |
114 | simple-audio-card,aux-devs = <&codec_analog>; | |
115 | simple-audio-card,routing = | |
eb3abaea MJ |
116 | "Left DAC", "AIF1 Slot 0 Left", |
117 | "Right DAC", "AIF1 Slot 0 Right"; | |
870f1bd1 MJ |
118 | status = "disabled"; |
119 | ||
120 | simple-audio-card,cpu { | |
121 | sound-dai = <&dai>; | |
122 | }; | |
123 | ||
124 | link_codec: simple-audio-card,codec { | |
125 | sound-dai = <&codec>; | |
126 | }; | |
127 | }; | |
128 | ||
4f8449b1 | 129 | soc@01c00000 { |
b12684fe MR |
130 | tcon0: lcd-controller@01c0c000 { |
131 | compatible = "allwinner,sun8i-a33-tcon"; | |
132 | reg = <0x01c0c000 0x1000>; | |
133 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; | |
134 | clocks = <&ccu CLK_BUS_LCD>, | |
135 | <&ccu CLK_LCD_CH0>; | |
136 | clock-names = "ahb", | |
137 | "tcon-ch0"; | |
138 | clock-output-names = "tcon-pixel-clock"; | |
139 | resets = <&ccu RST_BUS_LCD>; | |
140 | reset-names = "lcd"; | |
141 | status = "disabled"; | |
142 | ||
143 | ports { | |
144 | #address-cells = <1>; | |
145 | #size-cells = <0>; | |
146 | ||
147 | tcon0_in: port@0 { | |
148 | #address-cells = <1>; | |
149 | #size-cells = <0>; | |
150 | reg = <0>; | |
151 | ||
152 | tcon0_in_drc0: endpoint@0 { | |
153 | reg = <0>; | |
154 | remote-endpoint = <&drc0_out_tcon0>; | |
155 | }; | |
156 | }; | |
157 | ||
158 | tcon0_out: port@1 { | |
159 | #address-cells = <1>; | |
160 | #size-cells = <0>; | |
161 | reg = <1>; | |
162 | }; | |
163 | }; | |
164 | }; | |
165 | ||
f7ad082c CYT |
166 | crypto: crypto-engine@01c15000 { |
167 | compatible = "allwinner,sun4i-a10-crypto"; | |
168 | reg = <0x01c15000 0x1000>; | |
169 | interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; | |
2c89ce4f | 170 | clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>; |
f7ad082c | 171 | clock-names = "ahb", "mod"; |
2c89ce4f | 172 | resets = <&ccu RST_BUS_SS>; |
f7ad082c CYT |
173 | reset-names = "ahb"; |
174 | }; | |
175 | ||
870f1bd1 MJ |
176 | dai: dai@01c22c00 { |
177 | #sound-dai-cells = <0>; | |
178 | compatible = "allwinner,sun6i-a31-i2s"; | |
179 | reg = <0x01c22c00 0x200>; | |
180 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; | |
181 | clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; | |
182 | clock-names = "apb", "mod"; | |
183 | resets = <&ccu RST_BUS_CODEC>; | |
184 | dmas = <&dma 15>, <&dma 15>; | |
185 | dma-names = "rx", "tx"; | |
186 | status = "disabled"; | |
187 | }; | |
188 | ||
189 | codec: codec@01c22e00 { | |
190 | #sound-dai-cells = <0>; | |
191 | compatible = "allwinner,sun8i-a33-codec"; | |
192 | reg = <0x01c22e00 0x400>; | |
193 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; | |
194 | clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; | |
195 | clock-names = "bus", "mod"; | |
196 | status = "disabled"; | |
197 | }; | |
198 | ||
b12684fe MR |
199 | fe0: display-frontend@01e00000 { |
200 | compatible = "allwinner,sun8i-a33-display-frontend"; | |
201 | reg = <0x01e00000 0x20000>; | |
202 | interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; | |
203 | clocks = <&ccu CLK_BUS_DE_FE>, <&ccu CLK_DE_FE>, | |
204 | <&ccu CLK_DRAM_DE_FE>; | |
205 | clock-names = "ahb", "mod", | |
206 | "ram"; | |
207 | resets = <&ccu RST_BUS_DE_FE>; | |
208 | status = "disabled"; | |
209 | ||
210 | ports { | |
211 | #address-cells = <1>; | |
212 | #size-cells = <0>; | |
213 | ||
214 | fe0_out: port@1 { | |
215 | #address-cells = <1>; | |
216 | #size-cells = <0>; | |
217 | reg = <1>; | |
218 | ||
219 | fe0_out_be0: endpoint@0 { | |
220 | reg = <0>; | |
221 | remote-endpoint = <&be0_in_fe0>; | |
222 | }; | |
223 | }; | |
224 | }; | |
225 | }; | |
226 | ||
227 | be0: display-backend@01e60000 { | |
228 | compatible = "allwinner,sun8i-a33-display-backend"; | |
229 | reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>; | |
230 | reg-names = "be", "sat"; | |
231 | interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; | |
232 | clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>, | |
233 | <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>; | |
234 | clock-names = "ahb", "mod", | |
235 | "ram", "sat"; | |
236 | resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>; | |
237 | reset-names = "be", "sat"; | |
238 | assigned-clocks = <&ccu CLK_DE_BE>; | |
239 | assigned-clock-rates = <300000000>; | |
240 | ||
241 | ports { | |
242 | #address-cells = <1>; | |
243 | #size-cells = <0>; | |
244 | ||
245 | be0_in: port@0 { | |
246 | #address-cells = <1>; | |
247 | #size-cells = <0>; | |
248 | reg = <0>; | |
249 | ||
250 | be0_in_fe0: endpoint@0 { | |
251 | reg = <0>; | |
252 | remote-endpoint = <&fe0_out_be0>; | |
253 | }; | |
254 | }; | |
255 | ||
256 | be0_out: port@1 { | |
257 | #address-cells = <1>; | |
258 | #size-cells = <0>; | |
259 | reg = <1>; | |
260 | ||
261 | be0_out_drc0: endpoint@0 { | |
262 | reg = <0>; | |
263 | remote-endpoint = <&drc0_in_be0>; | |
264 | }; | |
265 | }; | |
266 | }; | |
267 | }; | |
268 | ||
269 | drc0: drc@01e70000 { | |
270 | compatible = "allwinner,sun8i-a33-drc"; | |
271 | reg = <0x01e70000 0x10000>; | |
272 | interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; | |
273 | clocks = <&ccu CLK_BUS_DRC>, <&ccu CLK_DRC>, | |
274 | <&ccu CLK_DRAM_DRC>; | |
275 | clock-names = "ahb", "mod", "ram"; | |
276 | resets = <&ccu RST_BUS_DRC>; | |
277 | ||
278 | assigned-clocks = <&ccu CLK_DRC>; | |
279 | assigned-clock-rates = <300000000>; | |
280 | ||
281 | ports { | |
282 | #address-cells = <1>; | |
283 | #size-cells = <0>; | |
284 | ||
285 | drc0_in: port@0 { | |
286 | #address-cells = <1>; | |
287 | #size-cells = <0>; | |
288 | reg = <0>; | |
289 | ||
290 | drc0_in_be0: endpoint@0 { | |
291 | reg = <0>; | |
292 | remote-endpoint = <&be0_out_drc0>; | |
293 | }; | |
294 | }; | |
295 | ||
296 | drc0_out: port@1 { | |
297 | #address-cells = <1>; | |
298 | #size-cells = <0>; | |
299 | reg = <1>; | |
300 | ||
301 | drc0_out_tcon0: endpoint@0 { | |
302 | reg = <0>; | |
303 | remote-endpoint = <&tcon0_in_drc0>; | |
304 | }; | |
305 | }; | |
306 | }; | |
307 | }; | |
4f8449b1 | 308 | }; |
35af8e4b VP |
309 | }; |
310 | ||
2c89ce4f MR |
311 | &ccu { |
312 | compatible = "allwinner,sun8i-a33-ccu"; | |
313 | }; | |
314 | ||
35af8e4b VP |
315 | &pio { |
316 | compatible = "allwinner,sun8i-a33-pinctrl"; | |
317 | interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, | |
318 | <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
63c6509b CYT |
319 | |
320 | uart0_pins_b: uart0@1 { | |
1edcd36f MR |
321 | pins = "PB0", "PB1"; |
322 | function = "uart0"; | |
63c6509b CYT |
323 | }; |
324 | ||
35af8e4b | 325 | }; |
bd33544e CYT |
326 | |
327 | &usb_otg { | |
328 | compatible = "allwinner,sun8i-a33-musb"; | |
329 | }; | |
330 | ||
331 | &usbphy { | |
332 | compatible = "allwinner,sun8i-a33-usb-phy"; | |
333 | reg = <0x01c19400 0x14>, <0x01c1a800 0x4>; | |
334 | reg-names = "phy_ctrl", "pmu1"; | |
335 | }; |