[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / sun8i-a83t-bananapi-m3.dts

/*
 * Copyright 2017 Chen-Yu Tsai
 *
 * Chen-Yu Tsai <wens@csie.org>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;
#include "sun8i-a83t.dtsi"

#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Banana Pi BPI-M3";
	compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t";

	aliases {
		ethernet0 = &emac;
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	connector {
		compatible = "hdmi-connector";
		type = "a";

		port {
			hdmi_con_in: endpoint {
				remote-endpoint = <&hdmi_out_con>;
			};
		};
	};

	leds {
		compatible = "gpio-leds";

		blue {
			label = "bananapi-m3:blue:usr";
			gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>;
		};

		green {
			label = "bananapi-m3:green:usr";
			gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>;
		};
	};

	reg_usb1_vbus: reg-usb1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb1-vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
		enable-active-high;
		gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
	};

	wifi_pwrseq: wifi_pwrseq {
		compatible = "mmc-pwrseq-simple";
		clocks = <&ac100_rtc 1>;
		clock-names = "ext_clock";
		/* The WiFi low power clock must be 32768 Hz */
		assigned-clocks = <&ac100_rtc 1>;
		assigned-clock-rates = <32768>;
		/* enables internal regulator and de-asserts reset */
		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
	};
};

&cpu0 {
	cpu-supply = <&reg_dcdc2>;
};

&cpu100 {
	cpu-supply = <&reg_dcdc3>;
};

&de {
	status = "okay";
};

&ehci0 {
	/* Terminus Tech FE 1.1s 4-port USB 2.0 hub here */
	status = "okay";

	/* TODO GL830 USB-to-SATA bridge downstream w/ GPIO power controls */
};

&emac {
	pinctrl-names = "default";
	pinctrl-0 = <&emac_rgmii_pins>;
	phy-supply = <&reg_sw>;
	phy-handle = <&rgmii_phy>;
	phy-mode = "rgmii";
	allwinner,rx-delay-ps = <700>;
	allwinner,tx-delay-ps = <700>;
	status = "okay";
};

&hdmi {
	status = "okay";
};

&hdmi_out {
	hdmi_out_con: endpoint {
		remote-endpoint = <&hdmi_con_in>;
	};
};

&mdio {
	rgmii_phy: ethernet-phy@1 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <1>;
	};
};

&mmc0 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc0_pins>;
	vmmc-supply = <&reg_dcdc1>;
	bus-width = <4>;
	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
	status = "okay";
};

&mmc1 {
	vmmc-supply = <&reg_dldo1>;
	vqmmc-supply = <&reg_dldo1>;
	mmc-pwrseq = <&wifi_pwrseq>;
	bus-width = <4>;
	non-removable;
	status = "okay";

	brcmf: wifi@1 {
		reg = <1>;
		compatible = "brcm,bcm4329-fmac";
		interrupt-parent = <&r_pio>;
		interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>;
		interrupt-names = "host-wake";
	};
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_8bit_emmc_pins>;
	vmmc-supply = <&reg_dcdc1>;
	vqmmc-supply = <&reg_dcdc1>;
	bus-width = <8>;
	non-removable;
	cap-mmc-hw-reset;
	status = "okay";
};

&r_cir {
	clock-frequency = <3000000>;
	status = "okay";
};

&r_rsb {
	status = "okay";

	axp81x: pmic@3a3 {
		compatible = "x-powers,axp813";
		reg = <0x3a3>;
		interrupt-parent = <&r_intc>;
		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
		eldoin-supply = <&reg_dcdc1>;
		fldoin-supply = <&reg_dcdc5>;
		swin-supply = <&reg_dcdc1>;
		x-powers,drive-vbus-en;
	};

	ac100: codec@e89 {
		compatible = "x-powers,ac100";
		reg = <0xe89>;

		ac100_codec: codec {
			compatible = "x-powers,ac100-codec";
			interrupt-parent = <&r_pio>;
			interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
			#clock-cells = <0>;
			clock-output-names = "4M_adda";
		};

		ac100_rtc: rtc {
			compatible = "x-powers,ac100-rtc";
			interrupt-parent = <&r_intc>;
			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
			clocks = <&ac100_codec>;
			#clock-cells = <1>;
			clock-output-names = "cko1_rtc",
					     "cko2_rtc",
					     "cko3_rtc";
		};
	};
};

#include "axp81x.dtsi"

&reg_aldo1 {
	regulator-always-on;
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-name = "vcc-1v8";
};

&reg_aldo2 {
	regulator-always-on;
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-name = "dram-pll";
};

&reg_aldo3 {
	regulator-always-on;
	regulator-min-microvolt = <3000000>;
	regulator-max-microvolt = <3000000>;
	regulator-name = "avcc";
};

&reg_dcdc1 {
	/* schematics says 3.1V but FEX file says 3.3V */
	regulator-always-on;
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-3v3";
};

&reg_dcdc2 {
	regulator-always-on;
	regulator-min-microvolt = <700000>;
	regulator-max-microvolt = <1100000>;
	regulator-name = "vdd-cpua";
};

&reg_dcdc3 {
	regulator-always-on;
	regulator-min-microvolt = <700000>;
	regulator-max-microvolt = <1100000>;
	regulator-name = "vdd-cpub";
};

&reg_dcdc4 {
	regulator-min-microvolt = <700000>;
	regulator-max-microvolt = <1100000>;
	regulator-name = "vdd-gpu";
};

&reg_dcdc5 {
	regulator-always-on;
	regulator-min-microvolt = <1200000>;
	regulator-max-microvolt = <1200000>;
	regulator-name = "vcc-dram";
};

&reg_dcdc6 {
	regulator-always-on;
	regulator-min-microvolt = <900000>;
	regulator-max-microvolt = <900000>;
	regulator-name = "vdd-sys";
};

&reg_dldo1 {
	/*
	 * This powers both the WiFi/BT module's main power, I/O supply,
	 * and external pull-ups on all the data lines. It should be set
	 * to the same voltage as the I/O supply (DCDC1 in this case) to
	 * avoid any leakage or mismatch.
	 */
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-wifi";
};

&reg_dldo3 {
	regulator-always-on;
	regulator-min-microvolt = <2500000>;
	regulator-max-microvolt = <2500000>;
	regulator-name = "vcc-pd";
};

&reg_drivevbus {
	regulator-name = "usb0-vbus";
	status = "okay";
};

&reg_fldo1 {
	regulator-min-microvolt = <1080000>;
	regulator-max-microvolt = <1320000>;
	regulator-name = "vdd12-hsic";
};

&reg_fldo2 {
	/*
	 * Despite the embedded CPUs core not being used in any way,
	 * this must remain on or the system will hang.
	 */
	regulator-always-on;
	regulator-min-microvolt = <700000>;
	regulator-max-microvolt = <1100000>;
	regulator-name = "vdd-cpus";
};

&reg_rtc_ldo {
	regulator-name = "vcc-rtc";
};

&reg_sw {
	/*
	 * The PHY requires 20ms after all voltages
	 * are applied until core logic is ready and
	 * 30ms after the reset pin is de-asserted.
	 * Set a 100ms delay to account for PMIC
	 * ramp time and board traces.
	 */
	regulator-enable-ramp-delay = <100000>;
	regulator-name = "vcc-ephy";
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pb_pins>;
	status = "okay";
};

&usbphy {
	usb1_vbus-supply = <&reg_usb1_vbus>;
	status = "okay";
};
Commit	Line	Data
359b5a1e CYT	1	/*
	2	* Copyright 2017 Chen-Yu Tsai
	3	*
	4	* Chen-Yu Tsai <wens@csie.org>
	5	*
	6	* This file is dual-licensed: you can use it either under the terms
	7	* of the GPL or the X11 license, at your option. Note that this dual
	8	* licensing only applies to this file, and not this project as a
	9	* whole.
	10	*
	11	* a) This file is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of the
	14	* License, or (at your option) any later version.
	15	*
	16	* This file is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* Or, alternatively,
	22	*
	23	* b) Permission is hereby granted, free of charge, to any person
	24	* obtaining a copy of this software and associated documentation
	25	* files (the "Software"), to deal in the Software without
	26	* restriction, including without limitation the rights to use,
	27	* copy, modify, merge, publish, distribute, sublicense, and/or
	28	* sell copies of the Software, and to permit persons to whom the
	29	* Software is furnished to do so, subject to the following
	30	* conditions:
	31	*
	32	* The above copyright notice and this permission notice shall be
	33	* included in all copies or substantial portions of the Software.
	34	*
	35	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	36	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	37	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	38	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	39	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	40	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	41	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	42	* OTHER DEALINGS IN THE SOFTWARE.
	43	*/
	44
	45	/dts-v1/;
	46	#include "sun8i-a83t.dtsi"
359b5a1e CYT	47
	48	#include <dt-bindings/gpio/gpio.h>
	49
	50	/ {
	51	model = "Banana Pi BPI-M3";
	52	compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t";
	53
	54	aliases {
03935994	55	ethernet0 = &emac;
359b5a1e CYT	56	serial0 = &uart0;
	57	};
	58
	59	chosen {
	60	stdout-path = "serial0:115200n8";
	61	};
d7c5f686	62
f978b05e JS	63	connector {
	64	compatible = "hdmi-connector";
	65	type = "a";
	66
	67	port {
	68	hdmi_con_in: endpoint {
	69	remote-endpoint = <&hdmi_out_con>;
	70	};
	71	};
	72	};
	73
9ae65654 CYT	74	leds {
	75	compatible = "gpio-leds";
	76
	77	blue {
	78	label = "bananapi-m3:blue:usr";
	79	gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>;
	80	};
	81
	82	green {
	83	label = "bananapi-m3:green:usr";
	84	gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>;
	85	};
	86	};
	87
d7c5f686 CYT	88	reg_usb1_vbus: reg-usb1-vbus {
	89	compatible = "regulator-fixed";
	90	regulator-name = "usb1-vbus";
	91	regulator-min-microvolt = <5000000>;
	92	regulator-max-microvolt = <5000000>;
	93	regulator-boot-on;
	94	enable-active-high;
	95	gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
	96	};
337cce7e CYT	97
	98	wifi_pwrseq: wifi_pwrseq {
	99	compatible = "mmc-pwrseq-simple";
	100	clocks = <&ac100_rtc 1>;
	101	clock-names = "ext_clock";
	102	/* The WiFi low power clock must be 32768 Hz */
	103	assigned-clocks = <&ac100_rtc 1>;
	104	assigned-clock-rates = <32768>;
	105	/* enables internal regulator and de-asserts reset */
	106	reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
	107	};
359b5a1e CYT	108	};
359b5a1e CYT	109
75ab9393 CYT	110	&cpu0 {
	111	cpu-supply = <&reg_dcdc2>;
	112	};
	113
	114	&cpu100 {
	115	cpu-supply = <&reg_dcdc3>;
	116	};
	117
f978b05e JS	118	&de {
	119	status = "okay";
	120	};
	121
359b5a1e CYT	122	&ehci0 {
	123	/* Terminus Tech FE 1.1s 4-port USB 2.0 hub here */
	124	status = "okay";
	125
	126	/* TODO GL830 USB-to-SATA bridge downstream w/ GPIO power controls */
	127	};
	128
03935994 CYT	129	&emac {
	130	pinctrl-names = "default";
	131	pinctrl-0 = <&emac_rgmii_pins>;
	132	phy-supply = <&reg_sw>;
	133	phy-handle = <&rgmii_phy>;
	134	phy-mode = "rgmii";
	135	allwinner,rx-delay-ps = <700>;
	136	allwinner,tx-delay-ps = <700>;
	137	status = "okay";
	138	};
	139
f978b05e JS	140	&hdmi {
	141	status = "okay";
	142	};
	143
	144	&hdmi_out {
	145	hdmi_out_con: endpoint {
	146	remote-endpoint = <&hdmi_con_in>;
	147	};
	148	};
	149
03935994 CYT	150	&mdio {
	151	rgmii_phy: ethernet-phy@1 {
	152	compatible = "ethernet-phy-ieee802.3-c22";
	153	reg = <1>;
	154	};
	155	};
	156
359b5a1e CYT	157	&mmc0 {
	158	pinctrl-names = "default";
	159	pinctrl-0 = <&mmc0_pins>;
d7c5f686	160	vmmc-supply = <&reg_dcdc1>;
359b5a1e	161	bus-width = <4>;
45e01f40	162	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
359b5a1e CYT	163	status = "okay";
	164	};
	165
337cce7e CYT	166	&mmc1 {
	167	vmmc-supply = <&reg_dldo1>;
	168	vqmmc-supply = <&reg_dldo1>;
	169	mmc-pwrseq = <&wifi_pwrseq>;
	170	bus-width = <4>;
	171	non-removable;
	172	status = "okay";
	173
	174	brcmf: wifi@1 {
	175	reg = <1>;
	176	compatible = "brcm,bcm4329-fmac";
	177	interrupt-parent = <&r_pio>;
	178	interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>;
	179	interrupt-names = "host-wake";
	180	};
	181	};
	182
359b5a1e CYT	183	&mmc2 {
	184	pinctrl-names = "default";
	185	pinctrl-0 = <&mmc2_8bit_emmc_pins>;
d7c5f686 CYT	186	vmmc-supply = <&reg_dcdc1>;
d7c5f686 CYT	187	vqmmc-supply = <&reg_dcdc1>;
359b5a1e CYT	188	bus-width = <8>;
	189	non-removable;
	190	cap-mmc-hw-reset;
	191	status = "okay";
	192	};
	193
6f26c238 PR	194	&r_cir {
	195	clock-frequency = <3000000>;
	196	status = "okay";
	197	};
	198
359b5a1e CYT	199	&r_rsb {
	200	status = "okay";
	201
	202	axp81x: pmic@3a3 {
	203	compatible = "x-powers,axp813";
	204	reg = <0x3a3>;
	205	interrupt-parent = <&r_intc>;
	206	interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
d7c5f686 CYT	207	eldoin-supply = <&reg_dcdc1>;
	208	fldoin-supply = <&reg_dcdc5>;
	209	swin-supply = <&reg_dcdc1>;
	210	x-powers,drive-vbus-en;
359b5a1e CYT	211	};
	212
	213	ac100: codec@e89 {
	214	compatible = "x-powers,ac100";
	215	reg = <0xe89>;
	216
	217	ac100_codec: codec {
	218	compatible = "x-powers,ac100-codec";
	219	interrupt-parent = <&r_pio>;
	220	interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
	221	#clock-cells = <0>;
	222	clock-output-names = "4M_adda";
	223	};
	224
	225	ac100_rtc: rtc {
	226	compatible = "x-powers,ac100-rtc";
	227	interrupt-parent = <&r_intc>;
	228	interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
	229	clocks = <&ac100_codec>;
	230	#clock-cells = <1>;
	231	clock-output-names = "cko1_rtc",
	232	"cko2_rtc",
	233	"cko3_rtc";
	234	};
	235	};
	236	};
	237
d7c5f686 CYT	238	#include "axp81x.dtsi"
	239
	240	&reg_aldo1 {
	241	regulator-always-on;
	242	regulator-min-microvolt = <1800000>;
	243	regulator-max-microvolt = <1800000>;
	244	regulator-name = "vcc-1v8";
	245	};
	246
	247	&reg_aldo2 {
	248	regulator-always-on;
	249	regulator-min-microvolt = <1800000>;
	250	regulator-max-microvolt = <1800000>;
	251	regulator-name = "dram-pll";
	252	};
	253
	254	&reg_aldo3 {
	255	regulator-always-on;
	256	regulator-min-microvolt = <3000000>;
	257	regulator-max-microvolt = <3000000>;
	258	regulator-name = "avcc";
	259	};
	260
	261	&reg_dcdc1 {
	262	/* schematics says 3.1V but FEX file says 3.3V */
	263	regulator-always-on;
	264	regulator-min-microvolt = <3300000>;
	265	regulator-max-microvolt = <3300000>;
	266	regulator-name = "vcc-3v3";
	267	};
	268
	269	&reg_dcdc2 {
	270	regulator-always-on;
	271	regulator-min-microvolt = <700000>;
	272	regulator-max-microvolt = <1100000>;
	273	regulator-name = "vdd-cpua";
	274	};
	275
	276	&reg_dcdc3 {
	277	regulator-always-on;
	278	regulator-min-microvolt = <700000>;
	279	regulator-max-microvolt = <1100000>;
	280	regulator-name = "vdd-cpub";
	281	};
	282
	283	&reg_dcdc4 {
	284	regulator-min-microvolt = <700000>;
	285	regulator-max-microvolt = <1100000>;
	286	regulator-name = "vdd-gpu";
	287	};
	288
	289	&reg_dcdc5 {
	290	regulator-always-on;
	291	regulator-min-microvolt = <1200000>;
	292	regulator-max-microvolt = <1200000>;
	293	regulator-name = "vcc-dram";
	294	};
	295
	296	&reg_dcdc6 {
	297	regulator-always-on;
	298	regulator-min-microvolt = <900000>;
	299	regulator-max-microvolt = <900000>;
	300	regulator-name = "vdd-sys";
	301	};
302
303	&reg_dldo1 {
304	/*
305	* This powers both the WiFi/BT module's main power, I/O supply,
306	* and external pull-ups on all the data lines. It should be set
307	* to the same voltage as the I/O supply (DCDC1 in this case) to
308	* avoid any leakage or mismatch.
309	*/
310	regulator-min-microvolt = <3300000>;
311	regulator-max-microvolt = <3300000>;
312	regulator-name = "vcc-wifi";
313	};
314
315	&reg_dldo3 {
316	regulator-always-on;
317	regulator-min-microvolt = <2500000>;
318	regulator-max-microvolt = <2500000>;
319	regulator-name = "vcc-pd";
320	};
321
322	&reg_drivevbus {
323	regulator-name = "usb0-vbus";
359b5a1e CYT	324	status = "okay";
	325	};
	326
d7c5f686 CYT	327	&reg_fldo1 {
	328	regulator-min-microvolt = <1080000>;
	329	regulator-max-microvolt = <1320000>;
	330	regulator-name = "vdd12-hsic";
	331	};
	332
	333	&reg_fldo2 {
	334	/*
	335	* Despite the embedded CPUs core not being used in any way,
	336	* this must remain on or the system will hang.
	337	*/
	338	regulator-always-on;
	339	regulator-min-microvolt = <700000>;
	340	regulator-max-microvolt = <1100000>;
	341	regulator-name = "vdd-cpus";
	342	};
	343
	344	&reg_rtc_ldo {
	345	regulator-name = "vcc-rtc";
359b5a1e CYT	346	};
359b5a1e CYT	347
d7c5f686 CYT	348	&reg_sw {
	349	/*
	350	* The PHY requires 20ms after all voltages
	351	* are applied until core logic is ready and
	352	* 30ms after the reset pin is de-asserted.
	353	* Set a 100ms delay to account for PMIC
	354	* ramp time and board traces.
	355	*/
	356	regulator-enable-ramp-delay = <100000>;
	357	regulator-name = "vcc-ephy";
359b5a1e CYT	358	};
	359
	360	&uart0 {
	361	pinctrl-names = "default";
	362	pinctrl-0 = <&uart0_pb_pins>;
	363	status = "okay";
	364	};
	365
	366	&usbphy {
	367	usb1_vbus-supply = <&reg_usb1_vbus>;
	368	status = "okay";
	369	};