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Merge tag 'linux-watchdog-4.17-rc1' of git://www.linux-watchdog.org/linux-watchdog
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / sun8i-h3.dtsi
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1/*
2 * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
0127216f 43#include "sunxi-h3-h5.dtsi"
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44
45/ {
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46 cpus {
47 #address-cells = <1>;
48 #size-cells = <0>;
49
50 cpu@0 {
51 compatible = "arm,cortex-a7";
52 device_type = "cpu";
53 reg = <0>;
54 };
55
56 cpu@1 {
57 compatible = "arm,cortex-a7";
58 device_type = "cpu";
59 reg = <1>;
60 };
61
62 cpu@2 {
63 compatible = "arm,cortex-a7";
64 device_type = "cpu";
65 reg = <2>;
66 };
67
68 cpu@3 {
69 compatible = "arm,cortex-a7";
70 device_type = "cpu";
71 reg = <3>;
72 };
73 };
74
75 timer {
76 compatible = "arm,armv7-timer";
77 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
78 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
79 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
80 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
81 };
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82
83 soc {
84 mali: gpu@1c40000 {
85 compatible = "allwinner,sun8i-h3-mali", "arm,mali-400";
86 reg = <0x01c40000 0x10000>;
87 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
88 <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
89 <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
90 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
91 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
92 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
93 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
94 interrupt-names = "gp",
95 "gpmmu",
96 "pp0",
97 "ppmmu0",
98 "pp1",
99 "ppmmu1",
100 "pmu";
101 clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
102 clock-names = "bus", "core";
103 resets = <&ccu RST_BUS_GPU>;
104
105 assigned-clocks = <&ccu CLK_GPU>;
106 assigned-clock-rates = <384000000>;
107 };
108 };
0127216f 109};
318d93bc 110
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111&ccu {
112 compatible = "allwinner,sun8i-h3-ccu";
113};
93385367 114
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115&display_clocks {
116 compatible = "allwinner,sun8i-h3-de2-clk";
117};
118
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119&mmc0 {
120 compatible = "allwinner,sun7i-a20-mmc";
121 clocks = <&ccu CLK_BUS_MMC0>,
122 <&ccu CLK_MMC0>,
123 <&ccu CLK_MMC0_OUTPUT>,
124 <&ccu CLK_MMC0_SAMPLE>;
125 clock-names = "ahb",
126 "mmc",
127 "output",
128 "sample";
129};
20d5c4e9 130
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131&mmc1 {
132 compatible = "allwinner,sun7i-a20-mmc";
133 clocks = <&ccu CLK_BUS_MMC1>,
134 <&ccu CLK_MMC1>,
135 <&ccu CLK_MMC1_OUTPUT>,
136 <&ccu CLK_MMC1_SAMPLE>;
137 clock-names = "ahb",
138 "mmc",
139 "output",
140 "sample";
141};
fe0a8ea1 142
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143&mmc2 {
144 compatible = "allwinner,sun7i-a20-mmc";
145 clocks = <&ccu CLK_BUS_MMC2>,
146 <&ccu CLK_MMC2>,
147 <&ccu CLK_MMC2_OUTPUT>,
148 <&ccu CLK_MMC2_SAMPLE>;
149 clock-names = "ahb",
150 "mmc",
151 "output",
152 "sample";
153};
fe0a8ea1 154
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155&pio {
156 compatible = "allwinner,sun8i-h3-pinctrl";
318d93bc 157};