[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / sun9i-a80-cubieboard4.dts

/*
 * Copyright 2015 Tyler Baker
 *
 * Tyler Baker <tyler.baker@linaro.org>
 * Chen-Yu Tsai <wens@csie.org>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;
#include "sun9i-a80.dtsi"

#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Cubietech Cubieboard4";
	compatible = "cubietech,a80-cubieboard4", "allwinner,sun9i-a80";

	aliases {
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	leds {
		compatible = "gpio-leds";

		green {
			label = "cubieboard4:green:usr";
			gpios = <&pio 7 17 GPIO_ACTIVE_HIGH>; /* PH17 */
		};

		red {
			label = "cubieboard4:red:usr";
			gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
		};
	};

	vga-connector {
		compatible = "vga-connector";
		label = "vga";
		ddc-i2c-bus = <&i2c3>;

		port {
			vga_con_in: endpoint {
				remote-endpoint = <&vga_dac_out>;
			};
		};
	};

	vga-dac {
		compatible = "corpro,gm7123", "adi,adv7123", "dumb-vga-dac";
		vdd-supply = <&reg_dcdc1>;
		#address-cells = <1>;
		#size-cells = <0>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0>;

				vga_dac_in: endpoint@0 {
					reg = <0>;
					remote-endpoint = <&tcon0_out_vga>;
				};
			};

			port@1 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <1>;

				vga_dac_out: endpoint@0 {
					reg = <0>;
					remote-endpoint = <&vga_con_in>;
				};
			};
		};
	};

	wifi_pwrseq: wifi-pwrseq {
		compatible = "mmc-pwrseq-simple";
		clocks = <&ac100_rtc 1>;
		clock-names = "ext_clock";
		/* enables internal regulator and de-asserts reset */
		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
	};
};

&de {
	status = "okay";
};

&gmac {
	pinctrl-names = "default";
	pinctrl-0 = <&gmac_rgmii_pins>;
	phy = <&phy1>;
	phy-mode = "rgmii";
	phy-supply = <&reg_cldo1>;
	status = "okay";

	phy1: ethernet-phy@1 {
		reg = <1>;
	};
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;
	status = "okay";
};

&mmc0 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc0_pins>;
	vmmc-supply = <&reg_dcdc1>;
	bus-width = <4>;
	cd-gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; /* PH18 */
	status = "okay";
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	vmmc-supply = <&reg_dldo1>;
	vqmmc-supply = <&reg_cldo3>;
	mmc-pwrseq = <&wifi_pwrseq>;
	bus-width = <4>;
	non-removable;
	status = "okay";
};

&mmc1_pins {
	bias-pull-up;
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_8bit_pins>;
	vmmc-supply = <&reg_dcdc1>;
	bus-width = <8>;
	non-removable;
	cap-mmc-hw-reset;
	status = "okay";
};

&mmc2_8bit_pins {
	/* Increase drive strength for DDR modes */
	drive-strength = <40>;
};

&osc32k {
	/* osc32k input is from AC100 */
	clocks = <&ac100_rtc 0>;
};

&pio {
	vcc-pa-supply = <&reg_ldo_io1>;
	vcc-pb-supply = <&reg_aldo2>;
	vcc-pc-supply = <&reg_dcdc1>;
	vcc-pd-supply = <&reg_dc1sw>;
	vcc-pe-supply = <&reg_eldo2>;
	vcc-pf-supply = <&reg_dcdc1>;
	vcc-pg-supply = <&reg_ldo_io0>;
	vcc-ph-supply = <&reg_dcdc1>;
};

&r_ir {
	status = "okay";
};

&r_pio {
	vcc-pl-supply = <&reg_dldo2>;
	vcc-pm-supply = <&reg_eldo3>;
};

&r_rsb {
	status = "okay";

	axp809: pmic@3a3 {
		reg = <0x3a3>;
		interrupt-parent = <&nmi_intc>;
		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;

		regulators {
			reg_aldo1: aldo1 {
				/*
				 * TODO: This should be handled by the
				 * USB PHY driver.
				 */
				regulator-always-on;
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3000000>;
				regulator-name = "vcc33-usbh";
			};

			reg_aldo2: aldo2 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc-pb-io-cam";
			};

			aldo3 {
				/* unused */
			};

			reg_dc1sw: dc1sw {
				regulator-name = "vcc-pd";
			};

			reg_dc5ldo: dc5ldo {
				regulator-always-on;
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1100000>;
				regulator-name = "vdd-cpus-09-usbh";
			};

			reg_dcdc1: dcdc1 {
				regulator-always-on;
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3000000>;
				regulator-name = "vcc-3v";
			};

			reg_dcdc2: dcdc2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1100000>;
				regulator-name = "vdd-gpu";
			};

			reg_dcdc3: dcdc3 {
				regulator-always-on;
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1100000>;
				regulator-name = "vdd-cpua";
			};

			reg_dcdc4: dcdc4 {
				regulator-always-on;
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1100000>;
				regulator-name = "vdd-sys-usb0-hdmi";
			};

			reg_dcdc5: dcdc5 {
				regulator-always-on;
				regulator-min-microvolt = <1425000>;
				regulator-max-microvolt = <1575000>;
				regulator-name = "vcc-dram";
			};

			reg_dldo1: dldo1 {
				/*
				 * The WiFi chip supports a wide range
				 * (3.0 ~ 4.8V) of voltages, and so does
				 * this regulator (3.0 ~ 4.2V), but
				 * Allwinner SDK always sets it to 3.3V.
				 */
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-wifi";
			};

			reg_dldo2: dldo2 {
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3000000>;
				regulator-name = "vcc-pl";
			};

			reg_eldo1: eldo1 {
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-name = "vcc-dvdd-cam";
			};

			reg_eldo2: eldo2 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc-pe";
			};

			reg_eldo3: eldo3 {
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3000000>;
				regulator-name = "vcc-pm-codec-io1";
			};

			reg_ldo_io0: ldo_io0 {
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3000000>;
				regulator-name = "vcc-pg";
			};

			reg_ldo_io1: ldo_io1 {
				regulator-min-microvolt = <2500000>;
				regulator-max-microvolt = <2500000>;
				regulator-name = "vcc-pa-gmac-2v5";
			};

			reg_rtc_ldo: rtc_ldo {
				regulator-name = "vcc-rtc-vdd1v8-io";
			};

			sw {
				/* unused */
			};
		};
	};

	axp806: pmic@745 {
		compatible = "x-powers,axp806";
		reg = <0x745>;
		interrupt-parent = <&nmi_intc>;
		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <1>;
		bldoin-supply = <&reg_dcdce>;

		regulators {
			reg_s_aldo1: aldo1 {
				regulator-always-on;
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3000000>;
				regulator-name = "avcc";
			};

			aldo2 {
				/*
				 * unused, but use a different name to
				 * avoid name clash with axp809's aldo's
				 */
				regulator-name = "s_aldo2";
			};

			aldo3 {
				/*
				 * unused, but use a different name to
				 * avoid name clash with axp809's aldo's
				 */
				regulator-name = "s_aldo3";
			};

			reg_bldo1: bldo1 {
				regulator-always-on;
				regulator-min-microvolt = <1700000>;
				regulator-max-microvolt = <1900000>;
				regulator-name = "vcc18-efuse-adc-display-csi";
			};

			reg_bldo2: bldo2 {
				regulator-always-on;
				regulator-min-microvolt = <1700000>;
				regulator-max-microvolt = <1900000>;
				regulator-name =
					"vdd18-drampll-vcc18-pll-cpvdd";
			};

			bldo3 {
				/* unused */
			};

			reg_bldo4: bldo4 {
				regulator-min-microvolt = <1100000>;
				regulator-max-microvolt = <1300000>;
				regulator-name = "vcc12-hsic";
			};

			reg_cldo1: cldo1 {
				/*
				 * This was 3V in the original design, but
				 * 3.3V is the recommended supply voltage
				 * for the Ethernet PHY.
				 */
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				/*
				 * The PHY requires 20ms after all voltages
				 * are applied until core logic is ready and
				 * 30ms after the reset pin is de-asserted.
				 * Set a 100ms delay to account for PMIC
				 * ramp time and board traces.
				 */
				regulator-enable-ramp-delay = <100000>;
				regulator-name = "vcc-gmac-phy";
			};

			reg_cldo2: cldo2 {
				regulator-min-microvolt = <2800000>;
				regulator-max-microvolt = <2800000>;
				regulator-name = "afvcc-cam";
			};

			reg_cldo3: cldo3 {
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3000000>;
				regulator-name = "vcc-io-wifi-codec-io2";
			};

			reg_dcdca: dcdca {
				regulator-always-on;
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1100000>;
				regulator-name = "vdd-cpub";
			};

			reg_dcdcd: dcdcd {
				regulator-always-on;
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1100000>;
				regulator-name = "vdd-vpu";
			};

			reg_dcdce: dcdce {
				regulator-always-on;
				regulator-min-microvolt = <2100000>;
				regulator-max-microvolt = <2100000>;
				regulator-name = "vcc-bldo-codec-ldoin";
			};

			sw {
				/*
				 * unused, but use a different name to
				 * avoid name clash with axp809's sw
				 */
				regulator-name = "s_sw";
			};
		};
	};

	ac100: codec@e89 {
		compatible = "x-powers,ac100";
		reg = <0xe89>;

		ac100_codec: codec {
			compatible = "x-powers,ac100-codec";
			interrupt-parent = <&r_pio>;
			interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PL9 */
			#clock-cells = <0>;
			clock-output-names = "4M_adda";
		};

		ac100_rtc: rtc {
			compatible = "x-powers,ac100-rtc";
			interrupt-parent = <&nmi_intc>;
			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
			clocks = <&ac100_codec>;
			#clock-cells = <1>;
			clock-output-names = "cko1_rtc",
					     "cko2_rtc",
					     "cko3_rtc";
		};
	};
};

#include "axp809.dtsi"

&tcon0 {
	pinctrl-names = "default";
	pinctrl-0 = <&lcd0_rgb888_pins>;
};

&tcon0_out {
	tcon0_out_vga: endpoint@0 {
		reg = <0>;
		remote-endpoint = <&vga_dac_in>;
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_ph_pins>;
	status = "okay";
};
Commit	Line	Data
6d11c8e2 TB	1	/*
	2	* Copyright 2015 Tyler Baker
	3	*
	4	* Tyler Baker <tyler.baker@linaro.org>
	5	* Chen-Yu Tsai <wens@csie.org>
	6	*
	7	* This file is dual-licensed: you can use it either under the terms
	8	* of the GPL or the X11 license, at your option. Note that this dual
	9	* licensing only applies to this file, and not this project as a
	10	* whole.
	11	*
	12	* a) This file is free software; you can redistribute it and/or
	13	* modify it under the terms of the GNU General Public License as
	14	* published by the Free Software Foundation; either version 2 of the
	15	* License, or (at your option) any later version.
	16	*
	17	* This file is distributed in the hope that it will be useful,
	18	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	* GNU General Public License for more details.
	21	*
	22	* Or, alternatively,
	23	*
	24	* b) Permission is hereby granted, free of charge, to any person
	25	* obtaining a copy of this software and associated documentation
	26	* files (the "Software"), to deal in the Software without
	27	* restriction, including without limitation the rights to use,
	28	* copy, modify, merge, publish, distribute, sublicense, and/or
	29	* sell copies of the Software, and to permit persons to whom the
	30	* Software is furnished to do so, subject to the following
	31	* conditions:
	32	*
	33	* The above copyright notice and this permission notice shall be
	34	* included in all copies or substantial portions of the Software.
	35	*
	36	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	37	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	38	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	39	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	40	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	41	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	42	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	43	* OTHER DEALINGS IN THE SOFTWARE.
	44	*/
	45
	46	/dts-v1/;
	47	#include "sun9i-a80.dtsi"
6d11c8e2 TB	48
6d11c8e2 TB	49	#include <dt-bindings/gpio/gpio.h>
6d11c8e2 TB	50
	51	/ {
	52	model = "Cubietech Cubieboard4";
	53	compatible = "cubietech,a80-cubieboard4", "allwinner,sun9i-a80";
	54
	55	aliases {
	56	serial0 = &uart0;
	57	};
	58
	59	chosen {
	60	stdout-path = "serial0:115200n8";
	61	};
	62
c807d6e2 CYT	63	leds {
c807d6e2 CYT	64	compatible = "gpio-leds";
c807d6e2 CYT	65
	66	green {
	67	label = "cubieboard4:green:usr";
	68	gpios = <&pio 7 17 GPIO_ACTIVE_HIGH>; /* PH17 */
	69	};
	70
	71	red {
	72	label = "cubieboard4:red:usr";
	73	gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
	74	};
	75	};
e62c46bc	76
dbb6d864 CYT	77	vga-connector {
	78	compatible = "vga-connector";
	79	label = "vga";
	80	ddc-i2c-bus = <&i2c3>;
	81
	82	port {
	83	vga_con_in: endpoint {
	84	remote-endpoint = <&vga_dac_out>;
	85	};
	86	};
	87	};
	88
	89	vga-dac {
	90	compatible = "corpro,gm7123", "adi,adv7123", "dumb-vga-dac";
	91	vdd-supply = <&reg_dcdc1>;
	92	#address-cells = <1>;
	93	#size-cells = <0>;
	94
	95	ports {
	96	#address-cells = <1>;
	97	#size-cells = <0>;
	98
	99	port@0 {
	100	#address-cells = <1>;
	101	#size-cells = <0>;
	102	reg = <0>;
	103
	104	vga_dac_in: endpoint@0 {
	105	reg = <0>;
	106	remote-endpoint = <&tcon0_out_vga>;
	107	};
	108	};
	109
	110	port@1 {
	111	#address-cells = <1>;
	112	#size-cells = <0>;
	113	reg = <1>;
	114
	115	vga_dac_out: endpoint@0 {
	116	reg = <0>;
	117	remote-endpoint = <&vga_con_in>;
	118	};
	119	};
	120	};
	121	};
	122
333bf2e6	123	wifi_pwrseq: wifi-pwrseq {
e62c46bc CYT	124	compatible = "mmc-pwrseq-simple";
	125	clocks = <&ac100_rtc 1>;
	126	clock-names = "ext_clock";
	127	/* enables internal regulator and de-asserts reset */
	128	reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
	129	};
6d11c8e2 TB	130	};
6d11c8e2 TB	131
dbb6d864 CYT	132	&de {
	133	status = "okay";
	134	};
	135
98048143 CYT	136	&gmac {
	137	pinctrl-names = "default";
	138	pinctrl-0 = <&gmac_rgmii_pins>;
	139	phy = <&phy1>;
	140	phy-mode = "rgmii";
	141	phy-supply = <&reg_cldo1>;
	142	status = "okay";
	143
	144	phy1: ethernet-phy@1 {
	145	reg = <1>;
	146	};
	147	};
	148
dbb6d864 CYT	149	&i2c3 {
	150	pinctrl-names = "default";
	151	pinctrl-0 = <&i2c3_pins>;
	152	status = "okay";
	153	};
	154
6d11c8e2 TB	155	&mmc0 {
6d11c8e2 TB	156	pinctrl-names = "default";
eb2d0fab	157	pinctrl-0 = <&mmc0_pins>;
1e1dea72	158	vmmc-supply = <&reg_dcdc1>;
6d11c8e2	159	bus-width = <4>;
45e01f40	160	cd-gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; /* PH18 */
6d11c8e2 TB	161	status = "okay";
	162	};
	163
e62c46bc CYT	164	&mmc1 {
e62c46bc CYT	165	pinctrl-names = "default";
1848f3f4	166	pinctrl-0 = <&mmc1_pins>;
e62c46bc CYT	167	vmmc-supply = <&reg_dldo1>;
	168	vqmmc-supply = <&reg_cldo3>;
	169	mmc-pwrseq = <&wifi_pwrseq>;
	170	bus-width = <4>;
	171	non-removable;
	172	status = "okay";
	173	};
	174
	175	&mmc1_pins {
1edcd36f	176	bias-pull-up;
e62c46bc CYT	177	};
e62c46bc CYT	178
6d11c8e2 TB	179	&mmc2 {
	180	pinctrl-names = "default";
	181	pinctrl-0 = <&mmc2_8bit_pins>;
1e1dea72	182	vmmc-supply = <&reg_dcdc1>;
6d11c8e2 TB	183	bus-width = <8>;
6d11c8e2 TB	184	non-removable;
8826532c	185	cap-mmc-hw-reset;
6d11c8e2 TB	186	status = "okay";
	187	};
	188
8826532c CYT	189	&mmc2_8bit_pins {
8826532c CYT	190	/* Increase drive strength for DDR modes */
1edcd36f	191	drive-strength = <40>;
8826532c CYT	192	};
8826532c CYT	193
16266987 CYT	194	&osc32k {
	195	/* osc32k input is from AC100 */
	196	clocks = <&ac100_rtc 0>;
	197	};
	198
b3e1f4be CYT	199	&pio {
	200	vcc-pa-supply = <&reg_ldo_io1>;
	201	vcc-pb-supply = <&reg_aldo2>;
	202	vcc-pc-supply = <&reg_dcdc1>;
	203	vcc-pd-supply = <&reg_dc1sw>;
	204	vcc-pe-supply = <&reg_eldo2>;
	205	vcc-pf-supply = <&reg_dcdc1>;
	206	vcc-pg-supply = <&reg_ldo_io0>;
	207	vcc-ph-supply = <&reg_dcdc1>;
	208	};
	209
62b4b20c CYT	210	&r_ir {
	211	status = "okay";
	212	};
	213
b3e1f4be CYT	214	&r_pio {
	215	vcc-pl-supply = <&reg_dldo2>;
	216	vcc-pm-supply = <&reg_eldo3>;
	217	};
	218
6f353f61 CYT	219	&r_rsb {
6f353f61 CYT	220	status = "okay";
1e1dea72 CYT	221
	222	axp809: pmic@3a3 {
	223	reg = <0x3a3>;
	224	interrupt-parent = <&nmi_intc>;
	225	interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
	226
	227	regulators {
	228	reg_aldo1: aldo1 {
	229	/*
	230	* TODO: This should be handled by the
	231	* USB PHY driver.
	232	*/
	233	regulator-always-on;
	234	regulator-min-microvolt = <3000000>;
	235	regulator-max-microvolt = <3000000>;
	236	regulator-name = "vcc33-usbh";
	237	};
	238
	239	reg_aldo2: aldo2 {
	240	regulator-min-microvolt = <1800000>;
	241	regulator-max-microvolt = <1800000>;
	242	regulator-name = "vcc-pb-io-cam";
	243	};
	244
	245	aldo3 {
	246	/* unused */
	247	};
	248
b3e1f4be CYT	249	reg_dc1sw: dc1sw {
	250	regulator-name = "vcc-pd";
	251	};
	252
1e1dea72 CYT	253	reg_dc5ldo: dc5ldo {
	254	regulator-always-on;
	255	regulator-min-microvolt = <800000>;
	256	regulator-max-microvolt = <1100000>;
	257	regulator-name = "vdd-cpus-09-usbh";
	258	};
	259
	260	reg_dcdc1: dcdc1 {
	261	regulator-always-on;
	262	regulator-min-microvolt = <3000000>;
	263	regulator-max-microvolt = <3000000>;
	264	regulator-name = "vcc-3v";
	265	};
	266
	267	reg_dcdc2: dcdc2 {
	268	regulator-min-microvolt = <800000>;
	269	regulator-max-microvolt = <1100000>;
	270	regulator-name = "vdd-gpu";
	271	};
	272
	273	reg_dcdc3: dcdc3 {
	274	regulator-always-on;
	275	regulator-min-microvolt = <800000>;
	276	regulator-max-microvolt = <1100000>;
	277	regulator-name = "vdd-cpua";
	278	};
	279
	280	reg_dcdc4: dcdc4 {
	281	regulator-always-on;
	282	regulator-min-microvolt = <800000>;
	283	regulator-max-microvolt = <1100000>;
	284	regulator-name = "vdd-sys-usb0-hdmi";
	285	};
	286
	287	reg_dcdc5: dcdc5 {
	288	regulator-always-on;
	289	regulator-min-microvolt = <1425000>;
	290	regulator-max-microvolt = <1575000>;
	291	regulator-name = "vcc-dram";
	292	};
	293
	294	reg_dldo1: dldo1 {
	295	/*
	296	* The WiFi chip supports a wide range
	297	* (3.0 ~ 4.8V) of voltages, and so does
	298	* this regulator (3.0 ~ 4.2V), but
	299	* Allwinner SDK always sets it to 3.3V.
	300	*/
	301	regulator-min-microvolt = <3300000>;
	302	regulator-max-microvolt = <3300000>;
	303	regulator-name = "vcc-wifi";
	304	};
	305
	306	reg_dldo2: dldo2 {
1e1dea72 CYT	307	regulator-min-microvolt = <3000000>;
	308	regulator-max-microvolt = <3000000>;
	309	regulator-name = "vcc-pl";
	310	};
	311
	312	reg_eldo1: eldo1 {
	313	regulator-min-microvolt = <1200000>;
	314	regulator-max-microvolt = <1200000>;
	315	regulator-name = "vcc-dvdd-cam";
	316	};
	317
	318	reg_eldo2: eldo2 {
	319	regulator-min-microvolt = <1800000>;
	320	regulator-max-microvolt = <1800000>;
	321	regulator-name = "vcc-pe";
	322	};
	323
	324	reg_eldo3: eldo3 {
1e1dea72 CYT	325	regulator-min-microvolt = <3000000>;
	326	regulator-max-microvolt = <3000000>;
	327	regulator-name = "vcc-pm-codec-io1";
	328	};
	329
	330	reg_ldo_io0: ldo_io0 {
1e1dea72 CYT	331	regulator-min-microvolt = <3000000>;
	332	regulator-max-microvolt = <3000000>;
	333	regulator-name = "vcc-pg";
	334	};
	335
	336	reg_ldo_io1: ldo_io1 {
	337	regulator-min-microvolt = <2500000>;
	338	regulator-max-microvolt = <2500000>;
	339	regulator-name = "vcc-pa-gmac-2v5";
	340	};
	341
	342	reg_rtc_ldo: rtc_ldo {
	343	regulator-name = "vcc-rtc-vdd1v8-io";
	344	};
296450c2 CYT	345
	346	sw {
	347	/* unused */
	348	};
1e1dea72 CYT	349	};
1e1dea72 CYT	350	};
38f151d4	351
f97f02ee CYT	352	axp806: pmic@745 {
	353	compatible = "x-powers,axp806";
	354	reg = <0x745>;
	355	interrupt-parent = <&nmi_intc>;
	356	interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
	357	interrupt-controller;
	358	#interrupt-cells = <1>;
	359	bldoin-supply = <&reg_dcdce>;
	360
	361	regulators {
	362	reg_s_aldo1: aldo1 {
	363	regulator-always-on;
	364	regulator-min-microvolt = <3000000>;
	365	regulator-max-microvolt = <3000000>;
	366	regulator-name = "avcc";
	367	};
	368
	369	aldo2 {
	370	/*
	371	* unused, but use a different name to
	372	* avoid name clash with axp809's aldo's
	373	*/
	374	regulator-name = "s_aldo2";
	375	};
	376
	377	aldo3 {
	378	/*
	379	* unused, but use a different name to
	380	* avoid name clash with axp809's aldo's
	381	*/
	382	regulator-name = "s_aldo3";
	383	};
	384
	385	reg_bldo1: bldo1 {
	386	regulator-always-on;
	387	regulator-min-microvolt = <1700000>;
	388	regulator-max-microvolt = <1900000>;
	389	regulator-name = "vcc18-efuse-adc-display-csi";
	390	};
	391
	392	reg_bldo2: bldo2 {
	393	regulator-always-on;
	394	regulator-min-microvolt = <1700000>;
	395	regulator-max-microvolt = <1900000>;
	396	regulator-name =
	397	"vdd18-drampll-vcc18-pll-cpvdd";
	398	};
	399
	400	bldo3 {
	401	/* unused */
	402	};
	403
	404	reg_bldo4: bldo4 {
	405	regulator-min-microvolt = <1100000>;
	406	regulator-max-microvolt = <1300000>;
	407	regulator-name = "vcc12-hsic";
	408	};
	409
	410	reg_cldo1: cldo1 {
	411	/*
	412	* This was 3V in the original design, but
	413	* 3.3V is the recommended supply voltage
	414	* for the Ethernet PHY.
	415	*/
416	regulator-min-microvolt = <3300000>;
417	regulator-max-microvolt = <3300000>;
98048143 CYT	418	/*
	419	* The PHY requires 20ms after all voltages
	420	* are applied until core logic is ready and
	421	* 30ms after the reset pin is de-asserted.
	422	* Set a 100ms delay to account for PMIC
	423	* ramp time and board traces.
	424	*/
	425	regulator-enable-ramp-delay = <100000>;
f97f02ee CYT	426	regulator-name = "vcc-gmac-phy";
	427	};
	428
	429	reg_cldo2: cldo2 {
	430	regulator-min-microvolt = <2800000>;
	431	regulator-max-microvolt = <2800000>;
	432	regulator-name = "afvcc-cam";
	433	};
	434
	435	reg_cldo3: cldo3 {
	436	regulator-min-microvolt = <3000000>;
	437	regulator-max-microvolt = <3000000>;
	438	regulator-name = "vcc-io-wifi-codec-io2";
	439	};
	440
	441	reg_dcdca: dcdca {
	442	regulator-always-on;
	443	regulator-min-microvolt = <800000>;
	444	regulator-max-microvolt = <1100000>;
	445	regulator-name = "vdd-cpub";
	446	};
	447
	448	reg_dcdcd: dcdcd {
	449	regulator-always-on;
	450	regulator-min-microvolt = <800000>;
	451	regulator-max-microvolt = <1100000>;
	452	regulator-name = "vdd-vpu";
	453	};
	454
	455	reg_dcdce: dcdce {
	456	regulator-always-on;
	457	regulator-min-microvolt = <2100000>;
	458	regulator-max-microvolt = <2100000>;
	459	regulator-name = "vcc-bldo-codec-ldoin";
	460	};
	461
	462	sw {
	463	/*
	464	* unused, but use a different name to
	465	* avoid name clash with axp809's sw
	466	*/
	467	regulator-name = "s_sw";
	468	};
	469	};
	470	};
	471
38f151d4 CYT	472	ac100: codec@e89 {
	473	compatible = "x-powers,ac100";
	474	reg = <0xe89>;
	475
	476	ac100_codec: codec {
	477	compatible = "x-powers,ac100-codec";
	478	interrupt-parent = <&r_pio>;
	479	interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PL9 */
	480	#clock-cells = <0>;
	481	clock-output-names = "4M_adda";
	482	};
	483
	484	ac100_rtc: rtc {
	485	compatible = "x-powers,ac100-rtc";
	486	interrupt-parent = <&nmi_intc>;
	487	interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
	488	clocks = <&ac100_codec>;
	489	#clock-cells = <1>;
	490	clock-output-names = "cko1_rtc",
	491	"cko2_rtc",
	492	"cko3_rtc";
	493	};
	494	};
6f353f61 CYT	495	};
6f353f61 CYT	496
1e1dea72 CYT	497	#include "axp809.dtsi"
1e1dea72 CYT	498
dbb6d864 CYT	499	&tcon0 {
	500	pinctrl-names = "default";
	501	pinctrl-0 = <&lcd0_rgb888_pins>;
	502	};
	503
	504	&tcon0_out {
	505	tcon0_out_vga: endpoint@0 {
	506	reg = <0>;
	507	remote-endpoint = <&vga_dac_in>;
	508	};
	509	};
	510
6d11c8e2 TB	511	&uart0 {
6d11c8e2 TB	512	pinctrl-names = "default";
d177864f	513	pinctrl-0 = <&uart0_ph_pins>;
6d11c8e2 TB	514	status = "okay";
6d11c8e2 TB	515	};