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Commit | Line | Data |
---|---|---|
8e267f3d GL |
1 | /dts-v1/; |
2 | ||
8e267f3d GL |
3 | /include/ "tegra20.dtsi" |
4 | ||
5 | / { | |
6 | model = "NVIDIA Seaboard"; | |
7 | compatible = "nvidia,seaboard", "nvidia,tegra20"; | |
8 | ||
8e267f3d GL |
9 | memory { |
10 | device_type = "memory"; | |
95decf84 | 11 | reg = <0x00000000 0x40000000>; |
8e267f3d GL |
12 | }; |
13 | ||
ecc295bb SW |
14 | pinmux@70000000 { |
15 | pinctrl-names = "default"; | |
16 | pinctrl-0 = <&state_default>; | |
17 | ||
18 | state_default: pinmux { | |
19 | ata { | |
20 | nvidia,pins = "ata"; | |
21 | nvidia,function = "ide"; | |
22 | }; | |
23 | atb { | |
24 | nvidia,pins = "atb", "gma", "gme"; | |
25 | nvidia,function = "sdio4"; | |
26 | }; | |
27 | atc { | |
28 | nvidia,pins = "atc"; | |
29 | nvidia,function = "nand"; | |
30 | }; | |
31 | atd { | |
32 | nvidia,pins = "atd", "ate", "gmb", "spia", | |
33 | "spib", "spic"; | |
34 | nvidia,function = "gmi"; | |
35 | }; | |
36 | cdev1 { | |
37 | nvidia,pins = "cdev1"; | |
38 | nvidia,function = "plla_out"; | |
39 | }; | |
40 | cdev2 { | |
41 | nvidia,pins = "cdev2"; | |
42 | nvidia,function = "pllp_out4"; | |
43 | }; | |
44 | crtp { | |
45 | nvidia,pins = "crtp", "lm1"; | |
46 | nvidia,function = "crt"; | |
47 | }; | |
48 | csus { | |
49 | nvidia,pins = "csus"; | |
50 | nvidia,function = "vi_sensor_clk"; | |
51 | }; | |
52 | dap1 { | |
53 | nvidia,pins = "dap1"; | |
54 | nvidia,function = "dap1"; | |
55 | }; | |
56 | dap2 { | |
57 | nvidia,pins = "dap2"; | |
58 | nvidia,function = "dap2"; | |
59 | }; | |
60 | dap3 { | |
61 | nvidia,pins = "dap3"; | |
62 | nvidia,function = "dap3"; | |
63 | }; | |
64 | dap4 { | |
65 | nvidia,pins = "dap4"; | |
66 | nvidia,function = "dap4"; | |
67 | }; | |
68 | ddc { | |
69 | nvidia,pins = "ddc", "owc", "spdi", "spdo", | |
70 | "uac"; | |
71 | nvidia,function = "rsvd2"; | |
72 | }; | |
73 | dta { | |
74 | nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; | |
75 | nvidia,function = "vi"; | |
76 | }; | |
77 | dtf { | |
78 | nvidia,pins = "dtf"; | |
79 | nvidia,function = "i2c3"; | |
80 | }; | |
81 | gmc { | |
82 | nvidia,pins = "gmc"; | |
83 | nvidia,function = "uartd"; | |
84 | }; | |
85 | gmd { | |
86 | nvidia,pins = "gmd"; | |
87 | nvidia,function = "sflash"; | |
88 | }; | |
89 | gpu { | |
90 | nvidia,pins = "gpu"; | |
91 | nvidia,function = "pwm"; | |
92 | }; | |
93 | gpu7 { | |
94 | nvidia,pins = "gpu7"; | |
95 | nvidia,function = "rtck"; | |
96 | }; | |
97 | gpv { | |
98 | nvidia,pins = "gpv", "slxa", "slxk"; | |
99 | nvidia,function = "pcie"; | |
100 | }; | |
101 | hdint { | |
102 | nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1", | |
802a8499 | 103 | "lsck", "lsda"; |
ecc295bb SW |
104 | nvidia,function = "hdmi"; |
105 | }; | |
106 | i2cp { | |
107 | nvidia,pins = "i2cp"; | |
108 | nvidia,function = "i2cp"; | |
109 | }; | |
110 | irrx { | |
111 | nvidia,pins = "irrx", "irtx"; | |
112 | nvidia,function = "uartb"; | |
113 | }; | |
114 | kbca { | |
115 | nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", | |
116 | "kbce", "kbcf"; | |
117 | nvidia,function = "kbc"; | |
118 | }; | |
119 | lcsn { | |
120 | nvidia,pins = "lcsn", "ldc", "lm0", "lpw1", | |
121 | "lsdi", "lvp0"; | |
122 | nvidia,function = "rsvd4"; | |
123 | }; | |
124 | ld0 { | |
125 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", | |
126 | "ld5", "ld6", "ld7", "ld8", "ld9", | |
127 | "ld10", "ld11", "ld12", "ld13", "ld14", | |
128 | "ld15", "ld16", "ld17", "ldi", "lhp0", | |
129 | "lhp1", "lhp2", "lhs", "lpp", "lsc0", | |
130 | "lspi", "lvp1", "lvs"; | |
131 | nvidia,function = "displaya"; | |
132 | }; | |
133 | pmc { | |
134 | nvidia,pins = "pmc"; | |
135 | nvidia,function = "pwr_on"; | |
136 | }; | |
802a8499 SW |
137 | pta { |
138 | nvidia,pins = "pta"; | |
139 | nvidia,function = "i2c2"; | |
140 | }; | |
ecc295bb SW |
141 | rm { |
142 | nvidia,pins = "rm"; | |
143 | nvidia,function = "i2c1"; | |
144 | }; | |
145 | sdb { | |
146 | nvidia,pins = "sdb", "sdc", "sdd"; | |
147 | nvidia,function = "sdio3"; | |
148 | }; | |
149 | sdio1 { | |
150 | nvidia,pins = "sdio1"; | |
151 | nvidia,function = "sdio1"; | |
152 | }; | |
153 | slxc { | |
154 | nvidia,pins = "slxc", "slxd"; | |
155 | nvidia,function = "spdif"; | |
156 | }; | |
157 | spid { | |
158 | nvidia,pins = "spid", "spie", "spif"; | |
159 | nvidia,function = "spi1"; | |
160 | }; | |
161 | spig { | |
162 | nvidia,pins = "spig", "spih"; | |
163 | nvidia,function = "spi2_alt"; | |
164 | }; | |
165 | uaa { | |
166 | nvidia,pins = "uaa", "uab", "uda"; | |
167 | nvidia,function = "ulpi"; | |
168 | }; | |
169 | uad { | |
170 | nvidia,pins = "uad"; | |
171 | nvidia,function = "irda"; | |
172 | }; | |
173 | uca { | |
174 | nvidia,pins = "uca", "ucb"; | |
175 | nvidia,function = "uartc"; | |
176 | }; | |
177 | conf_ata { | |
178 | nvidia,pins = "ata", "atb", "atc", "atd", | |
179 | "cdev1", "cdev2", "dap1", "dap2", | |
180 | "dap4", "dtf", "gma", "gmc", "gmd", | |
181 | "gme", "gpu", "gpu7", "i2cp", "irrx", | |
182 | "irtx", "pta", "rm", "sdc", "sdd", | |
183 | "slxd", "slxk", "spdi", "spdo", "uac", | |
184 | "uad", "uca", "ucb", "uda"; | |
185 | nvidia,pull = <0>; | |
186 | nvidia,tristate = <0>; | |
187 | }; | |
188 | conf_ate { | |
189 | nvidia,pins = "ate", "csus", "dap3", "ddc", | |
190 | "gpv", "owc", "slxc", "spib", "spid", | |
191 | "spie"; | |
192 | nvidia,pull = <0>; | |
193 | nvidia,tristate = <1>; | |
194 | }; | |
195 | conf_ck32 { | |
196 | nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", | |
197 | "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; | |
198 | nvidia,pull = <0>; | |
199 | }; | |
200 | conf_crtp { | |
201 | nvidia,pins = "crtp", "gmb", "slxa", "spia", | |
202 | "spig", "spih"; | |
203 | nvidia,pull = <2>; | |
204 | nvidia,tristate = <1>; | |
205 | }; | |
206 | conf_dta { | |
207 | nvidia,pins = "dta", "dtb", "dtc", "dtd"; | |
208 | nvidia,pull = <1>; | |
209 | nvidia,tristate = <0>; | |
210 | }; | |
211 | conf_dte { | |
212 | nvidia,pins = "dte", "spif"; | |
213 | nvidia,pull = <1>; | |
214 | nvidia,tristate = <1>; | |
215 | }; | |
216 | conf_hdint { | |
217 | nvidia,pins = "hdint", "lcsn", "ldc", "lm1", | |
218 | "lpw1", "lsc1", "lsck", "lsda", "lsdi", | |
219 | "lvp0"; | |
220 | nvidia,tristate = <1>; | |
221 | }; | |
222 | conf_kbca { | |
223 | nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", | |
224 | "kbce", "kbcf", "sdio1", "spic", "uaa", | |
225 | "uab"; | |
226 | nvidia,pull = <2>; | |
227 | nvidia,tristate = <0>; | |
228 | }; | |
229 | conf_lc { | |
230 | nvidia,pins = "lc", "ls"; | |
231 | nvidia,pull = <2>; | |
232 | }; | |
233 | conf_ld0 { | |
234 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", | |
235 | "ld5", "ld6", "ld7", "ld8", "ld9", | |
236 | "ld10", "ld11", "ld12", "ld13", "ld14", | |
237 | "ld15", "ld16", "ld17", "ldi", "lhp0", | |
238 | "lhp1", "lhp2", "lhs", "lm0", "lpp", | |
239 | "lpw0", "lpw2", "lsc0", "lspi", "lvp1", | |
240 | "lvs", "pmc", "sdb"; | |
241 | nvidia,tristate = <0>; | |
242 | }; | |
243 | conf_ld17_0 { | |
244 | nvidia,pins = "ld17_0", "ld19_18", "ld21_20", | |
245 | "ld23_22"; | |
246 | nvidia,pull = <1>; | |
247 | }; | |
248 | drive_sdio1 { | |
249 | nvidia,pins = "drive_sdio1"; | |
250 | nvidia,high-speed-mode = <0>; | |
251 | nvidia,schmitt = <0>; | |
252 | nvidia,low-power-mode = <3>; | |
253 | nvidia,pull-down-strength = <31>; | |
254 | nvidia,pull-up-strength = <31>; | |
255 | nvidia,slew-rate-rising = <3>; | |
256 | nvidia,slew-rate-falling = <3>; | |
257 | }; | |
258 | }; | |
259 | }; | |
260 | ||
88950f3b SW |
261 | i2c@7000c000 { |
262 | clock-frequency = <400000>; | |
797acf70 SW |
263 | |
264 | wm8903: wm8903@1a { | |
265 | compatible = "wlf,wm8903"; | |
266 | reg = <0x1a>; | |
267 | interrupt-parent = <&gpio>; | |
95decf84 | 268 | interrupts = <187 0x04>; |
797acf70 SW |
269 | |
270 | gpio-controller; | |
271 | #gpio-cells = <2>; | |
272 | ||
273 | micdet-cfg = <0>; | |
274 | micdet-delay = <100>; | |
95decf84 | 275 | gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; |
797acf70 | 276 | }; |
b46b0b54 LD |
277 | |
278 | /* ALS and proximity sensor */ | |
279 | isl29018@44 { | |
280 | compatible = "isil,isl29018"; | |
281 | reg = <0x44>; | |
282 | interrupt-parent = <&gpio>; | |
95decf84 | 283 | interrupts = <202 0x04>; /* GPIO PZ2 */ |
b46b0b54 | 284 | }; |
45dbe9dd OJ |
285 | |
286 | gyrometer@68 { | |
287 | compatible = "invn,mpu3050"; | |
288 | reg = <0x68>; | |
289 | interrupt-parent = <&gpio>; | |
290 | interrupts = <204 0x04>; /* gpio PZ4 */ | |
291 | }; | |
88950f3b SW |
292 | }; |
293 | ||
294 | i2c@7000c400 { | |
22bd1f7e | 295 | clock-frequency = <100000>; |
45dbe9dd OJ |
296 | |
297 | smart-battery@b { | |
298 | compatible = "ti,bq20z75", "smart-battery-1.1"; | |
299 | reg = <0xb>; | |
300 | ti,i2c-retry-count = <2>; | |
301 | ti,poll-retry-count = <10>; | |
302 | }; | |
88950f3b SW |
303 | }; |
304 | ||
305 | i2c@7000c500 { | |
306 | clock-frequency = <400000>; | |
307 | }; | |
308 | ||
309 | i2c@7000d000 { | |
310 | clock-frequency = <400000>; | |
401c9a50 | 311 | |
45dbe9dd OJ |
312 | temperature-sensor@4c { |
313 | compatible = "nct1008"; | |
401c9a50 SW |
314 | reg = <0x4c>; |
315 | }; | |
45dbe9dd OJ |
316 | |
317 | magnetometer@c { | |
318 | compatible = "ak8975"; | |
319 | reg = <0xc>; | |
320 | interrupt-parent = <&gpio>; | |
321 | interrupts = <109 0x04>; /* gpio PN5 */ | |
322 | }; | |
88950f3b SW |
323 | }; |
324 | ||
797acf70 SW |
325 | i2s@70002a00 { |
326 | status = "disable"; | |
327 | }; | |
328 | ||
329 | sound { | |
330 | compatible = "nvidia,tegra-audio-wm8903-seaboard", | |
331 | "nvidia,tegra-audio-wm8903"; | |
332 | nvidia,model = "NVIDIA Tegra Seaboard"; | |
333 | ||
334 | nvidia,audio-routing = | |
335 | "Headphone Jack", "HPOUTR", | |
336 | "Headphone Jack", "HPOUTL", | |
337 | "Int Spk", "ROP", | |
338 | "Int Spk", "RON", | |
339 | "Int Spk", "LOP", | |
340 | "Int Spk", "LON", | |
341 | "Mic Jack", "MICBIAS", | |
342 | "IN1R", "Mic Jack"; | |
343 | ||
344 | nvidia,i2s-controller = <&tegra_i2s1>; | |
345 | nvidia,audio-codec = <&wm8903>; | |
346 | ||
347 | nvidia,spkr-en-gpios = <&wm8903 2 0>; | |
348 | nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */ | |
349 | }; | |
350 | ||
31c1ec92 SW |
351 | serial@70006000 { |
352 | status = "disable"; | |
353 | }; | |
354 | ||
355 | serial@70006040 { | |
356 | status = "disable"; | |
357 | }; | |
358 | ||
359 | serial@70006200 { | |
360 | status = "disable"; | |
361 | }; | |
362 | ||
8e267f3d | 363 | serial@70006300 { |
95decf84 | 364 | clock-frequency = <216000000>; |
8e267f3d GL |
365 | }; |
366 | ||
31c1ec92 SW |
367 | serial@70006400 { |
368 | status = "disable"; | |
369 | }; | |
370 | ||
1292c129 SW |
371 | sdhci@c8000000 { |
372 | status = "disable"; | |
373 | }; | |
374 | ||
375 | sdhci@c8000200 { | |
376 | status = "disable"; | |
377 | }; | |
378 | ||
8e267f3d | 379 | sdhci@c8000400 { |
a0638eb6 SW |
380 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ |
381 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | |
382 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ | |
8e267f3d | 383 | }; |
6111d50c SW |
384 | |
385 | sdhci@c8000600 { | |
386 | support-8bit; | |
387 | }; | |
c27317c0 OJ |
388 | |
389 | usb@c5000000 { | |
390 | nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */ | |
0a428036 | 391 | dr_mode = "otg"; |
c27317c0 | 392 | }; |
f0d14306 SW |
393 | |
394 | gpio-keys { | |
395 | compatible = "gpio-keys"; | |
396 | ||
397 | power { | |
398 | label = "Power"; | |
399 | gpios = <&gpio 170 1>; /* gpio PV2, active low */ | |
400 | linux,code = <116>; /* KEY_POWER */ | |
401 | gpio-key,wakeup; | |
402 | }; | |
403 | ||
404 | lid { | |
405 | label = "Lid"; | |
406 | gpios = <&gpio 23 0>; /* gpio PC7 */ | |
407 | linux,input-type = <5>; /* EV_SW */ | |
408 | linux,code = <0>; /* SW_LID */ | |
409 | debounce-interval = <1>; | |
410 | gpio-key,wakeup; | |
411 | }; | |
412 | }; | |
d8017a97 OJ |
413 | |
414 | emc@7000f400 { | |
415 | emc-table@190000 { | |
95decf84 | 416 | reg = <190000>; |
d8017a97 | 417 | compatible = "nvidia,tegra20-emc-table"; |
95decf84 SW |
418 | clock-frequency = <190000>; |
419 | nvidia,emc-registers = <0x0000000c 0x00000026 | |
d8017a97 OJ |
420 | 0x00000009 0x00000003 0x00000004 0x00000004 |
421 | 0x00000002 0x0000000c 0x00000003 0x00000003 | |
422 | 0x00000002 0x00000001 0x00000004 0x00000005 | |
423 | 0x00000004 0x00000009 0x0000000d 0x0000059f | |
424 | 0x00000000 0x00000003 0x00000003 0x00000003 | |
425 | 0x00000003 0x00000001 0x0000000b 0x000000c8 | |
426 | 0x00000003 0x00000007 0x00000004 0x0000000f | |
427 | 0x00000002 0x00000000 0x00000000 0x00000002 | |
428 | 0x00000000 0x00000000 0x00000083 0xa06204ae | |
429 | 0x007dc010 0x00000000 0x00000000 0x00000000 | |
95decf84 | 430 | 0x00000000 0x00000000 0x00000000 0x00000000>; |
d8017a97 OJ |
431 | }; |
432 | ||
433 | emc-table@380000 { | |
95decf84 | 434 | reg = <380000>; |
d8017a97 | 435 | compatible = "nvidia,tegra20-emc-table"; |
95decf84 SW |
436 | clock-frequency = <380000>; |
437 | nvidia,emc-registers = <0x00000017 0x0000004b | |
d8017a97 OJ |
438 | 0x00000012 0x00000006 0x00000004 0x00000005 |
439 | 0x00000003 0x0000000c 0x00000006 0x00000006 | |
440 | 0x00000003 0x00000001 0x00000004 0x00000005 | |
441 | 0x00000004 0x00000009 0x0000000d 0x00000b5f | |
442 | 0x00000000 0x00000003 0x00000003 0x00000006 | |
443 | 0x00000006 0x00000001 0x00000011 0x000000c8 | |
444 | 0x00000003 0x0000000e 0x00000007 0x0000000f | |
445 | 0x00000002 0x00000000 0x00000000 0x00000002 | |
446 | 0x00000000 0x00000000 0x00000083 0xe044048b | |
447 | 0x007d8010 0x00000000 0x00000000 0x00000000 | |
95decf84 | 448 | 0x00000000 0x00000000 0x00000000 0x00000000>; |
d8017a97 OJ |
449 | }; |
450 | }; | |
aa607ebf SW |
451 | |
452 | usb@c5004000 { | |
453 | nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ | |
454 | }; | |
8e267f3d | 455 | }; |