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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
53d02858 TV |
2 | #include <dt-bindings/input/input.h> |
3 | #include "tegra124.dtsi" | |
4 | ||
5 | / { | |
6 | aliases { | |
b5896f67 MZ |
7 | rtc0 = "/i2c@7000d000/pmic@40"; |
8 | rtc1 = "/rtc@7000e000"; | |
53d02858 TV |
9 | serial0 = &uarta; |
10 | }; | |
11 | ||
f5bbb327 JH |
12 | chosen { |
13 | stdout-path = "serial0:115200n8"; | |
14 | }; | |
15 | ||
94d9b933 TR |
16 | /* |
17 | * Note that recent version of the device tree compiler (starting with | |
18 | * version 1.4.2) warn about this node containing a reg property, but | |
19 | * missing a unit-address. However, the bootloader on these Chromebook | |
20 | * devices relies on the full name of this node to be exactly /memory. | |
21 | * Adding the unit-address causes the bootloader to create a /memory | |
22 | * node and write the memory bank configuration to that node, which in | |
23 | * turn leads the kernel to believe that the device has 2 GiB of | |
24 | * memory instead of the amount detected by the bootloader. | |
25 | * | |
26 | * The name of this node is effectively ABI and must not be changed. | |
27 | */ | |
28 | memory { | |
29 | device_type = "memory"; | |
53d02858 TV |
30 | reg = <0x0 0x80000000 0x0 0x80000000>; |
31 | }; | |
32 | ||
94d9b933 TR |
33 | /delete-node/ memory@80000000; |
34 | ||
b5896f67 MZ |
35 | host1x@50000000 { |
36 | hdmi@54280000 { | |
53d02858 TV |
37 | status = "okay"; |
38 | ||
39 | vdd-supply = <&vdd_3v3_hdmi>; | |
40 | pll-supply = <&vdd_hdmi_pll>; | |
41 | hdmi-supply = <&vdd_5v0_hdmi>; | |
42 | ||
43 | nvidia,ddc-i2c-bus = <&hdmi_ddc>; | |
44 | nvidia,hpd-gpio = | |
45 | <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; | |
46 | }; | |
47 | ||
b5896f67 | 48 | sor@54540000 { |
53d02858 TV |
49 | status = "okay"; |
50 | ||
51 | nvidia,dpaux = <&dpaux>; | |
52 | nvidia,panel = <&panel>; | |
53 | }; | |
54 | ||
b5896f67 | 55 | dpaux@545c0000 { |
53d02858 TV |
56 | vdd-supply = <&vdd_3v3_panel>; |
57 | status = "okay"; | |
58 | }; | |
59 | }; | |
60 | ||
5d831dd5 PK |
61 | gpu@0,57000000 { |
62 | status = "okay"; | |
63 | ||
64 | vdd-supply = <&vdd_gpu>; | |
65 | }; | |
66 | ||
b5896f67 | 67 | serial@70006000 { |
53d02858 TV |
68 | /* Debug connector on the bottom of the board near SD card. */ |
69 | status = "okay"; | |
70 | }; | |
71 | ||
b5896f67 | 72 | pwm@7000a000 { |
53d02858 TV |
73 | status = "okay"; |
74 | }; | |
75 | ||
b5896f67 | 76 | i2c@7000c000 { |
53d02858 TV |
77 | status = "okay"; |
78 | clock-frequency = <100000>; | |
79 | ||
80 | acodec: audio-codec@10 { | |
81 | compatible = "maxim,max98090"; | |
82 | reg = <0x10>; | |
83 | interrupt-parent = <&gpio>; | |
38333641 | 84 | interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>; |
53d02858 TV |
85 | }; |
86 | ||
87 | temperature-sensor@4c { | |
88 | compatible = "ti,tmp451"; | |
89 | reg = <0x4c>; | |
90 | interrupt-parent = <&gpio>; | |
91 | interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; | |
92 | ||
93 | #thermal-sensor-cells = <1>; | |
94 | }; | |
95 | }; | |
96 | ||
b5896f67 | 97 | i2c@7000c400 { |
53d02858 TV |
98 | status = "okay"; |
99 | clock-frequency = <100000>; | |
a0b9c1cb TV |
100 | |
101 | trackpad@15 { | |
102 | compatible = "elan,ekth3000"; | |
103 | reg = <0x15>; | |
104 | interrupt-parent = <&gpio>; | |
105 | interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>; | |
106 | wakeup-source; | |
107 | }; | |
53d02858 TV |
108 | }; |
109 | ||
b5896f67 | 110 | i2c@7000c500 { |
53d02858 TV |
111 | status = "okay"; |
112 | clock-frequency = <400000>; | |
113 | ||
114 | tpm@20 { | |
115 | compatible = "infineon,slb9645tt"; | |
116 | reg = <0x20>; | |
117 | }; | |
118 | }; | |
119 | ||
b5896f67 | 120 | hdmi_ddc: i2c@7000c700 { |
53d02858 TV |
121 | status = "okay"; |
122 | clock-frequency = <100000>; | |
123 | }; | |
124 | ||
b5896f67 | 125 | i2c@7000d000 { |
53d02858 TV |
126 | status = "okay"; |
127 | clock-frequency = <400000>; | |
128 | ||
129 | pmic: pmic@40 { | |
130 | compatible = "ams,as3722"; | |
131 | reg = <0x40>; | |
132 | interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; | |
133 | ||
134 | ams,system-power-controller; | |
135 | ||
136 | #interrupt-cells = <2>; | |
137 | interrupt-controller; | |
138 | ||
139 | gpio-controller; | |
140 | #gpio-cells = <2>; | |
141 | ||
142 | pinctrl-names = "default"; | |
143 | pinctrl-0 = <&as3722_default>; | |
144 | ||
145 | as3722_default: pinmux { | |
146 | gpio0 { | |
147 | pins = "gpio0"; | |
148 | function = "gpio"; | |
149 | bias-pull-down; | |
150 | }; | |
151 | ||
152 | gpio1 { | |
153 | pins = "gpio1"; | |
154 | function = "gpio"; | |
155 | bias-pull-up; | |
156 | }; | |
157 | ||
158 | gpio2_4_7 { | |
159 | pins = "gpio2", "gpio4", "gpio7"; | |
160 | function = "gpio"; | |
161 | bias-pull-up; | |
162 | }; | |
163 | ||
164 | gpio3_6 { | |
165 | pins = "gpio3", "gpio6"; | |
166 | bias-high-impedance; | |
167 | }; | |
168 | ||
169 | gpio5 { | |
170 | pins = "gpio5"; | |
171 | function = "clk32k-out"; | |
172 | bias-pull-down; | |
173 | }; | |
174 | }; | |
175 | ||
176 | regulators { | |
177 | vsup-sd2-supply = <&vdd_5v0_sys>; | |
178 | vsup-sd3-supply = <&vdd_5v0_sys>; | |
179 | vsup-sd4-supply = <&vdd_5v0_sys>; | |
180 | vsup-sd5-supply = <&vdd_5v0_sys>; | |
181 | vin-ldo0-supply = <&vdd_1v35_lp0>; | |
182 | vin-ldo1-6-supply = <&vdd_3v3_run>; | |
183 | vin-ldo2-5-7-supply = <&vddio_1v8>; | |
184 | vin-ldo3-4-supply = <&vdd_3v3_sys>; | |
185 | vin-ldo9-10-supply = <&vdd_5v0_sys>; | |
186 | vin-ldo11-supply = <&vdd_3v3_run>; | |
187 | ||
9a0baee9 | 188 | vdd_cpu: sd0 { |
53d02858 TV |
189 | regulator-name = "+VDD_CPU_AP"; |
190 | regulator-min-microvolt = <700000>; | |
191 | regulator-max-microvolt = <1350000>; | |
192 | regulator-min-microamp = <3500000>; | |
193 | regulator-max-microamp = <3500000>; | |
194 | regulator-always-on; | |
195 | regulator-boot-on; | |
196 | ams,ext-control = <2>; | |
197 | }; | |
198 | ||
199 | sd1 { | |
200 | regulator-name = "+VDD_CORE"; | |
201 | regulator-min-microvolt = <700000>; | |
202 | regulator-max-microvolt = <1350000>; | |
203 | regulator-min-microamp = <2500000>; | |
204 | regulator-max-microamp = <4000000>; | |
205 | regulator-always-on; | |
206 | regulator-boot-on; | |
207 | ams,ext-control = <1>; | |
208 | }; | |
209 | ||
210 | vdd_1v35_lp0: sd2 { | |
211 | regulator-name = "+1.35V_LP0(sd2)"; | |
212 | regulator-min-microvolt = <1350000>; | |
213 | regulator-max-microvolt = <1350000>; | |
214 | regulator-always-on; | |
215 | regulator-boot-on; | |
216 | }; | |
217 | ||
218 | sd3 { | |
219 | regulator-name = "+1.35V_LP0(sd3)"; | |
220 | regulator-min-microvolt = <1350000>; | |
221 | regulator-max-microvolt = <1350000>; | |
222 | regulator-always-on; | |
223 | regulator-boot-on; | |
224 | }; | |
225 | ||
226 | vdd_1v05_run: sd4 { | |
227 | regulator-name = "+1.05V_RUN"; | |
228 | regulator-min-microvolt = <1050000>; | |
229 | regulator-max-microvolt = <1050000>; | |
230 | }; | |
231 | ||
232 | vddio_1v8: sd5 { | |
233 | regulator-name = "+1.8V_VDDIO"; | |
234 | regulator-min-microvolt = <1800000>; | |
235 | regulator-max-microvolt = <1800000>; | |
53d02858 TV |
236 | regulator-always-on; |
237 | }; | |
238 | ||
5d831dd5 | 239 | vdd_gpu: sd6 { |
53d02858 TV |
240 | regulator-name = "+VDD_GPU_AP"; |
241 | regulator-min-microvolt = <650000>; | |
242 | regulator-max-microvolt = <1200000>; | |
243 | regulator-min-microamp = <3500000>; | |
244 | regulator-max-microamp = <3500000>; | |
245 | regulator-boot-on; | |
246 | regulator-always-on; | |
247 | }; | |
248 | ||
1333ce4d | 249 | avdd_1v05_run: ldo0 { |
53d02858 TV |
250 | regulator-name = "+1.05V_RUN_AVDD"; |
251 | regulator-min-microvolt = <1050000>; | |
252 | regulator-max-microvolt = <1050000>; | |
253 | regulator-boot-on; | |
254 | regulator-always-on; | |
255 | ams,ext-control = <1>; | |
256 | }; | |
257 | ||
258 | ldo1 { | |
259 | regulator-name = "+1.8V_RUN_CAM"; | |
260 | regulator-min-microvolt = <1800000>; | |
261 | regulator-max-microvolt = <1800000>; | |
262 | }; | |
263 | ||
264 | ldo2 { | |
265 | regulator-name = "+1.2V_GEN_AVDD"; | |
266 | regulator-min-microvolt = <1200000>; | |
267 | regulator-max-microvolt = <1200000>; | |
268 | regulator-boot-on; | |
269 | regulator-always-on; | |
270 | }; | |
271 | ||
272 | ldo3 { | |
273 | regulator-name = "+1.00V_LP0_VDD_RTC"; | |
274 | regulator-min-microvolt = <1000000>; | |
275 | regulator-max-microvolt = <1000000>; | |
276 | regulator-boot-on; | |
277 | regulator-always-on; | |
278 | ams,enable-tracking; | |
279 | }; | |
280 | ||
281 | vdd_run_cam: ldo4 { | |
282 | regulator-name = "+3.3V_RUN_CAM"; | |
283 | regulator-min-microvolt = <2800000>; | |
284 | regulator-max-microvolt = <2800000>; | |
285 | }; | |
286 | ||
287 | ldo5 { | |
288 | regulator-name = "+1.2V_RUN_CAM_FRONT"; | |
289 | regulator-min-microvolt = <1200000>; | |
290 | regulator-max-microvolt = <1200000>; | |
291 | }; | |
292 | ||
293 | vddio_sdmmc3: ldo6 { | |
294 | regulator-name = "+VDDIO_SDMMC3"; | |
295 | regulator-min-microvolt = <1800000>; | |
296 | regulator-max-microvolt = <3300000>; | |
297 | }; | |
298 | ||
299 | ldo7 { | |
300 | regulator-name = "+1.05V_RUN_CAM_REAR"; | |
301 | regulator-min-microvolt = <1050000>; | |
302 | regulator-max-microvolt = <1050000>; | |
303 | }; | |
304 | ||
305 | ldo9 { | |
306 | regulator-name = "+2.8V_RUN_TOUCH"; | |
307 | regulator-min-microvolt = <2800000>; | |
308 | regulator-max-microvolt = <2800000>; | |
309 | }; | |
310 | ||
311 | ldo10 { | |
312 | regulator-name = "+2.8V_RUN_CAM_AF"; | |
313 | regulator-min-microvolt = <2800000>; | |
314 | regulator-max-microvolt = <2800000>; | |
315 | }; | |
316 | ||
317 | ldo11 { | |
318 | regulator-name = "+1.8V_RUN_VPP_FUSE"; | |
319 | regulator-min-microvolt = <1800000>; | |
320 | regulator-max-microvolt = <1800000>; | |
321 | }; | |
322 | }; | |
323 | }; | |
324 | }; | |
325 | ||
b5896f67 | 326 | spi@7000d400 { |
53d02858 TV |
327 | status = "okay"; |
328 | ||
329 | cros_ec: cros-ec@0 { | |
330 | compatible = "google,cros-ec-spi"; | |
331 | spi-max-frequency = <3000000>; | |
332 | interrupt-parent = <&gpio>; | |
333 | interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>; | |
334 | reg = <0>; | |
335 | ||
336 | google,cros-ec-spi-msg-delay = <2000>; | |
337 | ||
338 | i2c-tunnel { | |
339 | compatible = "google,cros-ec-i2c-tunnel"; | |
340 | #address-cells = <1>; | |
341 | #size-cells = <0>; | |
342 | ||
343 | google,remote-bus = <0>; | |
344 | ||
345 | charger: bq24735@9 { | |
346 | compatible = "ti,bq24735"; | |
347 | reg = <0x9>; | |
348 | interrupt-parent = <&gpio>; | |
349 | interrupts = <TEGRA_GPIO(J, 0) | |
38333641 | 350 | IRQ_TYPE_EDGE_BOTH>; |
53d02858 TV |
351 | ti,ac-detect-gpios = <&gpio |
352 | TEGRA_GPIO(J, 0) | |
353 | GPIO_ACTIVE_HIGH>; | |
5fc01a99 | 354 | ti,external-control; |
53d02858 TV |
355 | }; |
356 | ||
357 | battery: sbs-battery@b { | |
358 | compatible = "sbs,sbs-battery"; | |
359 | reg = <0xb>; | |
360 | sbs,i2c-retry-count = <2>; | |
361 | sbs,poll-retry-count = <10>; | |
362 | power-supplies = <&charger>; | |
363 | }; | |
364 | }; | |
365 | }; | |
366 | }; | |
367 | ||
b5896f67 | 368 | spi@7000da00 { |
53d02858 TV |
369 | status = "okay"; |
370 | spi-max-frequency = <25000000>; | |
371 | ||
372 | flash@0 { | |
de45b787 | 373 | compatible = "winbond,w25q32dw", "jedec,spi-nor"; |
97e147e8 | 374 | spi-max-frequency = <25000000>; |
53d02858 TV |
375 | reg = <0>; |
376 | }; | |
377 | }; | |
378 | ||
b5896f67 | 379 | pmc@7000e400 { |
53d02858 TV |
380 | nvidia,invert-interrupt; |
381 | nvidia,suspend-mode = <0>; | |
382 | nvidia,cpu-pwr-good-time = <500>; | |
383 | nvidia,cpu-pwr-off-time = <300>; | |
384 | nvidia,core-pwr-good-time = <641 3845>; | |
385 | nvidia,core-pwr-off-time = <61036>; | |
386 | nvidia,core-power-req-active-high; | |
387 | nvidia,sys-clock-req-active-high; | |
388 | }; | |
389 | ||
b5896f67 | 390 | hda@70030000 { |
53d02858 TV |
391 | status = "okay"; |
392 | }; | |
393 | ||
b5896f67 MZ |
394 | usb@70090000 { |
395 | phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */ | |
396 | <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */ | |
397 | <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */ | |
398 | <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */ | |
399 | <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */ | |
1333ce4d TR |
400 | phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1"; |
401 | ||
402 | avddio-pex-supply = <&vdd_1v05_run>; | |
403 | dvddio-pex-supply = <&vdd_1v05_run>; | |
404 | avdd-usb-supply = <&vdd_3v3_lp0>; | |
405 | avdd-pll-utmip-supply = <&vddio_1v8>; | |
406 | avdd-pll-erefe-supply = <&avdd_1v05_run>; | |
407 | avdd-usb-ss-pll-supply = <&vdd_1v05_run>; | |
408 | hvdd-usb-ss-supply = <&vdd_3v3_lp0>; | |
409 | hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>; | |
410 | ||
411 | status = "okay"; | |
412 | }; | |
413 | ||
b5896f67 | 414 | padctl@7009f000 { |
1333ce4d TR |
415 | status = "okay"; |
416 | ||
417 | pads { | |
418 | usb2 { | |
419 | status = "okay"; | |
420 | ||
421 | lanes { | |
422 | usb2-0 { | |
423 | nvidia,function = "xusb"; | |
424 | status = "okay"; | |
425 | }; | |
426 | ||
427 | usb2-1 { | |
428 | nvidia,function = "xusb"; | |
429 | status = "okay"; | |
430 | }; | |
431 | ||
432 | usb2-2 { | |
433 | nvidia,function = "xusb"; | |
434 | status = "okay"; | |
435 | }; | |
436 | }; | |
437 | }; | |
438 | ||
439 | pcie { | |
440 | status = "okay"; | |
441 | ||
442 | lanes { | |
443 | pcie-0 { | |
444 | nvidia,function = "usb3-ss"; | |
445 | status = "okay"; | |
446 | }; | |
447 | ||
448 | pcie-1 { | |
449 | nvidia,function = "usb3-ss"; | |
450 | status = "okay"; | |
451 | }; | |
452 | }; | |
453 | }; | |
454 | }; | |
455 | ||
456 | ports { | |
457 | usb2-0 { | |
458 | vbus-supply = <&vdd_usb1_vbus>; | |
459 | status = "okay"; | |
460 | mode = "otg"; | |
461 | }; | |
462 | ||
463 | usb2-1 { | |
464 | vbus-supply = <&vdd_run_cam>; | |
465 | status = "okay"; | |
466 | mode = "host"; | |
467 | }; | |
468 | ||
469 | usb2-2 { | |
470 | vbus-supply = <&vdd_usb3_vbus>; | |
471 | status = "okay"; | |
472 | mode = "host"; | |
473 | }; | |
474 | ||
475 | usb3-0 { | |
476 | nvidia,usb2-companion = <0>; | |
477 | status = "okay"; | |
478 | }; | |
479 | ||
480 | usb3-1 { | |
481 | nvidia,usb2-companion = <1>; | |
482 | status = "okay"; | |
483 | }; | |
484 | }; | |
485 | }; | |
486 | ||
1d1690b8 TV |
487 | sdhci0_pwrseq: sdhci0_pwrseq { |
488 | compatible = "mmc-pwrseq-simple"; | |
489 | ||
490 | reset-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; | |
491 | }; | |
492 | ||
b5896f67 | 493 | sdhci@700b0000 { /* WiFi/BT on this bus */ |
53d02858 | 494 | status = "okay"; |
53d02858 TV |
495 | bus-width = <4>; |
496 | no-1-8-v; | |
497 | non-removable; | |
1d1690b8 TV |
498 | mmc-pwrseq = <&sdhci0_pwrseq>; |
499 | vmmc-supply = <&vdd_3v3_lp0>; | |
500 | vqmmc-supply = <&vddio_1v8>; | |
160b2dd7 | 501 | keep-power-in-suspend; |
53d02858 TV |
502 | }; |
503 | ||
b5896f67 | 504 | sdhci@700b0400 { /* SD Card on this bus */ |
53d02858 TV |
505 | status = "okay"; |
506 | cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; | |
507 | power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; | |
508 | bus-width = <4>; | |
509 | no-1-8-v; | |
510 | vqmmc-supply = <&vddio_sdmmc3>; | |
511 | }; | |
512 | ||
b5896f67 | 513 | sdhci@700b0600 { /* eMMC on this bus */ |
53d02858 TV |
514 | status = "okay"; |
515 | bus-width = <8>; | |
516 | no-1-8-v; | |
517 | non-removable; | |
518 | }; | |
519 | ||
9a0baee9 | 520 | /* CPU DFLL clock */ |
b5896f67 | 521 | clock@70110000 { |
80373d37 | 522 | status = "disabled"; |
9a0baee9 JH |
523 | vdd-cpu-supply = <&vdd_cpu>; |
524 | nvidia,i2c-fs-rate = <400000>; | |
525 | }; | |
526 | ||
b5896f67 MZ |
527 | ahub@70300000 { |
528 | i2s@70301100 { | |
53d02858 TV |
529 | status = "okay"; |
530 | }; | |
531 | }; | |
532 | ||
53d02858 TV |
533 | backlight: backlight { |
534 | compatible = "pwm-backlight"; | |
535 | ||
536 | enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; | |
537 | power-supply = <&vdd_led>; | |
538 | pwms = <&pwm 1 1000000>; | |
539 | ||
540 | default-brightness-level = <224>; | |
541 | brightness-levels = | |
542 | < 0 1 2 3 4 5 6 7 | |
543 | 8 9 10 11 12 13 14 15 | |
544 | 16 17 18 19 20 21 22 23 | |
545 | 24 25 26 27 28 29 30 31 | |
546 | 32 33 34 35 36 37 38 39 | |
547 | 40 41 42 43 44 45 46 47 | |
548 | 48 49 50 51 52 53 54 55 | |
549 | 56 57 58 59 60 61 62 63 | |
550 | 64 65 66 67 68 69 70 71 | |
551 | 72 73 74 75 76 77 78 79 | |
552 | 80 81 82 83 84 85 86 87 | |
553 | 88 89 90 91 92 93 94 95 | |
554 | 96 97 98 99 100 101 102 103 | |
555 | 104 105 106 107 108 109 110 111 | |
556 | 112 113 114 115 116 117 118 119 | |
557 | 120 121 122 123 124 125 126 127 | |
558 | 128 129 130 131 132 133 134 135 | |
559 | 136 137 138 139 140 141 142 143 | |
560 | 144 145 146 147 148 149 150 151 | |
561 | 152 153 154 155 156 157 158 159 | |
562 | 160 161 162 163 164 165 166 167 | |
563 | 168 169 170 171 172 173 174 175 | |
564 | 176 177 178 179 180 181 182 183 | |
565 | 184 185 186 187 188 189 190 191 | |
566 | 192 193 194 195 196 197 198 199 | |
567 | 200 201 202 203 204 205 206 207 | |
568 | 208 209 210 211 212 213 214 215 | |
569 | 216 217 218 219 220 221 222 223 | |
570 | 224 225 226 227 228 229 230 231 | |
571 | 232 233 234 235 236 237 238 239 | |
572 | 240 241 242 243 244 245 246 247 | |
573 | 248 249 250 251 252 253 254 255 | |
574 | 256>; | |
575 | }; | |
576 | ||
577 | clocks { | |
578 | compatible = "simple-bus"; | |
579 | #address-cells = <1>; | |
580 | #size-cells = <0>; | |
581 | ||
582 | clk32k_in: clock@0 { | |
583 | compatible = "fixed-clock"; | |
584 | reg = <0>; | |
585 | #clock-cells = <0>; | |
586 | clock-frequency = <32768>; | |
587 | }; | |
588 | }; | |
589 | ||
9a0baee9 JH |
590 | cpus { |
591 | cpu@0 { | |
592 | vdd-cpu-supply = <&vdd_cpu>; | |
593 | }; | |
594 | }; | |
595 | ||
53d02858 TV |
596 | gpio-keys { |
597 | compatible = "gpio-keys"; | |
598 | ||
599 | lid { | |
600 | label = "Lid"; | |
601 | gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>; | |
602 | linux,input-type = <5>; | |
603 | linux,code = <KEY_RESERVED>; | |
604 | debounce-interval = <1>; | |
d1c04d30 | 605 | wakeup-source; |
53d02858 TV |
606 | }; |
607 | ||
608 | power { | |
609 | label = "Power"; | |
610 | gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; | |
611 | linux,code = <KEY_POWER>; | |
612 | debounce-interval = <30>; | |
d1c04d30 | 613 | wakeup-source; |
53d02858 TV |
614 | }; |
615 | }; | |
616 | ||
617 | regulators { | |
618 | compatible = "simple-bus"; | |
619 | #address-cells = <1>; | |
620 | #size-cells = <0>; | |
621 | ||
622 | vdd_mux: regulator@0 { | |
623 | compatible = "regulator-fixed"; | |
624 | reg = <0>; | |
625 | regulator-name = "+VDD_MUX"; | |
626 | regulator-min-microvolt = <12000000>; | |
627 | regulator-max-microvolt = <12000000>; | |
628 | regulator-always-on; | |
629 | regulator-boot-on; | |
630 | }; | |
631 | ||
632 | vdd_5v0_sys: regulator@1 { | |
633 | compatible = "regulator-fixed"; | |
634 | reg = <1>; | |
635 | regulator-name = "+5V_SYS"; | |
636 | regulator-min-microvolt = <5000000>; | |
637 | regulator-max-microvolt = <5000000>; | |
638 | regulator-always-on; | |
639 | regulator-boot-on; | |
640 | vin-supply = <&vdd_mux>; | |
641 | }; | |
642 | ||
643 | vdd_3v3_sys: regulator@2 { | |
644 | compatible = "regulator-fixed"; | |
645 | reg = <2>; | |
646 | regulator-name = "+3.3V_SYS"; | |
647 | regulator-min-microvolt = <3300000>; | |
648 | regulator-max-microvolt = <3300000>; | |
649 | regulator-always-on; | |
650 | regulator-boot-on; | |
651 | vin-supply = <&vdd_mux>; | |
652 | }; | |
653 | ||
654 | vdd_3v3_run: regulator@3 { | |
655 | compatible = "regulator-fixed"; | |
656 | reg = <3>; | |
657 | regulator-name = "+3.3V_RUN"; | |
658 | regulator-min-microvolt = <3300000>; | |
659 | regulator-max-microvolt = <3300000>; | |
660 | regulator-always-on; | |
661 | regulator-boot-on; | |
662 | gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; | |
663 | enable-active-high; | |
664 | vin-supply = <&vdd_3v3_sys>; | |
665 | }; | |
666 | ||
667 | vdd_3v3_hdmi: regulator@4 { | |
668 | compatible = "regulator-fixed"; | |
669 | reg = <4>; | |
670 | regulator-name = "+3.3V_AVDD_HDMI_AP_GATED"; | |
671 | regulator-min-microvolt = <3300000>; | |
672 | regulator-max-microvolt = <3300000>; | |
673 | vin-supply = <&vdd_3v3_run>; | |
674 | }; | |
675 | ||
676 | vdd_led: regulator@5 { | |
677 | compatible = "regulator-fixed"; | |
678 | reg = <5>; | |
679 | regulator-name = "+VDD_LED"; | |
680 | gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; | |
681 | enable-active-high; | |
682 | vin-supply = <&vdd_mux>; | |
683 | }; | |
684 | ||
685 | vdd_5v0_ts: regulator@6 { | |
686 | compatible = "regulator-fixed"; | |
687 | reg = <6>; | |
688 | regulator-name = "+5V_VDD_TS_SW"; | |
689 | regulator-min-microvolt = <5000000>; | |
690 | regulator-max-microvolt = <5000000>; | |
691 | regulator-boot-on; | |
692 | gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; | |
693 | enable-active-high; | |
694 | vin-supply = <&vdd_5v0_sys>; | |
695 | }; | |
696 | ||
697 | vdd_usb1_vbus: regulator@7 { | |
698 | compatible = "regulator-fixed"; | |
699 | reg = <7>; | |
700 | regulator-name = "+5V_USB_HS"; | |
701 | regulator-min-microvolt = <5000000>; | |
702 | regulator-max-microvolt = <5000000>; | |
703 | gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>; | |
704 | enable-active-high; | |
705 | gpio-open-drain; | |
706 | vin-supply = <&vdd_5v0_sys>; | |
707 | }; | |
708 | ||
709 | vdd_usb3_vbus: regulator@8 { | |
710 | compatible = "regulator-fixed"; | |
711 | reg = <8>; | |
712 | regulator-name = "+5V_USB_SS"; | |
713 | regulator-min-microvolt = <5000000>; | |
714 | regulator-max-microvolt = <5000000>; | |
715 | gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>; | |
716 | enable-active-high; | |
717 | gpio-open-drain; | |
718 | vin-supply = <&vdd_5v0_sys>; | |
719 | }; | |
720 | ||
721 | vdd_3v3_panel: regulator@9 { | |
722 | compatible = "regulator-fixed"; | |
723 | reg = <9>; | |
724 | regulator-name = "+3.3V_PANEL"; | |
725 | regulator-min-microvolt = <3300000>; | |
726 | regulator-max-microvolt = <3300000>; | |
727 | gpio = <&pmic 4 GPIO_ACTIVE_HIGH>; | |
728 | enable-active-high; | |
729 | vin-supply = <&vdd_3v3_run>; | |
730 | }; | |
731 | ||
732 | vdd_3v3_lp0: regulator@10 { | |
733 | compatible = "regulator-fixed"; | |
734 | reg = <10>; | |
735 | regulator-name = "+3.3V_LP0"; | |
736 | regulator-min-microvolt = <3300000>; | |
737 | regulator-max-microvolt = <3300000>; | |
738 | /* | |
739 | * TODO: find a way to wire this up with the USB EHCI | |
740 | * controllers so that it can be enabled on demand. | |
741 | */ | |
742 | regulator-always-on; | |
743 | gpio = <&pmic 2 GPIO_ACTIVE_HIGH>; | |
744 | enable-active-high; | |
745 | vin-supply = <&vdd_3v3_sys>; | |
746 | }; | |
747 | ||
748 | vdd_hdmi_pll: regulator@11 { | |
749 | compatible = "regulator-fixed"; | |
750 | reg = <11>; | |
751 | regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL"; | |
752 | regulator-min-microvolt = <1050000>; | |
753 | regulator-max-microvolt = <1050000>; | |
754 | gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>; | |
755 | vin-supply = <&vdd_1v05_run>; | |
756 | }; | |
757 | ||
758 | vdd_5v0_hdmi: regulator@12 { | |
759 | compatible = "regulator-fixed"; | |
760 | reg = <12>; | |
761 | regulator-name = "+5V_HDMI_CON"; | |
762 | regulator-min-microvolt = <5000000>; | |
763 | regulator-max-microvolt = <5000000>; | |
764 | gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; | |
765 | enable-active-high; | |
766 | vin-supply = <&vdd_5v0_sys>; | |
767 | }; | |
768 | }; | |
769 | ||
770 | sound { | |
771 | nvidia,audio-routing = | |
772 | "Headphones", "HPR", | |
773 | "Headphones", "HPL", | |
774 | "Speakers", "SPKR", | |
775 | "Speakers", "SPKL", | |
776 | "Mic Jack", "MICBIAS", | |
777 | "DMICL", "Int Mic", | |
778 | "DMICR", "Int Mic", | |
779 | "IN34", "Mic Jack"; | |
780 | ||
781 | nvidia,i2s-controller = <&tegra_i2s1>; | |
782 | nvidia,audio-codec = <&acodec>; | |
783 | ||
784 | clocks = <&tegra_car TEGRA124_CLK_PLL_A>, | |
785 | <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, | |
786 | <&tegra_car TEGRA124_CLK_EXTERN1>; | |
787 | clock-names = "pll_a", "pll_a_out0", "mclk"; | |
788 | ||
789 | nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(I, 7) GPIO_ACTIVE_HIGH>; | |
790 | nvidia,mic-det-gpios = | |
791 | <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>; | |
792 | }; | |
1755de86 TV |
793 | |
794 | gpio-restart { | |
795 | compatible = "gpio-restart"; | |
796 | gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; | |
797 | priority = <200>; | |
798 | }; | |
53d02858 TV |
799 | }; |
800 | ||
801 | #include "cros-ec-keyboard.dtsi" |