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Commit | Line | Data |
---|---|---|
8e267f3d GL |
1 | /dts-v1/; |
2 | ||
1bd0bd49 | 3 | #include "tegra20.dtsi" |
8e267f3d GL |
4 | |
5 | / { | |
8fef5dff | 6 | model = "NVIDIA Tegra20 Harmony evaluation board"; |
8e267f3d GL |
7 | compatible = "nvidia,harmony", "nvidia,tegra20"; |
8 | ||
f9eb26a4 | 9 | memory { |
95decf84 | 10 | reg = <0x00000000 0x40000000>; |
8e267f3d GL |
11 | }; |
12 | ||
58ecb23f SW |
13 | host1x@50000000 { |
14 | hdmi@54280000 { | |
20ffbd7d SW |
15 | status = "okay"; |
16 | ||
17 | vdd-supply = <&hdmi_vdd_reg>; | |
18 | pll-supply = <&hdmi_pll_reg>; | |
19 | ||
20 | nvidia,ddc-i2c-bus = <&hdmi_ddc>; | |
3325f1bc SW |
21 | nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) |
22 | GPIO_ACTIVE_HIGH>; | |
20ffbd7d SW |
23 | }; |
24 | }; | |
25 | ||
58ecb23f | 26 | pinmux@70000014 { |
ecc295bb SW |
27 | pinctrl-names = "default"; |
28 | pinctrl-0 = <&state_default>; | |
29 | ||
30 | state_default: pinmux { | |
31 | ata { | |
32 | nvidia,pins = "ata"; | |
33 | nvidia,function = "ide"; | |
34 | }; | |
35 | atb { | |
36 | nvidia,pins = "atb", "gma", "gme"; | |
37 | nvidia,function = "sdio4"; | |
38 | }; | |
39 | atc { | |
40 | nvidia,pins = "atc"; | |
41 | nvidia,function = "nand"; | |
42 | }; | |
43 | atd { | |
44 | nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu", | |
45 | "spia", "spib", "spic"; | |
46 | nvidia,function = "gmi"; | |
47 | }; | |
48 | cdev1 { | |
49 | nvidia,pins = "cdev1"; | |
50 | nvidia,function = "plla_out"; | |
51 | }; | |
52 | cdev2 { | |
53 | nvidia,pins = "cdev2"; | |
54 | nvidia,function = "pllp_out4"; | |
55 | }; | |
56 | crtp { | |
57 | nvidia,pins = "crtp"; | |
58 | nvidia,function = "crt"; | |
59 | }; | |
60 | csus { | |
61 | nvidia,pins = "csus"; | |
62 | nvidia,function = "vi_sensor_clk"; | |
63 | }; | |
64 | dap1 { | |
65 | nvidia,pins = "dap1"; | |
66 | nvidia,function = "dap1"; | |
67 | }; | |
68 | dap2 { | |
69 | nvidia,pins = "dap2"; | |
70 | nvidia,function = "dap2"; | |
71 | }; | |
72 | dap3 { | |
73 | nvidia,pins = "dap3"; | |
74 | nvidia,function = "dap3"; | |
75 | }; | |
76 | dap4 { | |
77 | nvidia,pins = "dap4"; | |
78 | nvidia,function = "dap4"; | |
79 | }; | |
80 | ddc { | |
81 | nvidia,pins = "ddc"; | |
82 | nvidia,function = "i2c2"; | |
83 | }; | |
84 | dta { | |
85 | nvidia,pins = "dta", "dtd"; | |
86 | nvidia,function = "sdio2"; | |
87 | }; | |
88 | dtb { | |
89 | nvidia,pins = "dtb", "dtc", "dte"; | |
90 | nvidia,function = "rsvd1"; | |
91 | }; | |
92 | dtf { | |
93 | nvidia,pins = "dtf"; | |
94 | nvidia,function = "i2c3"; | |
95 | }; | |
96 | gmc { | |
97 | nvidia,pins = "gmc"; | |
98 | nvidia,function = "uartd"; | |
99 | }; | |
100 | gpu7 { | |
101 | nvidia,pins = "gpu7"; | |
102 | nvidia,function = "rtck"; | |
103 | }; | |
104 | gpv { | |
105 | nvidia,pins = "gpv", "slxa", "slxk"; | |
106 | nvidia,function = "pcie"; | |
107 | }; | |
108 | hdint { | |
109 | nvidia,pins = "hdint", "pta"; | |
110 | nvidia,function = "hdmi"; | |
111 | }; | |
112 | i2cp { | |
113 | nvidia,pins = "i2cp"; | |
114 | nvidia,function = "i2cp"; | |
115 | }; | |
116 | irrx { | |
117 | nvidia,pins = "irrx", "irtx"; | |
118 | nvidia,function = "uarta"; | |
119 | }; | |
120 | kbca { | |
121 | nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", | |
122 | "kbce", "kbcf"; | |
123 | nvidia,function = "kbc"; | |
124 | }; | |
125 | lcsn { | |
126 | nvidia,pins = "lcsn", "ld0", "ld1", "ld2", | |
127 | "ld3", "ld4", "ld5", "ld6", "ld7", | |
128 | "ld8", "ld9", "ld10", "ld11", "ld12", | |
129 | "ld13", "ld14", "ld15", "ld16", "ld17", | |
130 | "ldc", "ldi", "lhp0", "lhp1", "lhp2", | |
131 | "lhs", "lm0", "lm1", "lpp", "lpw0", | |
132 | "lpw1", "lpw2", "lsc0", "lsc1", "lsck", | |
133 | "lsda", "lsdi", "lspi", "lvp0", "lvp1", | |
134 | "lvs"; | |
135 | nvidia,function = "displaya"; | |
136 | }; | |
137 | owc { | |
138 | nvidia,pins = "owc", "spdi", "spdo", "uac"; | |
139 | nvidia,function = "rsvd2"; | |
140 | }; | |
141 | pmc { | |
142 | nvidia,pins = "pmc"; | |
143 | nvidia,function = "pwr_on"; | |
144 | }; | |
145 | rm { | |
146 | nvidia,pins = "rm"; | |
147 | nvidia,function = "i2c1"; | |
148 | }; | |
149 | sdb { | |
150 | nvidia,pins = "sdb", "sdc", "sdd"; | |
151 | nvidia,function = "pwm"; | |
152 | }; | |
153 | sdio1 { | |
154 | nvidia,pins = "sdio1"; | |
155 | nvidia,function = "sdio1"; | |
156 | }; | |
157 | slxc { | |
158 | nvidia,pins = "slxc", "slxd"; | |
159 | nvidia,function = "spdif"; | |
160 | }; | |
161 | spid { | |
162 | nvidia,pins = "spid", "spie", "spif"; | |
163 | nvidia,function = "spi1"; | |
164 | }; | |
165 | spig { | |
166 | nvidia,pins = "spig", "spih"; | |
167 | nvidia,function = "spi2_alt"; | |
168 | }; | |
169 | uaa { | |
170 | nvidia,pins = "uaa", "uab", "uda"; | |
171 | nvidia,function = "ulpi"; | |
172 | }; | |
173 | uad { | |
174 | nvidia,pins = "uad"; | |
175 | nvidia,function = "irda"; | |
176 | }; | |
177 | uca { | |
178 | nvidia,pins = "uca", "ucb"; | |
179 | nvidia,function = "uartc"; | |
180 | }; | |
181 | conf_ata { | |
182 | nvidia,pins = "ata", "atb", "atc", "atd", "ate", | |
563da21b SW |
183 | "cdev1", "cdev2", "dap1", "dtb", "gma", |
184 | "gmb", "gmc", "gmd", "gme", "gpu7", | |
185 | "gpv", "i2cp", "pta", "rm", "slxa", | |
186 | "slxk", "spia", "spib", "uac"; | |
ecc295bb SW |
187 | nvidia,pull = <0>; |
188 | nvidia,tristate = <0>; | |
189 | }; | |
ecc295bb SW |
190 | conf_ck32 { |
191 | nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", | |
192 | "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; | |
193 | nvidia,pull = <0>; | |
194 | }; | |
563da21b SW |
195 | conf_csus { |
196 | nvidia,pins = "csus", "spid", "spif"; | |
197 | nvidia,pull = <1>; | |
198 | nvidia,tristate = <1>; | |
199 | }; | |
ecc295bb SW |
200 | conf_crtp { |
201 | nvidia,pins = "crtp", "dap2", "dap3", "dap4", | |
202 | "dtc", "dte", "dtf", "gpu", "sdio1", | |
203 | "slxc", "slxd", "spdi", "spdo", "spig", | |
563da21b | 204 | "uda"; |
ecc295bb SW |
205 | nvidia,pull = <0>; |
206 | nvidia,tristate = <1>; | |
207 | }; | |
208 | conf_ddc { | |
209 | nvidia,pins = "ddc", "dta", "dtd", "kbca", | |
210 | "kbcb", "kbcc", "kbcd", "kbce", "kbcf", | |
211 | "sdc"; | |
212 | nvidia,pull = <2>; | |
213 | nvidia,tristate = <0>; | |
214 | }; | |
215 | conf_hdint { | |
216 | nvidia,pins = "hdint", "lcsn", "ldc", "lm1", | |
217 | "lpw1", "lsc1", "lsck", "lsda", "lsdi", | |
218 | "lvp0", "owc", "sdb"; | |
219 | nvidia,tristate = <1>; | |
220 | }; | |
221 | conf_irrx { | |
222 | nvidia,pins = "irrx", "irtx", "sdd", "spic", | |
223 | "spie", "spih", "uaa", "uab", "uad", | |
224 | "uca", "ucb"; | |
225 | nvidia,pull = <2>; | |
226 | nvidia,tristate = <1>; | |
227 | }; | |
228 | conf_lc { | |
229 | nvidia,pins = "lc", "ls"; | |
230 | nvidia,pull = <2>; | |
231 | }; | |
232 | conf_ld0 { | |
233 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", | |
234 | "ld5", "ld6", "ld7", "ld8", "ld9", | |
235 | "ld10", "ld11", "ld12", "ld13", "ld14", | |
236 | "ld15", "ld16", "ld17", "ldi", "lhp0", | |
237 | "lhp1", "lhp2", "lhs", "lm0", "lpp", | |
238 | "lpw0", "lpw2", "lsc0", "lspi", "lvp1", | |
239 | "lvs", "pmc"; | |
240 | nvidia,tristate = <0>; | |
241 | }; | |
242 | conf_ld17_0 { | |
243 | nvidia,pins = "ld17_0", "ld19_18", "ld21_20", | |
244 | "ld23_22"; | |
245 | nvidia,pull = <1>; | |
246 | }; | |
247 | }; | |
248 | }; | |
249 | ||
2a5fdc9a SW |
250 | i2s@70002800 { |
251 | status = "okay"; | |
c04abb3a SW |
252 | }; |
253 | ||
254 | serial@70006300 { | |
2a5fdc9a | 255 | status = "okay"; |
c04abb3a SW |
256 | }; |
257 | ||
8e267f3d | 258 | i2c@7000c000 { |
2a5fdc9a | 259 | status = "okay"; |
8e267f3d GL |
260 | clock-frequency = <400000>; |
261 | ||
797acf70 | 262 | wm8903: wm8903@1a { |
8e267f3d GL |
263 | compatible = "wlf,wm8903"; |
264 | reg = <0x1a>; | |
797acf70 | 265 | interrupt-parent = <&gpio>; |
6cecf916 | 266 | interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>; |
8e267f3d GL |
267 | |
268 | gpio-controller; | |
269 | #gpio-cells = <2>; | |
270 | ||
797acf70 SW |
271 | micdet-cfg = <0>; |
272 | micdet-delay = <100>; | |
95decf84 | 273 | gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; |
8e267f3d GL |
274 | }; |
275 | }; | |
276 | ||
20ffbd7d | 277 | hdmi_ddc: i2c@7000c400 { |
2a5fdc9a | 278 | status = "okay"; |
20ffbd7d | 279 | clock-frequency = <100000>; |
8e267f3d GL |
280 | }; |
281 | ||
282 | i2c@7000c500 { | |
2a5fdc9a | 283 | status = "okay"; |
8e267f3d GL |
284 | clock-frequency = <400000>; |
285 | }; | |
286 | ||
287 | i2c@7000d000 { | |
2a5fdc9a | 288 | status = "okay"; |
8e267f3d | 289 | clock-frequency = <400000>; |
3cc404de LD |
290 | |
291 | pmic: tps6586x@34 { | |
292 | compatible = "ti,tps6586x"; | |
293 | reg = <0x34>; | |
6cecf916 | 294 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; |
3cc404de | 295 | |
be972c32 SW |
296 | ti,system-power-controller; |
297 | ||
3cc404de LD |
298 | #gpio-cells = <2>; |
299 | gpio-controller; | |
300 | ||
301 | sys-supply = <&vdd_5v0_reg>; | |
302 | vin-sm0-supply = <&sys_reg>; | |
303 | vin-sm1-supply = <&sys_reg>; | |
304 | vin-sm2-supply = <&sys_reg>; | |
305 | vinldo01-supply = <&sm2_reg>; | |
306 | vinldo23-supply = <&sm2_reg>; | |
307 | vinldo4-supply = <&sm2_reg>; | |
308 | vinldo678-supply = <&sm2_reg>; | |
309 | vinldo9-supply = <&sm2_reg>; | |
310 | ||
311 | regulators { | |
b9c665d7 | 312 | sys_reg: sys { |
3cc404de LD |
313 | regulator-name = "vdd_sys"; |
314 | regulator-always-on; | |
315 | }; | |
316 | ||
b9c665d7 | 317 | sm0 { |
3cc404de LD |
318 | regulator-name = "vdd_sm0,vdd_core"; |
319 | regulator-min-microvolt = <1200000>; | |
320 | regulator-max-microvolt = <1200000>; | |
321 | regulator-always-on; | |
322 | }; | |
323 | ||
b9c665d7 | 324 | sm1 { |
3cc404de LD |
325 | regulator-name = "vdd_sm1,vdd_cpu"; |
326 | regulator-min-microvolt = <1000000>; | |
327 | regulator-max-microvolt = <1000000>; | |
328 | regulator-always-on; | |
329 | }; | |
330 | ||
b9c665d7 | 331 | sm2_reg: sm2 { |
3cc404de LD |
332 | regulator-name = "vdd_sm2,vin_ldo*"; |
333 | regulator-min-microvolt = <3700000>; | |
334 | regulator-max-microvolt = <3700000>; | |
335 | regulator-always-on; | |
336 | }; | |
337 | ||
722afc17 | 338 | pci_clk_reg: ldo0 { |
3cc404de LD |
339 | regulator-name = "vdd_ldo0,vddio_pex_clk"; |
340 | regulator-min-microvolt = <3300000>; | |
341 | regulator-max-microvolt = <3300000>; | |
342 | }; | |
343 | ||
b9c665d7 | 344 | ldo1 { |
3cc404de LD |
345 | regulator-name = "vdd_ldo1,avdd_pll*"; |
346 | regulator-min-microvolt = <1100000>; | |
347 | regulator-max-microvolt = <1100000>; | |
348 | regulator-always-on; | |
349 | }; | |
350 | ||
b9c665d7 | 351 | ldo2 { |
3cc404de LD |
352 | regulator-name = "vdd_ldo2,vdd_rtc"; |
353 | regulator-min-microvolt = <1200000>; | |
354 | regulator-max-microvolt = <1200000>; | |
355 | }; | |
356 | ||
b9c665d7 | 357 | ldo3 { |
3cc404de LD |
358 | regulator-name = "vdd_ldo3,avdd_usb*"; |
359 | regulator-min-microvolt = <3300000>; | |
360 | regulator-max-microvolt = <3300000>; | |
361 | regulator-always-on; | |
362 | }; | |
363 | ||
b9c665d7 | 364 | ldo4 { |
3cc404de LD |
365 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; |
366 | regulator-min-microvolt = <1800000>; | |
367 | regulator-max-microvolt = <1800000>; | |
368 | regulator-always-on; | |
369 | }; | |
370 | ||
b9c665d7 | 371 | ldo5 { |
3cc404de LD |
372 | regulator-name = "vdd_ldo5,vcore_mmc"; |
373 | regulator-min-microvolt = <2850000>; | |
374 | regulator-max-microvolt = <2850000>; | |
375 | regulator-always-on; | |
376 | }; | |
377 | ||
b9c665d7 | 378 | ldo6 { |
3cc404de LD |
379 | regulator-name = "vdd_ldo6,avdd_vdac"; |
380 | regulator-min-microvolt = <1800000>; | |
381 | regulator-max-microvolt = <1800000>; | |
382 | }; | |
383 | ||
20ffbd7d | 384 | hdmi_vdd_reg: ldo7 { |
740418ef | 385 | regulator-name = "vdd_ldo7,avdd_hdmi"; |
3cc404de LD |
386 | regulator-min-microvolt = <3300000>; |
387 | regulator-max-microvolt = <3300000>; | |
388 | }; | |
389 | ||
20ffbd7d | 390 | hdmi_pll_reg: ldo8 { |
3cc404de LD |
391 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
392 | regulator-min-microvolt = <1800000>; | |
393 | regulator-max-microvolt = <1800000>; | |
394 | }; | |
395 | ||
b9c665d7 | 396 | ldo9 { |
3cc404de LD |
397 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; |
398 | regulator-min-microvolt = <2850000>; | |
399 | regulator-max-microvolt = <2850000>; | |
400 | regulator-always-on; | |
401 | }; | |
402 | ||
b9c665d7 | 403 | ldo_rtc { |
3cc404de LD |
404 | regulator-name = "vdd_rtc_out,vdd_cell"; |
405 | regulator-min-microvolt = <3300000>; | |
406 | regulator-max-microvolt = <3300000>; | |
407 | regulator-always-on; | |
408 | }; | |
409 | }; | |
410 | }; | |
42d2534a TR |
411 | |
412 | temperature-sensor@4c { | |
413 | compatible = "adi,adt7461"; | |
414 | reg = <0x4c>; | |
415 | }; | |
8e267f3d GL |
416 | }; |
417 | ||
58ecb23f | 418 | pmc@7000e400 { |
c04abb3a | 419 | nvidia,invert-interrupt; |
47d2d63b | 420 | nvidia,suspend-mode = <1>; |
a44a019d JL |
421 | nvidia,cpu-pwr-good-time = <5000>; |
422 | nvidia,cpu-pwr-off-time = <5000>; | |
423 | nvidia,core-pwr-good-time = <3845 3845>; | |
424 | nvidia,core-pwr-off-time = <3875>; | |
425 | nvidia,sys-clock-req-active-high; | |
8e267f3d GL |
426 | }; |
427 | ||
58ecb23f | 428 | pcie-controller@80003000 { |
722afc17 TR |
429 | pex-clk-supply = <&pci_clk_reg>; |
430 | vdd-supply = <&pci_vdd_reg>; | |
431 | status = "okay"; | |
432 | ||
433 | pci@1,0 { | |
434 | status = "okay"; | |
435 | }; | |
436 | ||
437 | pci@2,0 { | |
438 | status = "okay"; | |
439 | }; | |
440 | }; | |
441 | ||
2a5fdc9a SW |
442 | usb@c5000000 { |
443 | status = "okay"; | |
444 | }; | |
445 | ||
4c94c8b5 VB |
446 | usb-phy@c5000000 { |
447 | status = "okay"; | |
448 | }; | |
449 | ||
c04abb3a | 450 | usb@c5004000 { |
2a5fdc9a | 451 | status = "okay"; |
3325f1bc SW |
452 | nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) |
453 | GPIO_ACTIVE_LOW>; | |
31c1ec92 SW |
454 | }; |
455 | ||
9dffe3be | 456 | usb-phy@c5004000 { |
4c94c8b5 | 457 | status = "okay"; |
3325f1bc SW |
458 | nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) |
459 | GPIO_ACTIVE_LOW>; | |
1292c129 SW |
460 | }; |
461 | ||
9dffe3be VB |
462 | usb@c5008000 { |
463 | status = "okay"; | |
40e8b3a6 VB |
464 | }; |
465 | ||
4c94c8b5 VB |
466 | usb-phy@c5008000 { |
467 | status = "okay"; | |
468 | }; | |
469 | ||
8e267f3d | 470 | sdhci@c8000200 { |
2a5fdc9a | 471 | status = "okay"; |
3325f1bc SW |
472 | cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; |
473 | wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; | |
474 | power-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>; | |
deb88cc3 | 475 | bus-width = <4>; |
8e267f3d GL |
476 | }; |
477 | ||
478 | sdhci@c8000600 { | |
2a5fdc9a | 479 | status = "okay"; |
3325f1bc SW |
480 | cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>; |
481 | wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; | |
482 | power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; | |
deb88cc3 | 483 | bus-width = <8>; |
8e267f3d | 484 | }; |
aa607ebf | 485 | |
7021d122 JL |
486 | clocks { |
487 | compatible = "simple-bus"; | |
488 | #address-cells = <1>; | |
489 | #size-cells = <0>; | |
490 | ||
58ecb23f | 491 | clk32k_in: clock@0 { |
7021d122 JL |
492 | compatible = "fixed-clock"; |
493 | reg=<0>; | |
494 | #clock-cells = <0>; | |
495 | clock-frequency = <32768>; | |
496 | }; | |
497 | }; | |
498 | ||
5741a256 JL |
499 | gpio-keys { |
500 | compatible = "gpio-keys"; | |
501 | ||
502 | power { | |
503 | label = "Power"; | |
3325f1bc | 504 | gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; |
5741a256 JL |
505 | linux,code = <116>; /* KEY_POWER */ |
506 | gpio-key,wakeup; | |
507 | }; | |
508 | }; | |
509 | ||
58ecb23f | 510 | kbc@7000e200 { |
c0967ce0 LD |
511 | status = "okay"; |
512 | nvidia,debounce-delay-ms = <2>; | |
513 | nvidia,repeat-delay-ms = <160>; | |
514 | nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; | |
515 | nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>; | |
516 | linux,keymap = <0x00020011 /* KEY_W */ | |
517 | 0x0003001F /* KEY_S */ | |
518 | 0x0004001E /* KEY_A */ | |
519 | 0x0005002C /* KEY_Z */ | |
520 | 0x000701D0 /* KEY_FN */ | |
521 | 0x0107008B /* KEY_MENU */ | |
522 | 0x02060038 /* KEY_LEFTALT */ | |
523 | 0x02070064 /* KEY_RIGHTALT */ | |
524 | 0x03000006 /* KEY_5 */ | |
525 | 0x03010005 /* KEY_4 */ | |
526 | 0x03020013 /* KEY_R */ | |
527 | 0x03030012 /* KEY_E */ | |
528 | 0x03040021 /* KEY_F */ | |
529 | 0x03050020 /* KEY_D */ | |
530 | 0x0306002D /* KEY_X */ | |
531 | 0x04000008 /* KEY_7 */ | |
532 | 0x04010007 /* KEY_6 */ | |
533 | 0x04020014 /* KEY_T */ | |
534 | 0x04030023 /* KEY_H */ | |
535 | 0x04040022 /* KEY_G */ | |
536 | 0x0405002F /* KEY_V */ | |
537 | 0x0406002E /* KEY_C */ | |
538 | 0x04070039 /* KEY_SPACE */ | |
539 | 0x0500000A /* KEY_9 */ | |
540 | 0x05010009 /* KEY_8 */ | |
541 | 0x05020016 /* KEY_U */ | |
542 | 0x05030015 /* KEY_Y */ | |
543 | 0x05040024 /* KEY_J */ | |
544 | 0x05050031 /* KEY_N */ | |
545 | 0x05060030 /* KEY_B */ | |
546 | 0x0507002B /* KEY_BACKSLASH */ | |
547 | 0x0600000C /* KEY_MINUS */ | |
548 | 0x0601000B /* KEY_0 */ | |
549 | 0x06020018 /* KEY_O */ | |
550 | 0x06030017 /* KEY_I */ | |
551 | 0x06040026 /* KEY_L */ | |
552 | 0x06050025 /* KEY_K */ | |
553 | 0x06060033 /* KEY_COMMA */ | |
554 | 0x06070032 /* KEY_M */ | |
555 | 0x0701000D /* KEY_EQUAL */ | |
556 | 0x0702001B /* KEY_RIGHTBRACE */ | |
557 | 0x0703001C /* KEY_ENTER */ | |
558 | 0x0707008B /* KEY_MENU */ | |
559 | 0x0804002A /* KEY_LEFTSHIFT */ | |
560 | 0x08050036 /* KEY_RIGHTSHIFT */ | |
561 | 0x0905001D /* KEY_LEFTCTRL */ | |
562 | 0x09070061 /* KEY_RIGHTCTRL */ | |
563 | 0x0B00001A /* KEY_LEFTBRACE */ | |
564 | 0x0B010019 /* KEY_P */ | |
565 | 0x0B020028 /* KEY_APOSTROPHE */ | |
566 | 0x0B030027 /* KEY_SEMICOLON */ | |
567 | 0x0B040035 /* KEY_SLASH */ | |
568 | 0x0B050034 /* KEY_DOT */ | |
569 | 0x0C000044 /* KEY_F10 */ | |
570 | 0x0C010043 /* KEY_F9 */ | |
571 | 0x0C02000E /* KEY_BACKSPACE */ | |
572 | 0x0C030004 /* KEY_3 */ | |
573 | 0x0C040003 /* KEY_2 */ | |
574 | 0x0C050067 /* KEY_UP */ | |
575 | 0x0C0600D2 /* KEY_PRINT */ | |
576 | 0x0C070077 /* KEY_PAUSE */ | |
577 | 0x0D00006E /* KEY_INSERT */ | |
578 | 0x0D01006F /* KEY_DELETE */ | |
579 | 0x0D030068 /* KEY_PAGEUP */ | |
580 | 0x0D04006D /* KEY_PAGEDOWN */ | |
581 | 0x0D05006A /* KEY_RIGHT */ | |
582 | 0x0D06006C /* KEY_DOWN */ | |
583 | 0x0D070069 /* KEY_LEFT */ | |
584 | 0x0E000057 /* KEY_F11 */ | |
585 | 0x0E010058 /* KEY_F12 */ | |
586 | 0x0E020042 /* KEY_F8 */ | |
587 | 0x0E030010 /* KEY_Q */ | |
588 | 0x0E04003E /* KEY_F4 */ | |
589 | 0x0E05003D /* KEY_F3 */ | |
590 | 0x0E060002 /* KEY_1 */ | |
591 | 0x0E070041 /* KEY_F7 */ | |
592 | 0x0F000001 /* KEY_ESC */ | |
593 | 0x0F010029 /* KEY_GRAVE */ | |
594 | 0x0F02003F /* KEY_F5 */ | |
595 | 0x0F03000F /* KEY_TAB */ | |
596 | 0x0F04003B /* KEY_F1 */ | |
597 | 0x0F05003C /* KEY_F2 */ | |
598 | 0x0F06003A /* KEY_CAPSLOCK */ | |
599 | 0x0F070040 /* KEY_F6 */ | |
600 | 0x14000047 /* KEY_KP7 */ | |
601 | 0x15000049 /* KEY_KP9 */ | |
602 | 0x15010048 /* KEY_KP8 */ | |
603 | 0x1502004B /* KEY_KP4 */ | |
604 | 0x1504004F /* KEY_KP1 */ | |
605 | 0x1601004E /* KEY_KPSLASH */ | |
606 | 0x1602004D /* KEY_KP6 */ | |
607 | 0x1603004C /* KEY_KP5 */ | |
608 | 0x16040051 /* KEY_KP3 */ | |
609 | 0x16050050 /* KEY_KP2 */ | |
610 | 0x16070052 /* KEY_KP0 */ | |
611 | 0x1B010037 /* KEY_KPASTERISK */ | |
612 | 0x1B03004A /* KEY_KPMINUS */ | |
613 | 0x1B04004E /* KEY_KPPLUS */ | |
614 | 0x1B050053 /* KEY_KPDOT */ | |
615 | 0x1C050073 /* KEY_VOLUMEUP */ | |
616 | 0x1D030066 /* KEY_HOME */ | |
617 | 0x1D04006B /* KEY_END */ | |
618 | 0x1D0500E1 /* KEY_BRIGHTNESSUP */ | |
619 | 0x1D060072 /* KEY_VOLUMEDOWN */ | |
620 | 0x1D0700E0 /* KEY_BRIGHTNESSDOWN */ | |
621 | 0x1E000045 /* KEY_NUMLOCK */ | |
622 | 0x1E010046 /* KEY_SCROLLLOCK */ | |
623 | 0x1E020071 /* KEY_MUTE */ | |
624 | 0x1F0400D6>; /* KEY_QUESTION */ | |
625 | }; | |
626 | ||
3cc404de LD |
627 | regulators { |
628 | compatible = "simple-bus"; | |
629 | #address-cells = <1>; | |
630 | #size-cells = <0>; | |
631 | ||
632 | vdd_5v0_reg: regulator@0 { | |
633 | compatible = "regulator-fixed"; | |
634 | reg = <0>; | |
635 | regulator-name = "vdd_5v0"; | |
636 | regulator-min-microvolt = <5000000>; | |
637 | regulator-max-microvolt = <5000000>; | |
638 | regulator-always-on; | |
639 | }; | |
640 | ||
641 | regulator@1 { | |
642 | compatible = "regulator-fixed"; | |
643 | reg = <1>; | |
644 | regulator-name = "vdd_1v5"; | |
645 | regulator-min-microvolt = <1500000>; | |
646 | regulator-max-microvolt = <1500000>; | |
3325f1bc | 647 | gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; |
3cc404de LD |
648 | }; |
649 | ||
650 | regulator@2 { | |
651 | compatible = "regulator-fixed"; | |
652 | reg = <2>; | |
653 | regulator-name = "vdd_1v2"; | |
654 | regulator-min-microvolt = <1200000>; | |
655 | regulator-max-microvolt = <1200000>; | |
3325f1bc | 656 | gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; |
3cc404de LD |
657 | enable-active-high; |
658 | }; | |
659 | ||
722afc17 | 660 | pci_vdd_reg: regulator@3 { |
3cc404de LD |
661 | compatible = "regulator-fixed"; |
662 | reg = <3>; | |
663 | regulator-name = "vdd_1v05"; | |
664 | regulator-min-microvolt = <1050000>; | |
665 | regulator-max-microvolt = <1050000>; | |
3325f1bc | 666 | gpio = <&pmic 2 GPIO_ACTIVE_HIGH>; |
3cc404de | 667 | enable-active-high; |
3cc404de LD |
668 | }; |
669 | ||
670 | regulator@4 { | |
671 | compatible = "regulator-fixed"; | |
672 | reg = <4>; | |
673 | regulator-name = "vdd_pnl"; | |
674 | regulator-min-microvolt = <2800000>; | |
675 | regulator-max-microvolt = <2800000>; | |
3325f1bc | 676 | gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>; |
3cc404de LD |
677 | enable-active-high; |
678 | }; | |
679 | ||
680 | regulator@5 { | |
681 | compatible = "regulator-fixed"; | |
682 | reg = <5>; | |
683 | regulator-name = "vdd_bl"; | |
684 | regulator-min-microvolt = <2800000>; | |
685 | regulator-max-microvolt = <2800000>; | |
3325f1bc | 686 | gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>; |
3cc404de LD |
687 | enable-active-high; |
688 | }; | |
689 | }; | |
690 | ||
c04abb3a SW |
691 | sound { |
692 | compatible = "nvidia,tegra-audio-wm8903-harmony", | |
693 | "nvidia,tegra-audio-wm8903"; | |
694 | nvidia,model = "NVIDIA Tegra Harmony"; | |
695 | ||
696 | nvidia,audio-routing = | |
697 | "Headphone Jack", "HPOUTR", | |
698 | "Headphone Jack", "HPOUTL", | |
699 | "Int Spk", "ROP", | |
700 | "Int Spk", "RON", | |
701 | "Int Spk", "LOP", | |
702 | "Int Spk", "LON", | |
703 | "Mic Jack", "MICBIAS", | |
704 | "IN1L", "Mic Jack"; | |
705 | ||
706 | nvidia,i2s-controller = <&tegra_i2s1>; | |
707 | nvidia,audio-codec = <&wm8903>; | |
708 | ||
3325f1bc SW |
709 | nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; |
710 | nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) | |
711 | GPIO_ACTIVE_HIGH>; | |
712 | nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0) | |
713 | GPIO_ACTIVE_HIGH>; | |
714 | nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1) | |
715 | GPIO_ACTIVE_HIGH>; | |
f9cd2b3b | 716 | |
885a8cfa HD |
717 | clocks = <&tegra_car TEGRA20_CLK_PLL_A>, |
718 | <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, | |
719 | <&tegra_car TEGRA20_CLK_CDEV1>; | |
f9cd2b3b | 720 | clock-names = "pll_a", "pll_a_out0", "mclk"; |
aa607ebf | 721 | }; |
8e267f3d | 722 | }; |