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Commit | Line | Data |
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731fb450 TR |
1 | /dts-v1/; |
2 | ||
1bd0bd49 | 3 | #include "tegra20-tamonten.dtsi" |
731fb450 TR |
4 | |
5 | / { | |
6 | model = "Avionic Design Medcom-Wide board"; | |
7 | compatible = "ad,medcom-wide", "ad,tamonten", "nvidia,tegra20"; | |
8 | ||
c4574aa0 OJ |
9 | aliases { |
10 | serial0 = &uartd; | |
11 | }; | |
12 | ||
f5bbb327 JH |
13 | chosen { |
14 | stdout-path = "serial0:115200n8"; | |
15 | }; | |
16 | ||
58ecb23f | 17 | pwm@7000a000 { |
b69cd984 AC |
18 | status = "okay"; |
19 | }; | |
20 | ||
f6826156 AB |
21 | host1x@50000000 { |
22 | dc@54200000 { | |
23 | rgb { | |
24 | status = "okay"; | |
25 | nvidia,panel = <&panel>; | |
26 | }; | |
27 | }; | |
28 | }; | |
29 | ||
731fb450 TR |
30 | i2c@7000c000 { |
31 | wm8903: wm8903@1a { | |
32 | compatible = "wlf,wm8903"; | |
33 | reg = <0x1a>; | |
34 | interrupt-parent = <&gpio>; | |
6cecf916 | 35 | interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>; |
731fb450 TR |
36 | |
37 | gpio-controller; | |
38 | #gpio-cells = <2>; | |
39 | ||
40 | micdet-cfg = <0>; | |
41 | micdet-delay = <100>; | |
42 | gpio-cfg = <0xffffffff | |
43 | 0xffffffff | |
44 | 0 | |
45 | 0xffffffff | |
46 | 0xffffffff>; | |
47 | }; | |
48 | }; | |
49 | ||
f6826156 | 50 | backlight: backlight { |
731fb450 TR |
51 | compatible = "pwm-backlight"; |
52 | pwms = <&pwm 0 5000000>; | |
53 | ||
54 | brightness-levels = <0 4 8 16 32 64 128 255>; | |
55 | default-brightness-level = <6>; | |
56 | }; | |
57 | ||
f6826156 AB |
58 | panel: panel { |
59 | compatible = "innolux,n156bge-l21", "simple-panel"; | |
60 | ||
61 | power-supply = <&vdd_1v8_reg>, <&vdd_3v3_reg>; | |
62 | enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>; | |
63 | ||
64 | backlight = <&backlight>; | |
65 | }; | |
66 | ||
731fb450 TR |
67 | sound { |
68 | compatible = "ad,tegra-audio-wm8903-medcom-wide", | |
69 | "nvidia,tegra-audio-wm8903"; | |
70 | nvidia,model = "Avionic Design Medcom-Wide"; | |
71 | ||
72 | nvidia,audio-routing = | |
73 | "Headphone Jack", "HPOUTR", | |
74 | "Headphone Jack", "HPOUTL", | |
75 | "Int Spk", "ROP", | |
76 | "Int Spk", "RON", | |
77 | "Int Spk", "LOP", | |
78 | "Int Spk", "LON", | |
79 | "Mic Jack", "MICBIAS", | |
80 | "IN1L", "Mic Jack"; | |
81 | ||
82 | nvidia,i2s-controller = <&tegra_i2s1>; | |
83 | nvidia,audio-codec = <&wm8903>; | |
84 | ||
3325f1bc SW |
85 | nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; |
86 | nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; | |
f9cd2b3b | 87 | |
885a8cfa HD |
88 | clocks = <&tegra_car TEGRA20_CLK_PLL_A>, |
89 | <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, | |
90 | <&tegra_car TEGRA20_CLK_CDEV1>; | |
f9cd2b3b | 91 | clock-names = "pll_a", "pll_a_out0", "mclk"; |
731fb450 | 92 | }; |
23e63345 AB |
93 | |
94 | regulators { | |
95 | vcc_24v_reg: regulator@100 { | |
96 | compatible = "regulator-fixed"; | |
97 | reg = <100>; | |
98 | regulator-name = "vcc_24v"; | |
99 | regulator-min-microvolt = <24000000>; | |
100 | regulator-max-microvolt = <24000000>; | |
101 | regulator-always-on; | |
102 | }; | |
103 | ||
104 | vdd_5v0_reg: regulator@101 { | |
105 | compatible = "regulator-fixed"; | |
106 | reg = <101>; | |
107 | regulator-name = "vdd_5v0"; | |
108 | vin-supply = <&vcc_24v_reg>; | |
109 | regulator-min-microvolt = <5000000>; | |
110 | regulator-max-microvolt = <5000000>; | |
111 | regulator-always-on; | |
112 | }; | |
113 | ||
114 | vdd_3v3_reg: regulator@102 { | |
115 | compatible = "regulator-fixed"; | |
116 | reg = <102>; | |
117 | regulator-name = "vdd_3v3"; | |
118 | vin-supply = <&vcc_24v_reg>; | |
119 | regulator-min-microvolt = <3300000>; | |
120 | regulator-max-microvolt = <3300000>; | |
121 | regulator-always-on; | |
122 | }; | |
123 | ||
124 | vdd_1v8_reg: regulator@103 { | |
125 | compatible = "regulator-fixed"; | |
126 | reg = <103>; | |
127 | regulator-name = "vdd_1v8"; | |
128 | vin-supply = <&vdd_3v3_reg>; | |
129 | regulator-min-microvolt = <1800000>; | |
130 | regulator-max-microvolt = <1800000>; | |
131 | regulator-always-on; | |
132 | }; | |
133 | }; | |
731fb450 | 134 | }; |