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License cleanup: add SPDX GPL-2.0 license identifier to files with no license
[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / tegra20-medcom-wide.dts
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b2441318 1// SPDX-License-Identifier: GPL-2.0
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2/dts-v1/;
3
1bd0bd49 4#include "tegra20-tamonten.dtsi"
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5
6/ {
7 model = "Avionic Design Medcom-Wide board";
8 compatible = "ad,medcom-wide", "ad,tamonten", "nvidia,tegra20";
9
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10 aliases {
11 serial0 = &uartd;
12 };
13
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14 chosen {
15 stdout-path = "serial0:115200n8";
16 };
17
58ecb23f 18 pwm@7000a000 {
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19 status = "okay";
20 };
21
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22 host1x@50000000 {
23 dc@54200000 {
24 rgb {
25 status = "okay";
26 nvidia,panel = <&panel>;
27 };
28 };
29 };
30
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31 i2c@7000c000 {
32 wm8903: wm8903@1a {
33 compatible = "wlf,wm8903";
34 reg = <0x1a>;
35 interrupt-parent = <&gpio>;
6cecf916 36 interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
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37
38 gpio-controller;
39 #gpio-cells = <2>;
40
41 micdet-cfg = <0>;
42 micdet-delay = <100>;
43 gpio-cfg = <0xffffffff
44 0xffffffff
45 0
46 0xffffffff
47 0xffffffff>;
48 };
49 };
50
f6826156 51 backlight: backlight {
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52 compatible = "pwm-backlight";
53 pwms = <&pwm 0 5000000>;
54
55 brightness-levels = <0 4 8 16 32 64 128 255>;
56 default-brightness-level = <6>;
57 };
58
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59 panel: panel {
60 compatible = "innolux,n156bge-l21", "simple-panel";
61
62 power-supply = <&vdd_1v8_reg>, <&vdd_3v3_reg>;
63 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
64
65 backlight = <&backlight>;
66 };
67
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68 sound {
69 compatible = "ad,tegra-audio-wm8903-medcom-wide",
70 "nvidia,tegra-audio-wm8903";
71 nvidia,model = "Avionic Design Medcom-Wide";
72
73 nvidia,audio-routing =
74 "Headphone Jack", "HPOUTR",
75 "Headphone Jack", "HPOUTL",
76 "Int Spk", "ROP",
77 "Int Spk", "RON",
78 "Int Spk", "LOP",
79 "Int Spk", "LON",
80 "Mic Jack", "MICBIAS",
81 "IN1L", "Mic Jack";
82
83 nvidia,i2s-controller = <&tegra_i2s1>;
84 nvidia,audio-codec = <&wm8903>;
85
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86 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
87 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
f9cd2b3b 88
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89 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
90 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
91 <&tegra_car TEGRA20_CLK_CDEV1>;
f9cd2b3b 92 clock-names = "pll_a", "pll_a_out0", "mclk";
731fb450 93 };
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94
95 regulators {
96 vcc_24v_reg: regulator@100 {
97 compatible = "regulator-fixed";
98 reg = <100>;
99 regulator-name = "vcc_24v";
100 regulator-min-microvolt = <24000000>;
101 regulator-max-microvolt = <24000000>;
102 regulator-always-on;
103 };
104
105 vdd_5v0_reg: regulator@101 {
106 compatible = "regulator-fixed";
107 reg = <101>;
108 regulator-name = "vdd_5v0";
109 vin-supply = <&vcc_24v_reg>;
110 regulator-min-microvolt = <5000000>;
111 regulator-max-microvolt = <5000000>;
112 regulator-always-on;
113 };
114
115 vdd_3v3_reg: regulator@102 {
116 compatible = "regulator-fixed";
117 reg = <102>;
118 regulator-name = "vdd_3v3";
119 vin-supply = <&vcc_24v_reg>;
120 regulator-min-microvolt = <3300000>;
121 regulator-max-microvolt = <3300000>;
122 regulator-always-on;
123 };
124
125 vdd_1v8_reg: regulator@103 {
126 compatible = "regulator-fixed";
127 reg = <103>;
128 regulator-name = "vdd_1v8";
129 vin-supply = <&vdd_3v3_reg>;
130 regulator-min-microvolt = <1800000>;
131 regulator-max-microvolt = <1800000>;
132 regulator-always-on;
133 };
134 };
731fb450 135};