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ARM: tegra: create a DT header defining GPIO IDs
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / tegra20-seaboard.dts
CommitLineData
8e267f3d
GL		 1/dts-v1/;
2
1bd0bd49 3#include "tegra20.dtsi"
8e267f3d
GL		 4
5/ {
6 model = "NVIDIA Seaboard";
7 compatible = "nvidia,seaboard", "nvidia,tegra20";
8
8e267f3d 9 memory {
95decf84 10 reg = <0x00000000 0x40000000>;
8e267f3d
GL		 11 };
12
a75191e6
SW		 13 host1x {
14 hdmi {
15 status = "okay";
16
17 vdd-supply = <&hdmi_vdd_reg>;
18 pll-supply = <&hdmi_pll_reg>;
19
20 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
21 nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
22 };
23 };
24
f9eb26a4 25 pinmux {
ecc295bb
SW		 26 pinctrl-names = "default";
27 pinctrl-0 = <&state_default>;
28
29 state_default: pinmux {
30 ata {
31 nvidia,pins = "ata";
32 nvidia,function = "ide";
33 };
34 atb {
35 nvidia,pins = "atb", "gma", "gme";
36 nvidia,function = "sdio4";
37 };
38 atc {
39 nvidia,pins = "atc";
40 nvidia,function = "nand";
41 };
42 atd {
43 nvidia,pins = "atd", "ate", "gmb", "spia",
44 "spib", "spic";
45 nvidia,function = "gmi";
46 };
47 cdev1 {
48 nvidia,pins = "cdev1";
49 nvidia,function = "plla_out";
50 };
51 cdev2 {
52 nvidia,pins = "cdev2";
53 nvidia,function = "pllp_out4";
54 };
55 crtp {
56 nvidia,pins = "crtp", "lm1";
57 nvidia,function = "crt";
58 };
59 csus {
60 nvidia,pins = "csus";
61 nvidia,function = "vi_sensor_clk";
62 };
63 dap1 {
64 nvidia,pins = "dap1";
65 nvidia,function = "dap1";
66 };
67 dap2 {
68 nvidia,pins = "dap2";
69 nvidia,function = "dap2";
70 };
71 dap3 {
72 nvidia,pins = "dap3";
73 nvidia,function = "dap3";
74 };
75 dap4 {
76 nvidia,pins = "dap4";
77 nvidia,function = "dap4";
78 };
ecc295bb
SW		 79 dta {
80 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
81 nvidia,function = "vi";
82 };
83 dtf {
84 nvidia,pins = "dtf";
85 nvidia,function = "i2c3";
86 };
87 gmc {
88 nvidia,pins = "gmc";
89 nvidia,function = "uartd";
90 };
91 gmd {
92 nvidia,pins = "gmd";
93 nvidia,function = "sflash";
94 };
95 gpu {
96 nvidia,pins = "gpu";
97 nvidia,function = "pwm";
98 };
99 gpu7 {
100 nvidia,pins = "gpu7";
101 nvidia,function = "rtck";
102 };
103 gpv {
104 nvidia,pins = "gpv", "slxa", "slxk";
105 nvidia,function = "pcie";
106 };
107 hdint {
108 nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
802a8499 109 "lsck", "lsda";
ecc295bb
SW		 110 nvidia,function = "hdmi";
111 };
112 i2cp {
113 nvidia,pins = "i2cp";
114 nvidia,function = "i2cp";
115 };
116 irrx {
117 nvidia,pins = "irrx", "irtx";
118 nvidia,function = "uartb";
119 };
120 kbca {
121 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
122 "kbce", "kbcf";
123 nvidia,function = "kbc";
124 };
125 lcsn {
126 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
127 "lsdi", "lvp0";
128 nvidia,function = "rsvd4";
129 };
130 ld0 {
131 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
132 "ld5", "ld6", "ld7", "ld8", "ld9",
133 "ld10", "ld11", "ld12", "ld13", "ld14",
134 "ld15", "ld16", "ld17", "ldi", "lhp0",
135 "lhp1", "lhp2", "lhs", "lpp", "lsc0",
136 "lspi", "lvp1", "lvs";
137 nvidia,function = "displaya";
138 };
a18cf6dc
SW		 139 owc {
140 nvidia,pins = "owc", "spdi", "spdo", "uac";
141 nvidia,function = "rsvd2";
142 };
ecc295bb
SW		 143 pmc {
144 nvidia,pins = "pmc";
145 nvidia,function = "pwr_on";
146 };
147 rm {
148 nvidia,pins = "rm";
149 nvidia,function = "i2c1";
150 };
151 sdb {
152 nvidia,pins = "sdb", "sdc", "sdd";
153 nvidia,function = "sdio3";
154 };
155 sdio1 {
156 nvidia,pins = "sdio1";
157 nvidia,function = "sdio1";
158 };
159 slxc {
160 nvidia,pins = "slxc", "slxd";
161 nvidia,function = "spdif";
162 };
163 spid {
164 nvidia,pins = "spid", "spie", "spif";
165 nvidia,function = "spi1";
166 };
167 spig {
168 nvidia,pins = "spig", "spih";
169 nvidia,function = "spi2_alt";
170 };
171 uaa {
172 nvidia,pins = "uaa", "uab", "uda";
173 nvidia,function = "ulpi";
174 };
175 uad {
176 nvidia,pins = "uad";
177 nvidia,function = "irda";
178 };
179 uca {
180 nvidia,pins = "uca", "ucb";
181 nvidia,function = "uartc";
182 };
183 conf_ata {
184 nvidia,pins = "ata", "atb", "atc", "atd",
185 "cdev1", "cdev2", "dap1", "dap2",
a18cf6dc 186 "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
ecc295bb
SW		 187 "gme", "gpu", "gpu7", "i2cp", "irrx",
188 "irtx", "pta", "rm", "sdc", "sdd",
189 "slxd", "slxk", "spdi", "spdo", "uac",
190 "uad", "uca", "ucb", "uda";
191 nvidia,pull = <0>;
192 nvidia,tristate = <0>;
193 };
194 conf_ate {
a18cf6dc 195 nvidia,pins = "ate", "csus", "dap3",
ecc295bb
SW		 196 "gpv", "owc", "slxc", "spib", "spid",
197 "spie";
198 nvidia,pull = <0>;
199 nvidia,tristate = <1>;
200 };
201 conf_ck32 {
202 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
203 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
204 nvidia,pull = <0>;
205 };
206 conf_crtp {
207 nvidia,pins = "crtp", "gmb", "slxa", "spia",
208 "spig", "spih";
209 nvidia,pull = <2>;
210 nvidia,tristate = <1>;
211 };
212 conf_dta {
213 nvidia,pins = "dta", "dtb", "dtc", "dtd";
214 nvidia,pull = <1>;
215 nvidia,tristate = <0>;
216 };
217 conf_dte {
218 nvidia,pins = "dte", "spif";
219 nvidia,pull = <1>;
220 nvidia,tristate = <1>;
221 };
222 conf_hdint {
223 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
224 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
225 "lvp0";
226 nvidia,tristate = <1>;
227 };
228 conf_kbca {
229 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
230 "kbce", "kbcf", "sdio1", "spic", "uaa",
231 "uab";
232 nvidia,pull = <2>;
233 nvidia,tristate = <0>;
234 };
235 conf_lc {
236 nvidia,pins = "lc", "ls";
237 nvidia,pull = <2>;
238 };
239 conf_ld0 {
240 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
241 "ld5", "ld6", "ld7", "ld8", "ld9",
242 "ld10", "ld11", "ld12", "ld13", "ld14",
243 "ld15", "ld16", "ld17", "ldi", "lhp0",
244 "lhp1", "lhp2", "lhs", "lm0", "lpp",
245 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
246 "lvs", "pmc", "sdb";
247 nvidia,tristate = <0>;
248 };
249 conf_ld17_0 {
250 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
251 "ld23_22";
252 nvidia,pull = <1>;
253 };
254 drive_sdio1 {
255 nvidia,pins = "drive_sdio1";
256 nvidia,high-speed-mode = <0>;
257 nvidia,schmitt = <0>;
258 nvidia,low-power-mode = <3>;
259 nvidia,pull-down-strength = <31>;
260 nvidia,pull-up-strength = <31>;
261 nvidia,slew-rate-rising = <3>;
262 nvidia,slew-rate-falling = <3>;
263 };
264 };
a18cf6dc
SW		 265
266 state_i2cmux_ddc: pinmux_i2cmux_ddc {
267 ddc {
268 nvidia,pins = "ddc";
269 nvidia,function = "i2c2";
270 };
271 pta {
272 nvidia,pins = "pta";
273 nvidia,function = "rsvd4";
274 };
275 };
276
277 state_i2cmux_pta: pinmux_i2cmux_pta {
278 ddc {
279 nvidia,pins = "ddc";
280 nvidia,function = "rsvd4";
281 };
282 pta {
283 nvidia,pins = "pta";
284 nvidia,function = "i2c2";
285 };
286 };
287
288 state_i2cmux_idle: pinmux_i2cmux_idle {
289 ddc {
290 nvidia,pins = "ddc";
291 nvidia,function = "rsvd4";
292 };
293 pta {
294 nvidia,pins = "pta";
295 nvidia,function = "rsvd4";
296 };
297 };
ecc295bb
SW		 298 };
299
2a5fdc9a
SW		 300 i2s@70002800 {
301 status = "okay";
c04abb3a
SW		 302 };
303
304 serial@70006300 {
2a5fdc9a 305 status = "okay";
c04abb3a
SW		 306 };
307
88950f3b 308 i2c@7000c000 {
2a5fdc9a 309 status = "okay";
88950f3b 310 clock-frequency = <400000>;
797acf70
SW		 311
312 wm8903: wm8903@1a {
313 compatible = "wlf,wm8903";
314 reg = <0x1a>;
315 interrupt-parent = <&gpio>;
95decf84 316 interrupts = <187 0x04>;
797acf70
SW		 317
318 gpio-controller;
319 #gpio-cells = <2>;
320
321 micdet-cfg = <0>;
322 micdet-delay = <100>;
95decf84 323 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
797acf70 324 };
b46b0b54
LD		 325
326 /* ALS and proximity sensor */
327 isl29018@44 {
328 compatible = "isil,isl29018";
329 reg = <0x44>;
330 interrupt-parent = <&gpio>;
95decf84 331 interrupts = <202 0x04>; /* GPIO PZ2 */
b46b0b54 332 };
45dbe9dd
OJ		 333
334 gyrometer@68 {
335 compatible = "invn,mpu3050";
336 reg = <0x68>;
337 interrupt-parent = <&gpio>;
338 interrupts = <204 0x04>; /* gpio PZ4 */
339 };
88950f3b
SW		 340 };
341
342 i2c@7000c400 {
2a5fdc9a 343 status = "okay";
22bd1f7e 344 clock-frequency = <100000>;
88950f3b
SW		 345 };
346
a18cf6dc
SW		 347 i2cmux {
348 compatible = "i2c-mux-pinctrl";
349 #address-cells = <1>;
350 #size-cells = <0>;
351
352 i2c-parent = <&{/i2c@7000c400}>;
353
354 pinctrl-names = "ddc", "pta", "idle";
355 pinctrl-0 = <&state_i2cmux_ddc>;
356 pinctrl-1 = <&state_i2cmux_pta>;
357 pinctrl-2 = <&state_i2cmux_idle>;
358
a75191e6 359 hdmi_ddc: i2c@0 {
a18cf6dc
SW		 360 reg = <0>;
361 #address-cells = <1>;
362 #size-cells = <0>;
363 };
364
365 i2c@1 {
366 reg = <1>;
367 #address-cells = <1>;
368 #size-cells = <0>;
0879c5f7
SW		 369
370 smart-battery@b {
371 compatible = "ti,bq20z75", "smart-battery-1.1";
372 reg = <0xb>;
373 ti,i2c-retry-count = <2>;
374 ti,poll-retry-count = <10>;
375 };
a18cf6dc
SW		 376 };
377 };
378
88950f3b 379 i2c@7000c500 {
2a5fdc9a 380 status = "okay";
88950f3b
SW		 381 clock-frequency = <400000>;
382 };
383
384 i2c@7000d000 {
2a5fdc9a 385 status = "okay";
88950f3b 386 clock-frequency = <400000>;
401c9a50 387
6529e638
SW		 388 pmic: tps6586x@34 {
389 compatible = "ti,tps6586x";
390 reg = <0x34>;
391 interrupts = <0 86 0x4>;
392
44b12ef7
SW		 393 ti,system-power-controller;
394
6529e638
SW		 395 #gpio-cells = <2>;
396 gpio-controller;
397
398 sys-supply = <&vdd_5v0_reg>;
399 vin-sm0-supply = <&sys_reg>;
400 vin-sm1-supply = <&sys_reg>;
401 vin-sm2-supply = <&sys_reg>;
402 vinldo01-supply = <&sm2_reg>;
403 vinldo23-supply = <&sm2_reg>;
404 vinldo4-supply = <&sm2_reg>;
405 vinldo678-supply = <&sm2_reg>;
406 vinldo9-supply = <&sm2_reg>;
407
408 regulators {
b9c665d7 409 sys_reg: sys {
6529e638
SW		 410 regulator-name = "vdd_sys";
411 regulator-always-on;
412 };
413
b9c665d7 414 sm0 {
6529e638
SW		 415 regulator-name = "vdd_sm0,vdd_core";
416 regulator-min-microvolt = <1300000>;
417 regulator-max-microvolt = <1300000>;
418 regulator-always-on;
419 };
420
b9c665d7 421 sm1 {
6529e638
SW		 422 regulator-name = "vdd_sm1,vdd_cpu";
423 regulator-min-microvolt = <1125000>;
424 regulator-max-microvolt = <1125000>;
425 regulator-always-on;
426 };
427
b9c665d7 428 sm2_reg: sm2 {
6529e638
SW		 429 regulator-name = "vdd_sm2,vin_ldo*";
430 regulator-min-microvolt = <3700000>;
431 regulator-max-microvolt = <3700000>;
432 regulator-always-on;
433 };
434
435 /* LDO0 is not connected to anything */
436
b9c665d7 437 ldo1 {
6529e638
SW		 438 regulator-name = "vdd_ldo1,avdd_pll*";
439 regulator-min-microvolt = <1100000>;
440 regulator-max-microvolt = <1100000>;
441 regulator-always-on;
442 };
443
b9c665d7 444 ldo2 {
6529e638
SW		 445 regulator-name = "vdd_ldo2,vdd_rtc";
446 regulator-min-microvolt = <1200000>;
447 regulator-max-microvolt = <1200000>;
448 };
449
b9c665d7 450 ldo3 {
6529e638
SW		 451 regulator-name = "vdd_ldo3,avdd_usb*";
452 regulator-min-microvolt = <3300000>;
453 regulator-max-microvolt = <3300000>;
454 regulator-always-on;
455 };
456
b9c665d7 457 ldo4 {
6529e638
SW		 458 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
459 regulator-min-microvolt = <1800000>;
460 regulator-max-microvolt = <1800000>;
461 regulator-always-on;
462 };
463
b9c665d7 464 ldo5 {
6529e638
SW		 465 regulator-name = "vdd_ldo5,vcore_mmc";
466 regulator-min-microvolt = <2850000>;
467 regulator-max-microvolt = <2850000>;
468 regulator-always-on;
469 };
470
b9c665d7 471 ldo6 {
6529e638
SW		 472 regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
473 regulator-min-microvolt = <1800000>;
474 regulator-max-microvolt = <1800000>;
475 };
476
a75191e6 477 hdmi_vdd_reg: ldo7 {
6529e638
SW		 478 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
479 regulator-min-microvolt = <3300000>;
480 regulator-max-microvolt = <3300000>;
481 };
482
a75191e6 483 hdmi_pll_reg: ldo8 {
6529e638
SW		 484 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
485 regulator-min-microvolt = <1800000>;
486 regulator-max-microvolt = <1800000>;
487 };
488
b9c665d7 489 ldo9 {
6529e638
SW		 490 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
491 regulator-min-microvolt = <2850000>;
492 regulator-max-microvolt = <2850000>;
493 regulator-always-on;
494 };
495
b9c665d7 496 ldo_rtc {
6529e638
SW		 497 regulator-name = "vdd_rtc_out,vdd_cell";
498 regulator-min-microvolt = <3300000>;
499 regulator-max-microvolt = <3300000>;
500 regulator-always-on;
501 };
502 };
503 };
504
45dbe9dd 505 temperature-sensor@4c {
9846210b 506 compatible = "onnn,nct1008";
401c9a50
SW		 507 reg = <0x4c>;
508 };
45dbe9dd
OJ		 509
510 magnetometer@c {
9846210b 511 compatible = "ak,ak8975";
45dbe9dd
OJ		 512 reg = <0xc>;
513 interrupt-parent = <&gpio>;
514 interrupts = <109 0x04>; /* gpio PN5 */
515 };
88950f3b
SW		 516 };
517
6529e638
SW		 518 pmc {
519 nvidia,invert-interrupt;
a44a019d
JL		 520 nvidia,suspend-mode = <2>;
521 nvidia,cpu-pwr-good-time = <5000>;
522 nvidia,cpu-pwr-off-time = <5000>;
523 nvidia,core-pwr-good-time = <3845 3845>;
524 nvidia,core-pwr-off-time = <3875>;
525 nvidia,sys-clock-req-active-high;
6529e638
SW		 526 };
527
bbfc33bd 528 memory-controller@7000f400 {
c04abb3a
SW		 529 emc-table@190000 {
530 reg = <190000>;
531 compatible = "nvidia,tegra20-emc-table";
532 clock-frequency = <190000>;
533 nvidia,emc-registers = <0x0000000c 0x00000026
534 0x00000009 0x00000003 0x00000004 0x00000004
535 0x00000002 0x0000000c 0x00000003 0x00000003
536 0x00000002 0x00000001 0x00000004 0x00000005
537 0x00000004 0x00000009 0x0000000d 0x0000059f
538 0x00000000 0x00000003 0x00000003 0x00000003
539 0x00000003 0x00000001 0x0000000b 0x000000c8
540 0x00000003 0x00000007 0x00000004 0x0000000f
541 0x00000002 0x00000000 0x00000000 0x00000002
542 0x00000000 0x00000000 0x00000083 0xa06204ae
543 0x007dc010 0x00000000 0x00000000 0x00000000
544 0x00000000 0x00000000 0x00000000 0x00000000>;
545 };
31c1ec92 546
c04abb3a
SW		 547 emc-table@380000 {
548 reg = <380000>;
549 compatible = "nvidia,tegra20-emc-table";
550 clock-frequency = <380000>;
551 nvidia,emc-registers = <0x00000017 0x0000004b
552 0x00000012 0x00000006 0x00000004 0x00000005
553 0x00000003 0x0000000c 0x00000006 0x00000006
554 0x00000003 0x00000001 0x00000004 0x00000005
555 0x00000004 0x00000009 0x0000000d 0x00000b5f
556 0x00000000 0x00000003 0x00000003 0x00000006
557 0x00000006 0x00000001 0x00000011 0x000000c8
558 0x00000003 0x0000000e 0x00000007 0x0000000f
559 0x00000002 0x00000000 0x00000000 0x00000002
560 0x00000000 0x00000000 0x00000083 0xe044048b
561 0x007d8010 0x00000000 0x00000000 0x00000000
562 0x00000000 0x00000000 0x00000000 0x00000000>;
563 };
31c1ec92
SW		 564 };
565
c04abb3a 566 usb@c5000000 {
2a5fdc9a 567 status = "okay";
c04abb3a
SW		 568 nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
569 dr_mode = "otg";
8e267f3d
GL		 570 };
571
4c94c8b5
VB		 572 usb-phy@c5000000 {
573 status = "okay";
574 vbus-supply = <&vbus_reg>;
575 dr_mode = "otg";
576 };
577
c04abb3a 578 usb@c5004000 {
2a5fdc9a 579 status = "okay";
9dffe3be 580 nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */
31c1ec92
SW		 581 };
582
9dffe3be 583 usb-phy@c5004000 {
4c94c8b5 584 status = "okay";
9dffe3be 585 nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */
1292c129
SW		 586 };
587
9dffe3be
VB		 588 usb@c5008000 {
589 status = "okay";
40e8b3a6
VB		 590 };
591
4c94c8b5
VB		 592 usb-phy@c5008000 {
593 status = "okay";
594 };
595
da2fc651
WN		 596 sdhci@c8000000 {
597 status = "okay";
598 power-gpios = <&gpio 86 0>; /* gpio PK6 */
599 bus-width = <4>;
7a2617a6 600 keep-power-in-suspend;
da2fc651
WN		 601 };
602
8e267f3d 603 sdhci@c8000400 {
2a5fdc9a 604 status = "okay";
908ab936 605 cd-gpios = <&gpio 69 1>; /* gpio PI5 */
a0638eb6
SW		 606 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
607 power-gpios = <&gpio 70 0>; /* gpio PI6 */
7f217794 608 bus-width = <4>;
8e267f3d 609 };
6111d50c
SW		 610
611 sdhci@c8000600 {
2a5fdc9a 612 status = "okay";
7f217794 613 bus-width = <8>;
7a2617a6 614 non-removable;
6111d50c 615 };
c27317c0 616
7021d122
JL		 617 clocks {
618 compatible = "simple-bus";
619 #address-cells = <1>;
620 #size-cells = <0>;
621
622 clk32k_in: clock {
623 compatible = "fixed-clock";
624 reg=<0>;
625 #clock-cells = <0>;
626 clock-frequency = <32768>;
627 };
628 };
629
f0d14306
SW		 630 gpio-keys {
631 compatible = "gpio-keys";
632
633 power {
634 label = "Power";
635 gpios = <&gpio 170 1>; /* gpio PV2, active low */
636 linux,code = <116>; /* KEY_POWER */
637 gpio-key,wakeup;
638 };
639
640 lid {
641 label = "Lid";
642 gpios = <&gpio 23 0>; /* gpio PC7 */
643 linux,input-type = <5>; /* EV_SW */
644 linux,code = <0>; /* SW_LID */
645 debounce-interval = <1>;
646 gpio-key,wakeup;
647 };
648 };
d8017a97 649
beb0e325
LD		 650 kbc {
651 status = "okay";
652 nvidia,debounce-delay-ms = <32>;
653 nvidia,repeat-delay-ms = <160>;
654 nvidia,ghost-filter;
655 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
656 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
657 linux,keymap = <0x00020011 /* KEY_W */
658 0x0003001F /* KEY_S */
659 0x0004001E /* KEY_A */
660 0x0005002C /* KEY_Z */
661 0x000701d0 /* KEY_FN */
662
663 0x0107007D /* KEY_LEFTMETA */
664 0x02060064 /* KEY_RIGHTALT */
665 0x02070038 /* KEY_LEFTALT */
666
667 0x03000006 /* KEY_5 */
668 0x03010005 /* KEY_4 */
669 0x03020013 /* KEY_R */
670 0x03030012 /* KEY_E */
671 0x03040021 /* KEY_F */
672 0x03050020 /* KEY_D */
673 0x0306002D /* KEY_X */
674
675 0x04000008 /* KEY_7 */
676 0x04010007 /* KEY_6 */
677 0x04020014 /* KEY_T */
678 0x04030023 /* KEY_H */
679 0x04040022 /* KEY_G */
680 0x0405002F /* KEY_V */
681 0x0406002E /* KEY_C */
682 0x04070039 /* KEY_SPACE */
683
684 0x0500000A /* KEY_9 */
685 0x05010009 /* KEY_8 */
686 0x05020016 /* KEY_U */
687 0x05030015 /* KEY_Y */
688 0x05040024 /* KEY_J */
689 0x05050031 /* KEY_N */
690 0x05060030 /* KEY_B */
691 0x0507002B /* KEY_BACKSLASH */
692
693 0x0600000C /* KEY_MINUS */
694 0x0601000B /* KEY_0 */
695 0x06020018 /* KEY_O */
696 0x06030017 /* KEY_I */
697 0x06040026 /* KEY_L */
698 0x06050025 /* KEY_K */
699 0x06060033 /* KEY_COMMA */
700 0x06070032 /* KEY_M */
701
702 0x0701000D /* KEY_EQUAL */
703 0x0702001B /* KEY_RIGHTBRACE */
704 0x0703001C /* KEY_ENTER */
705 0x0707008B /* KEY_MENU */
706
707 0x08040036 /* KEY_RIGHTSHIFT */
708 0x0805002A /* KEY_LEFTSHIFT */
709
710 0x09050061 /* KEY_RIGHTCTRL */
711 0x0907001D /* KEY_LEFTCTRL */
712
713 0x0B00001A /* KEY_LEFTBRACE */
714 0x0B010019 /* KEY_P */
715 0x0B020028 /* KEY_APOSTROPHE */
716 0x0B030027 /* KEY_SEMICOLON */
717 0x0B040035 /* KEY_SLASH */
718 0x0B050034 /* KEY_DOT */
719
720 0x0C000044 /* KEY_F10 */
721 0x0C010043 /* KEY_F9 */
722 0x0C02000E /* KEY_BACKSPACE */
723 0x0C030004 /* KEY_3 */
724 0x0C040003 /* KEY_2 */
725 0x0C050067 /* KEY_UP */
726 0x0C0600D2 /* KEY_PRINT */
727 0x0C070077 /* KEY_PAUSE */
728
729 0x0D00006E /* KEY_INSERT */
730 0x0D01006F /* KEY_DELETE */
731 0x0D030068 /* KEY_PAGEUP */
732 0x0D04006D /* KEY_PAGEDOWN */
733 0x0D05006A /* KEY_RIGHT */
734 0x0D06006C /* KEY_DOWN */
735 0x0D070069 /* KEY_LEFT */
736
737 0x0E000057 /* KEY_F11 */
738 0x0E010058 /* KEY_F12 */
739 0x0E020042 /* KEY_F8 */
740 0x0E030010 /* KEY_Q */
741 0x0E04003E /* KEY_F4 */
742 0x0E05003D /* KEY_F3 */
743 0x0E060002 /* KEY_1 */
744 0x0E070041 /* KEY_F7 */
745
746 0x0F000001 /* KEY_ESC */
747 0x0F010029 /* KEY_GRAVE */
748 0x0F02003F /* KEY_F5 */
749 0x0F03000F /* KEY_TAB */
750 0x0F04003B /* KEY_F1 */
751 0x0F05003C /* KEY_F2 */
752 0x0F06003A /* KEY_CAPSLOCK */
753 0x0F070040 /* KEY_F6 */
754
755 /* Software Handled Function Keys */
756 0x14000047 /* KEY_KP7 */
757
758 0x15000049 /* KEY_KP9 */
759 0x15010048 /* KEY_KP8 */
760 0x1502004B /* KEY_KP4 */
761 0x1504004F /* KEY_KP1 */
762
763 0x1601004E /* KEY_KPSLASH */
764 0x1602004D /* KEY_KP6 */
765 0x1603004C /* KEY_KP5 */
766 0x16040051 /* KEY_KP3 */
767 0x16050050 /* KEY_KP2 */
768 0x16070052 /* KEY_KP0 */
769
770 0x1B010037 /* KEY_KPASTERISK */
771 0x1B03004A /* KEY_KPMINUS */
772 0x1B04004E /* KEY_KPPLUS */
773 0x1B050053 /* KEY_KPDOT */
774
775 0x1C050073 /* KEY_VOLUMEUP */
776
777 0x1D030066 /* KEY_HOME */
778 0x1D04006B /* KEY_END */
779 0x1D0500E0 /* KEY_BRIGHTNESSDOWN */
780 0x1D060072 /* KEY_VOLUMEDOWN */
781 0x1D0700E1 /* KEY_BRIGHTNESSUP */
782
783 0x1E000045 /* KEY_NUMLOCK */
784 0x1E010046 /* KEY_SCROLLLOCK */
785 0x1E020071 /* KEY_MUTE */
786
787 0x1F04008A>; /* KEY_HELP */
788 };
6529e638
SW		 789 regulators {
790 compatible = "simple-bus";
791 #address-cells = <1>;
792 #size-cells = <0>;
793
794 vdd_5v0_reg: regulator@0 {
795 compatible = "regulator-fixed";
796 reg = <0>;
797 regulator-name = "vdd_5v0";
798 regulator-min-microvolt = <5000000>;
799 regulator-max-microvolt = <5000000>;
800 regulator-always-on;
801 };
802
803 regulator@1 {
804 compatible = "regulator-fixed";
805 reg = <1>;
806 regulator-name = "vdd_1v5";
807 regulator-min-microvolt = <1500000>;
808 regulator-max-microvolt = <1500000>;
809 gpio = <&pmic 0 0>;
810 };
811
812 regulator@2 {
813 compatible = "regulator-fixed";
814 reg = <2>;
815 regulator-name = "vdd_1v2";
816 regulator-min-microvolt = <1200000>;
817 regulator-max-microvolt = <1200000>;
818 gpio = <&pmic 1 0>;
819 enable-active-high;
820 };
4c94c8b5
VB		 821
822 vbus_reg: regulator@3 {
823 compatible = "regulator-fixed";
824 reg = <3>;
825 regulator-name = "vdd_vbus_wup1";
826 regulator-min-microvolt = <5000000>;
827 regulator-max-microvolt = <5000000>;
828 gpio = <&gpio 24 0>; /* PD0 */
829 };
6529e638
SW		 830 };
831
c04abb3a
SW		 832 sound {
833 compatible = "nvidia,tegra-audio-wm8903-seaboard",
834 "nvidia,tegra-audio-wm8903";
835 nvidia,model = "NVIDIA Tegra Seaboard";
d8017a97 836
c04abb3a
SW		 837 nvidia,audio-routing =
838 "Headphone Jack", "HPOUTR",
839 "Headphone Jack", "HPOUTL",
840 "Int Spk", "ROP",
841 "Int Spk", "RON",
842 "Int Spk", "LOP",
843 "Int Spk", "LON",
844 "Mic Jack", "MICBIAS",
845 "IN1R", "Mic Jack";
aa607ebf 846
c04abb3a
SW		 847 nvidia,i2s-controller = <&tegra_i2s1>;
848 nvidia,audio-codec = <&wm8903>;
849
850 nvidia,spkr-en-gpios = <&wm8903 2 0>;
851 nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
f9cd2b3b 852
1071b2df 853 clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
f9cd2b3b 854 clock-names = "pll_a", "pll_a_out0", "mclk";
aa607ebf 855 };
8e267f3d 856};
Ubuntu Eoan Linux kernel mirror