projects / mirror_ubuntu-eoan-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 175f16fa TR |
2 | /dts-v1/; |
| 3 | ||
| 1bd0bd49 | 4 | #include "tegra20-tamonten.dtsi" |
| 175f16fa TR |
5 | |
| 6 | / { | |
| 7 | model = "Avionic Design Tamonten Evaluation Carrier"; | |
| 8 | compatible = "ad,tec", "ad,tamonten", "nvidia,tegra20"; | |
| 9 | ||
| 58ecb23f SW |
10 | host1x@50000000 { |
| 11 | hdmi@54280000 { | |
| cab2ed62 TR |
12 | status = "okay"; |
| 13 | }; | |
| 14 | }; | |
| 15 | ||
| 175f16fa | 16 | i2c@7000c000 { |
| 175f16fa TR |
17 | wm8903: wm8903@1a { |
| 18 | compatible = "wlf,wm8903"; | |
| 19 | reg = <0x1a>; | |
| 20 | interrupt-parent = <&gpio>; | |
| 6cecf916 | 21 | interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>; |
| 175f16fa TR |
22 | |
| 23 | gpio-controller; | |
| 24 | #gpio-cells = <2>; | |
| 25 | ||
| 26 | micdet-cfg = <0>; | |
| 27 | micdet-delay = <100>; | |
| 28 | gpio-cfg = <0xffffffff | |
| 29 | 0xffffffff | |
| 30 | 0 | |
| 31 | 0xffffffff | |
| 32 | 0xffffffff>; | |
| 33 | }; | |
| 34 | }; | |
| 35 | ||
| 508d690e | 36 | pcie@80003000 { |
| 237bcad1 TR |
37 | status = "okay"; |
| 38 | ||
| 39 | pci@1,0 { | |
| 40 | status = "okay"; | |
| 41 | }; | |
| 42 | }; | |
| 43 | ||
| 175f16fa TR |
44 | sound { |
| 45 | compatible = "ad,tegra-audio-wm8903-tec", | |
| 46 | "nvidia,tegra-audio-wm8903"; | |
| 47 | nvidia,model = "Avionic Design TEC"; | |
| 48 | ||
| 49 | nvidia,audio-routing = | |
| 50 | "Headphone Jack", "HPOUTR", | |
| 51 | "Headphone Jack", "HPOUTL", | |
| 52 | "Int Spk", "ROP", | |
| 53 | "Int Spk", "RON", | |
| 54 | "Int Spk", "LOP", | |
| 55 | "Int Spk", "LON", | |
| 56 | "Mic Jack", "MICBIAS", | |
| 57 | "IN1L", "Mic Jack"; | |
| 58 | ||
| 59 | nvidia,i2s-controller = <&tegra_i2s1>; | |
| 60 | nvidia,audio-codec = <&wm8903>; | |
| 61 | ||
| 3325f1bc SW |
62 | nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; |
| 63 | nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) | |
| 64 | GPIO_ACTIVE_HIGH>; | |
| f9cd2b3b | 65 | |
| 885a8cfa HD |
66 | clocks = <&tegra_car TEGRA20_CLK_PLL_A>, |
| 67 | <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, | |
| 68 | <&tegra_car TEGRA20_CLK_CDEV1>; | |
| f9cd2b3b | 69 | clock-names = "pll_a", "pll_a_out0", "mclk"; |
| 175f16fa | 70 | }; |
| 23e63345 AB |
71 | |
| 72 | regulators { | |
| 73 | vcc_24v_reg: regulator@100 { | |
| 74 | compatible = "regulator-fixed"; | |
| 75 | reg = <100>; | |
| 76 | regulator-name = "vcc_24v"; | |
| 77 | regulator-min-microvolt = <24000000>; | |
| 78 | regulator-max-microvolt = <24000000>; | |
| 79 | regulator-always-on; | |
| 80 | }; | |
| 81 | ||
| 82 | vdd_5v0_reg: regulator@101 { | |
| 83 | compatible = "regulator-fixed"; | |
| 84 | reg = <101>; | |
| 85 | regulator-name = "vdd_5v0"; | |
| 86 | vin-supply = <&vcc_24v_reg>; | |
| 87 | regulator-min-microvolt = <5000000>; | |
| 88 | regulator-max-microvolt = <5000000>; | |
| 89 | regulator-always-on; | |
| 90 | }; | |
| 91 | ||
| 92 | vdd_3v3_reg: regulator@102 { | |
| 93 | compatible = "regulator-fixed"; | |
| 94 | reg = <102>; | |
| 95 | regulator-name = "vdd_3v3"; | |
| 96 | vin-supply = <&vcc_24v_reg>; | |
| 97 | regulator-min-microvolt = <3300000>; | |
| 98 | regulator-max-microvolt = <3300000>; | |
| 99 | regulator-always-on; | |
| 100 | }; | |
| 101 | ||
| 102 | vdd_1v8_reg: regulator@103 { | |
| 103 | compatible = "regulator-fixed"; | |
| 104 | reg = <103>; | |
| 105 | regulator-name = "vdd_1v8"; | |
| 106 | vin-supply = <&vdd_3v3_reg>; | |
| 107 | regulator-min-microvolt = <1800000>; | |
| 108 | regulator-max-microvolt = <1800000>; | |
| 109 | regulator-always-on; | |
| 110 | }; | |
| 111 | }; | |
| 175f16fa | 112 | }; |