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Commit | Line | Data |
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175f16fa TR |
1 | /dts-v1/; |
2 | ||
1bd0bd49 | 3 | #include "tegra20-tamonten.dtsi" |
175f16fa TR |
4 | |
5 | / { | |
6 | model = "Avionic Design Tamonten Evaluation Carrier"; | |
7 | compatible = "ad,tec", "ad,tamonten", "nvidia,tegra20"; | |
8 | ||
cab2ed62 TR |
9 | host1x { |
10 | hdmi { | |
11 | status = "okay"; | |
12 | }; | |
13 | }; | |
14 | ||
175f16fa | 15 | i2c@7000c000 { |
175f16fa TR |
16 | wm8903: wm8903@1a { |
17 | compatible = "wlf,wm8903"; | |
18 | reg = <0x1a>; | |
19 | interrupt-parent = <&gpio>; | |
6cecf916 | 20 | interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>; |
175f16fa TR |
21 | |
22 | gpio-controller; | |
23 | #gpio-cells = <2>; | |
24 | ||
25 | micdet-cfg = <0>; | |
26 | micdet-delay = <100>; | |
27 | gpio-cfg = <0xffffffff | |
28 | 0xffffffff | |
29 | 0 | |
30 | 0xffffffff | |
31 | 0xffffffff>; | |
32 | }; | |
33 | }; | |
34 | ||
237bcad1 TR |
35 | pcie-controller { |
36 | status = "okay"; | |
37 | ||
38 | pci@1,0 { | |
39 | status = "okay"; | |
40 | }; | |
41 | }; | |
42 | ||
175f16fa TR |
43 | sound { |
44 | compatible = "ad,tegra-audio-wm8903-tec", | |
45 | "nvidia,tegra-audio-wm8903"; | |
46 | nvidia,model = "Avionic Design TEC"; | |
47 | ||
48 | nvidia,audio-routing = | |
49 | "Headphone Jack", "HPOUTR", | |
50 | "Headphone Jack", "HPOUTL", | |
51 | "Int Spk", "ROP", | |
52 | "Int Spk", "RON", | |
53 | "Int Spk", "LOP", | |
54 | "Int Spk", "LON", | |
55 | "Mic Jack", "MICBIAS", | |
56 | "IN1L", "Mic Jack"; | |
57 | ||
58 | nvidia,i2s-controller = <&tegra_i2s1>; | |
59 | nvidia,audio-codec = <&wm8903>; | |
60 | ||
3325f1bc SW |
61 | nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; |
62 | nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) | |
63 | GPIO_ACTIVE_HIGH>; | |
f9cd2b3b | 64 | |
885a8cfa HD |
65 | clocks = <&tegra_car TEGRA20_CLK_PLL_A>, |
66 | <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, | |
67 | <&tegra_car TEGRA20_CLK_CDEV1>; | |
f9cd2b3b | 68 | clock-names = "pll_a", "pll_a_out0", "mclk"; |
175f16fa TR |
69 | }; |
70 | }; |