[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / tegra20-ventana.dts

// SPDX-License-Identifier: GPL-2.0
/dts-v1/;

#include <dt-bindings/input/input.h>
#include "tegra20.dtsi"

/ {
	model = "NVIDIA Tegra20 Ventana evaluation board";
	compatible = "nvidia,ventana", "nvidia,tegra20";

	aliases {
		rtc0 = "/i2c@7000d000/tps6586x@34";
		rtc1 = "/rtc@7000e000";
		serial0 = &uartd;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory {
		reg = <0x00000000 0x40000000>;
	};

	host1x@50000000 {
		dc@54200000 {
			rgb {
				status = "okay";

				nvidia,panel = <&panel>;
			};
		};

		hdmi@54280000 {
			status = "okay";

			vdd-supply = <&hdmi_vdd_reg>;
			pll-supply = <&hdmi_pll_reg>;

			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
				GPIO_ACTIVE_HIGH>;
		};
	};

	pinmux@70000014 {
		pinctrl-names = "default";
		pinctrl-0 = <&state_default>;

		state_default: pinmux {
			ata {
				nvidia,pins = "ata";
				nvidia,function = "ide";
			};
			atb {
				nvidia,pins = "atb", "gma", "gme";
				nvidia,function = "sdio4";
			};
			atc {
				nvidia,pins = "atc";
				nvidia,function = "nand";
			};
			atd {
				nvidia,pins = "atd", "ate", "gmb", "spia",
					"spib", "spic";
				nvidia,function = "gmi";
			};
			cdev1 {
				nvidia,pins = "cdev1";
				nvidia,function = "plla_out";
			};
			cdev2 {
				nvidia,pins = "cdev2";
				nvidia,function = "pllp_out4";
			};
			crtp {
				nvidia,pins = "crtp", "lm1";
				nvidia,function = "crt";
			};
			csus {
				nvidia,pins = "csus";
				nvidia,function = "vi_sensor_clk";
			};
			dap1 {
				nvidia,pins = "dap1";
				nvidia,function = "dap1";
			};
			dap2 {
				nvidia,pins = "dap2";
				nvidia,function = "dap2";
			};
			dap3 {
				nvidia,pins = "dap3";
				nvidia,function = "dap3";
			};
			dap4 {
				nvidia,pins = "dap4";
				nvidia,function = "dap4";
			};
			dta {
				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
				nvidia,function = "vi";
			};
			dtf {
				nvidia,pins = "dtf";
				nvidia,function = "i2c3";
			};
			gmc {
				nvidia,pins = "gmc";
				nvidia,function = "uartd";
			};
			gmd {
				nvidia,pins = "gmd";
				nvidia,function = "sflash";
			};
			gpu {
				nvidia,pins = "gpu";
				nvidia,function = "pwm";
			};
			gpu7 {
				nvidia,pins = "gpu7";
				nvidia,function = "rtck";
			};
			gpv {
				nvidia,pins = "gpv", "slxa", "slxk";
				nvidia,function = "pcie";
			};
			hdint {
				nvidia,pins = "hdint";
				nvidia,function = "hdmi";
			};
			i2cp {
				nvidia,pins = "i2cp";
				nvidia,function = "i2cp";
			};
			irrx {
				nvidia,pins = "irrx", "irtx";
				nvidia,function = "uartb";
			};
			kbca {
				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
					"kbce", "kbcf";
				nvidia,function = "kbc";
			};
			lcsn {
				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
					"lsdi", "lvp0";
				nvidia,function = "rsvd4";
			};
			ld0 {
				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
					"ld5", "ld6", "ld7", "ld8", "ld9",
					"ld10", "ld11", "ld12", "ld13", "ld14",
					"ld15", "ld16", "ld17", "ldi", "lhp0",
					"lhp1", "lhp2", "lhs", "lpp", "lpw0",
					"lpw2", "lsc0", "lsc1", "lsck", "lsda",
					"lspi", "lvp1", "lvs";
				nvidia,function = "displaya";
			};
			owc {
				nvidia,pins = "owc", "spdi", "spdo", "uac";
				nvidia,function = "rsvd2";
			};
			pmc {
				nvidia,pins = "pmc";
				nvidia,function = "pwr_on";
			};
			rm {
				nvidia,pins = "rm";
				nvidia,function = "i2c1";
			};
			sdb {
				nvidia,pins = "sdb", "sdc", "sdd", "slxc";
				nvidia,function = "sdio3";
			};
			sdio1 {
				nvidia,pins = "sdio1";
				nvidia,function = "sdio1";
			};
			slxd {
				nvidia,pins = "slxd";
				nvidia,function = "spdif";
			};
			spid {
				nvidia,pins = "spid", "spie", "spif";
				nvidia,function = "spi1";
			};
			spig {
				nvidia,pins = "spig", "spih";
				nvidia,function = "spi2_alt";
			};
			uaa {
				nvidia,pins = "uaa", "uab", "uda";
				nvidia,function = "ulpi";
			};
			uad {
				nvidia,pins = "uad";
				nvidia,function = "irda";
			};
			uca {
				nvidia,pins = "uca", "ucb";
				nvidia,function = "uartc";
			};
			conf_ata {
				nvidia,pins = "ata", "atb", "atc", "atd",
					"cdev1", "cdev2", "dap1", "dap2",
					"dap4", "ddc", "dtf", "gma", "gmc",
					"gme", "gpu", "gpu7", "i2cp", "irrx",
					"irtx", "pta", "rm", "sdc", "sdd",
					"slxc", "slxd", "slxk", "spdi", "spdo",
					"uac", "uad", "uca", "ucb", "uda";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_ate {
				nvidia,pins = "ate", "csus", "dap3", "gmd",
					"gpv", "owc", "spia", "spib", "spic",
					"spid", "spie", "spig";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_ck32 {
				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			};
			conf_crtp {
				nvidia,pins = "crtp", "gmb", "slxa", "spih";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_dta {
				nvidia,pins = "dta", "dtb", "dtc", "dtd";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_dte {
				nvidia,pins = "dte", "spif";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_hdint {
				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
					"lpw1", "lsck", "lsda", "lsdi", "lvp0";
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_kbca {
				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
					"kbce", "kbcf", "sdio1", "uaa", "uab";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_lc {
				nvidia,pins = "lc", "ls";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
			};
			conf_ld0 {
				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
					"ld5", "ld6", "ld7", "ld8", "ld9",
					"ld10", "ld11", "ld12", "ld13", "ld14",
					"ld15", "ld16", "ld17", "ldi", "lhp0",
					"lhp1", "lhp2", "lhs", "lm0", "lpp",
					"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
					"lvp1", "lvs", "pmc", "sdb";
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_ld17_0 {
				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
					"ld23_22";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
			};
			drive_sdio1 {
				nvidia,pins = "drive_sdio1";
				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
				nvidia,pull-down-strength = <31>;
				nvidia,pull-up-strength = <31>;
				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
			};
		};

		state_i2cmux_ddc: pinmux_i2cmux_ddc {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "i2c2";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "rsvd4";
			};
		};

		state_i2cmux_pta: pinmux_i2cmux_pta {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "rsvd4";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "i2c2";
			};
		};

		state_i2cmux_idle: pinmux_i2cmux_idle {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "rsvd4";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "rsvd4";
			};
		};
	};

	i2s@70002800 {
		status = "okay";
	};

	serial@70006300 {
		status = "okay";
	};

	pwm: pwm@7000a000 {
		status = "okay";
	};

	i2c@7000c000 {
		status = "okay";
		clock-frequency = <400000>;

		wm8903: wm8903@1a {
			compatible = "wlf,wm8903";
			reg = <0x1a>;
			interrupt-parent = <&gpio>;
			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;

			gpio-controller;
			#gpio-cells = <2>;

			micdet-cfg = <0>;
			micdet-delay = <100>;
			gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
		};

		/* ALS and proximity sensor */
		isl29018@44 {
			compatible = "isil,isl29018";
			reg = <0x44>;
			interrupt-parent = <&gpio>;
			interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
		};
	};

	i2c@7000c400 {
		status = "okay";
		clock-frequency = <100000>;
	};

	i2cmux {
		compatible = "i2c-mux-pinctrl";
		#address-cells = <1>;
		#size-cells = <0>;

		i2c-parent = <&{/i2c@7000c400}>;

		pinctrl-names = "ddc", "pta", "idle";
		pinctrl-0 = <&state_i2cmux_ddc>;
		pinctrl-1 = <&state_i2cmux_pta>;
		pinctrl-2 = <&state_i2cmux_idle>;

		hdmi_ddc: i2c@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		lvds_ddc: i2c@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};

	i2c@7000c500 {
		status = "okay";
		clock-frequency = <400000>;
	};

	i2c@7000d000 {
		status = "okay";
		clock-frequency = <400000>;

		pmic: tps6586x@34 {
			compatible = "ti,tps6586x";
			reg = <0x34>;
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;

			ti,system-power-controller;

			#gpio-cells = <2>;
			gpio-controller;

			sys-supply = <&vdd_5v0_reg>;
			vin-sm0-supply = <&sys_reg>;
			vin-sm1-supply = <&sys_reg>;
			vin-sm2-supply = <&sys_reg>;
			vinldo01-supply = <&sm2_reg>;
			vinldo23-supply = <&sm2_reg>;
			vinldo4-supply = <&sm2_reg>;
			vinldo678-supply = <&sm2_reg>;
			vinldo9-supply = <&sm2_reg>;

			regulators {
				sys_reg: sys {
					regulator-name = "vdd_sys";
					regulator-always-on;
				};

				sm0 {
					regulator-name = "vdd_sm0,vdd_core";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
					regulator-always-on;
				};

				sm1 {
					regulator-name = "vdd_sm1,vdd_cpu";
					regulator-min-microvolt = <1000000>;
					regulator-max-microvolt = <1000000>;
					regulator-always-on;
				};

				sm2_reg: sm2 {
					regulator-name = "vdd_sm2,vin_ldo*";
					regulator-min-microvolt = <3700000>;
					regulator-max-microvolt = <3700000>;
					regulator-always-on;
				};

				/* LDO0 is not connected to anything */

				ldo1 {
					regulator-name = "vdd_ldo1,avdd_pll*";
					regulator-min-microvolt = <1100000>;
					regulator-max-microvolt = <1100000>;
					regulator-always-on;
				};

				ldo2 {
					regulator-name = "vdd_ldo2,vdd_rtc";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
				};

				ldo3 {
					regulator-name = "vdd_ldo3,avdd_usb*";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};

				ldo4 {
					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
				};

				ldo5 {
					regulator-name = "vdd_ldo5,vcore_mmc";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
					regulator-always-on;
				};

				ldo6 {
					regulator-name = "vdd_ldo6,avdd_vdac";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				hdmi_vdd_reg: ldo7 {
					regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
				};

				hdmi_pll_reg: ldo8 {
					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				ldo9 {
					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
					regulator-always-on;
				};

				ldo_rtc {
					regulator-name = "vdd_rtc_out,vdd_cell";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};
			};
		};

		temperature-sensor@4c {
			compatible = "onnn,nct1008";
			reg = <0x4c>;
		};
	};

	pmc@7000e400 {
		nvidia,invert-interrupt;
		nvidia,suspend-mode = <1>;
		nvidia,cpu-pwr-good-time = <2000>;
		nvidia,cpu-pwr-off-time = <100>;
		nvidia,core-pwr-good-time = <3845 3845>;
		nvidia,core-pwr-off-time = <458>;
		nvidia,sys-clock-req-active-high;
	};

	usb@c5000000 {
		status = "okay";
	};

	usb-phy@c5000000 {
		status = "okay";
	};

	usb@c5004000 {
		status = "okay";
		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
			GPIO_ACTIVE_LOW>;
	};

	usb-phy@c5004000 {
		status = "okay";
		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
			GPIO_ACTIVE_LOW>;
	};

	usb@c5008000 {
		status = "okay";
	};

	usb-phy@c5008000 {
		status = "okay";
	};

	sdhci@c8000000 {
		status = "okay";
		power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
		bus-width = <4>;
		keep-power-in-suspend;
	};

	sdhci@c8000400 {
		status = "okay";
		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
		bus-width = <4>;
	};

	sdhci@c8000600 {
		status = "okay";
		bus-width = <8>;
		non-removable;
	};

	backlight: backlight {
		compatible = "pwm-backlight";

		enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
		power-supply = <&vdd_bl_reg>;
		pwms = <&pwm 2 5000000>;

		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <6>;
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock@0 {
			compatible = "fixed-clock";
			reg = <0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		power {
			label = "Power";
			gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
			linux,code = <KEY_POWER>;
			wakeup-source;
		};
	};

	panel: panel {
		compatible = "chunghwa,claa101wa01a", "simple-panel";

		power-supply = <&vdd_pnl_reg>;
		enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;

		backlight = <&backlight>;
		ddc-i2c-bus = <&lvds_ddc>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		vdd_5v0_reg: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "vdd_5v0";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			regulator-always-on;
		};

		regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "vdd_1v5";
			regulator-min-microvolt = <1500000>;
			regulator-max-microvolt = <1500000>;
			gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
		};

		regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "vdd_1v2";
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <1200000>;
			gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		vdd_pnl_reg: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "vdd_pnl";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		vdd_bl_reg: regulator@4 {
			compatible = "regulator-fixed";
			reg = <4>;
			regulator-name = "vdd_bl";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};
	};

	sound {
		compatible = "nvidia,tegra-audio-wm8903-ventana",
			     "nvidia,tegra-audio-wm8903";
		nvidia,model = "NVIDIA Tegra Ventana";

		nvidia,audio-routing =
			"Headphone Jack", "HPOUTR",
			"Headphone Jack", "HPOUTL",
			"Int Spk", "ROP",
			"Int Spk", "RON",
			"Int Spk", "LOP",
			"Int Spk", "LON",
			"Mic Jack", "MICBIAS",
			"IN1L", "Mic Jack";

		nvidia,i2s-controller = <&tegra_i2s1>;
		nvidia,audio-codec = <&wm8903>;

		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
		nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
			GPIO_ACTIVE_HIGH>;
		nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
			GPIO_ACTIVE_HIGH>;

		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
			 <&tegra_car TEGRA20_CLK_CDEV1>;
		clock-names = "pll_a", "pll_a_out0", "mclk";
	};
};
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
add29e61 PDS	2	/dts-v1/;
add29e61 PDS	3
6bccbd5e	4	#include <dt-bindings/input/input.h>
1bd0bd49	5	#include "tegra20.dtsi"
add29e61 PDS	6
add29e61 PDS	7	/ {
8fef5dff	8	model = "NVIDIA Tegra20 Ventana evaluation board";
add29e61 PDS	9	compatible = "nvidia,ventana", "nvidia,tegra20";
add29e61 PDS	10
553c0a20 SW	11	aliases {
	12	rtc0 = "/i2c@7000d000/tps6586x@34";
	13	rtc1 = "/rtc@7000e000";
c4574aa0	14	serial0 = &uartd;
553c0a20 SW	15	};
553c0a20 SW	16
f5bbb327 JH	17	chosen {
	18	stdout-path = "serial0:115200n8";
	19	};
	20
add29e61	21	memory {
95decf84	22	reg = <0x00000000 0x40000000>;
add29e61 PDS	23	};
add29e61 PDS	24
58ecb23f	25	host1x@50000000 {
1771a254 SW	26	dc@54200000 {
	27	rgb {
	28	status = "okay";
	29
	30	nvidia,panel = <&panel>;
	31	};
	32	};
	33
58ecb23f	34	hdmi@54280000 {
97d5520f SW	35	status = "okay";
	36
	37	vdd-supply = <&hdmi_vdd_reg>;
	38	pll-supply = <&hdmi_pll_reg>;
	39
	40	nvidia,ddc-i2c-bus = <&hdmi_ddc>;
3325f1bc SW	41	nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
3325f1bc SW	42	GPIO_ACTIVE_HIGH>;
97d5520f SW	43	};
	44	};
	45
58ecb23f	46	pinmux@70000014 {
ecc295bb SW	47	pinctrl-names = "default";
	48	pinctrl-0 = <&state_default>;
	49
	50	state_default: pinmux {
	51	ata {
	52	nvidia,pins = "ata";
	53	nvidia,function = "ide";
	54	};
	55	atb {
	56	nvidia,pins = "atb", "gma", "gme";
	57	nvidia,function = "sdio4";
	58	};
	59	atc {
	60	nvidia,pins = "atc";
	61	nvidia,function = "nand";
	62	};
	63	atd {
	64	nvidia,pins = "atd", "ate", "gmb", "spia",
	65	"spib", "spic";
	66	nvidia,function = "gmi";
	67	};
	68	cdev1 {
	69	nvidia,pins = "cdev1";
	70	nvidia,function = "plla_out";
	71	};
	72	cdev2 {
	73	nvidia,pins = "cdev2";
	74	nvidia,function = "pllp_out4";
	75	};
	76	crtp {
	77	nvidia,pins = "crtp", "lm1";
	78	nvidia,function = "crt";
	79	};
	80	csus {
	81	nvidia,pins = "csus";
	82	nvidia,function = "vi_sensor_clk";
	83	};
	84	dap1 {
	85	nvidia,pins = "dap1";
	86	nvidia,function = "dap1";
	87	};
	88	dap2 {
	89	nvidia,pins = "dap2";
	90	nvidia,function = "dap2";
	91	};
	92	dap3 {
	93	nvidia,pins = "dap3";
	94	nvidia,function = "dap3";
	95	};
	96	dap4 {
	97	nvidia,pins = "dap4";
	98	nvidia,function = "dap4";
	99	};
ecc295bb SW	100	dta {
	101	nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
	102	nvidia,function = "vi";
	103	};
	104	dtf {
	105	nvidia,pins = "dtf";
	106	nvidia,function = "i2c3";
	107	};
	108	gmc {
	109	nvidia,pins = "gmc";
	110	nvidia,function = "uartd";
	111	};
	112	gmd {
	113	nvidia,pins = "gmd";
	114	nvidia,function = "sflash";
	115	};
	116	gpu {
	117	nvidia,pins = "gpu";
	118	nvidia,function = "pwm";
	119	};
	120	gpu7 {
	121	nvidia,pins = "gpu7";
	122	nvidia,function = "rtck";
	123	};
	124	gpv {
	125	nvidia,pins = "gpv", "slxa", "slxk";
	126	nvidia,function = "pcie";
	127	};
	128	hdint {
cf633464	129	nvidia,pins = "hdint";
ecc295bb SW	130	nvidia,function = "hdmi";
	131	};
	132	i2cp {
	133	nvidia,pins = "i2cp";
	134	nvidia,function = "i2cp";
	135	};
	136	irrx {
	137	nvidia,pins = "irrx", "irtx";
	138	nvidia,function = "uartb";
	139	};
	140	kbca {
	141	nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
	142	"kbce", "kbcf";
	143	nvidia,function = "kbc";
	144	};
	145	lcsn {
	146	nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
	147	"lsdi", "lvp0";
	148	nvidia,function = "rsvd4";
	149	};
	150	ld0 {
	151	nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
	152	"ld5", "ld6", "ld7", "ld8", "ld9",
	153	"ld10", "ld11", "ld12", "ld13", "ld14",
	154	"ld15", "ld16", "ld17", "ldi", "lhp0",
	155	"lhp1", "lhp2", "lhs", "lpp", "lpw0",
	156	"lpw2", "lsc0", "lsc1", "lsck", "lsda",
	157	"lspi", "lvp1", "lvs";
	158	nvidia,function = "displaya";
	159	};
cf633464 MZ	160	owc {
	161	nvidia,pins = "owc", "spdi", "spdo", "uac";
	162	nvidia,function = "rsvd2";
	163	};
ecc295bb SW	164	pmc {
	165	nvidia,pins = "pmc";
	166	nvidia,function = "pwr_on";
	167	};
	168	rm {
	169	nvidia,pins = "rm";
	170	nvidia,function = "i2c1";
	171	};
	172	sdb {
	173	nvidia,pins = "sdb", "sdc", "sdd", "slxc";
	174	nvidia,function = "sdio3";
	175	};
	176	sdio1 {
	177	nvidia,pins = "sdio1";
	178	nvidia,function = "sdio1";
	179	};
	180	slxd {
	181	nvidia,pins = "slxd";
	182	nvidia,function = "spdif";
	183	};
	184	spid {
	185	nvidia,pins = "spid", "spie", "spif";
	186	nvidia,function = "spi1";
	187	};
	188	spig {
	189	nvidia,pins = "spig", "spih";
	190	nvidia,function = "spi2_alt";
	191	};
	192	uaa {
	193	nvidia,pins = "uaa", "uab", "uda";
	194	nvidia,function = "ulpi";
	195	};
	196	uad {
	197	nvidia,pins = "uad";
	198	nvidia,function = "irda";
	199	};
	200	uca {
	201	nvidia,pins = "uca", "ucb";
	202	nvidia,function = "uartc";
	203	};
	204	conf_ata {
	205	nvidia,pins = "ata", "atb", "atc", "atd",
	206	"cdev1", "cdev2", "dap1", "dap2",
	207	"dap4", "ddc", "dtf", "gma", "gmc",
	208	"gme", "gpu", "gpu7", "i2cp", "irrx",
	209	"irtx", "pta", "rm", "sdc", "sdd",
	210	"slxc", "slxd", "slxk", "spdi", "spdo",
	211	"uac", "uad", "uca", "ucb", "uda";
ba4104e7 LD	212	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	213	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	214	};
	215	conf_ate {
	216	nvidia,pins = "ate", "csus", "dap3", "gmd",
	217	"gpv", "owc", "spia", "spib", "spic",
	218	"spid", "spie", "spig";
ba4104e7 LD	219	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	220	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	221	};
	222	conf_ck32 {
	223	nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
	224	"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
ba4104e7	225	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ecc295bb SW	226	};
	227	conf_crtp {
	228	nvidia,pins = "crtp", "gmb", "slxa", "spih";
ba4104e7 LD	229	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ba4104e7 LD	230	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	231	};
	232	conf_dta {
	233	nvidia,pins = "dta", "dtb", "dtc", "dtd";
ba4104e7 LD	234	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ba4104e7 LD	235	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	236	};
	237	conf_dte {
	238	nvidia,pins = "dte", "spif";
ba4104e7 LD	239	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ba4104e7 LD	240	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	241	};
	242	conf_hdint {
	243	nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
	244	"lpw1", "lsck", "lsda", "lsdi", "lvp0";
ba4104e7	245	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	246	};
	247	conf_kbca {
	248	nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
	249	"kbce", "kbcf", "sdio1", "uaa", "uab";
ba4104e7 LD	250	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ba4104e7 LD	251	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	252	};
	253	conf_lc {
	254	nvidia,pins = "lc", "ls";
ba4104e7	255	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ecc295bb SW	256	};
	257	conf_ld0 {
	258	nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
	259	"ld5", "ld6", "ld7", "ld8", "ld9",
	260	"ld10", "ld11", "ld12", "ld13", "ld14",
	261	"ld15", "ld16", "ld17", "ldi", "lhp0",
	262	"lhp1", "lhp2", "lhs", "lm0", "lpp",
	263	"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
	264	"lvp1", "lvs", "pmc", "sdb";
ba4104e7	265	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	266	};
	267	conf_ld17_0 {
	268	nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
	269	"ld23_22";
ba4104e7	270	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ecc295bb	271	};
c729429e WN	272	drive_sdio1 {
c729429e WN	273	nvidia,pins = "drive_sdio1";
ba4104e7 LD	274	nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
	275	nvidia,schmitt = <TEGRA_PIN_ENABLE>;
	276	nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
c729429e WN	277	nvidia,pull-down-strength = <31>;
c729429e WN	278	nvidia,pull-up-strength = <31>;
ba4104e7 LD	279	nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
ba4104e7 LD	280	nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
c729429e	281	};
ecc295bb	282	};
cf633464 MZ	283
	284	state_i2cmux_ddc: pinmux_i2cmux_ddc {
	285	ddc {
	286	nvidia,pins = "ddc";
	287	nvidia,function = "i2c2";
	288	};
	289	pta {
	290	nvidia,pins = "pta";
	291	nvidia,function = "rsvd4";
	292	};
	293	};
	294
	295	state_i2cmux_pta: pinmux_i2cmux_pta {
	296	ddc {
	297	nvidia,pins = "ddc";
	298	nvidia,function = "rsvd4";
	299	};
	300	pta {
	301	nvidia,pins = "pta";
	302	nvidia,function = "i2c2";
	303	};
	304	};
	305
	306	state_i2cmux_idle: pinmux_i2cmux_idle {
	307	ddc {
	308	nvidia,pins = "ddc";
	309	nvidia,function = "rsvd4";
	310	};
	311	pta {
	312	nvidia,pins = "pta";
	313	nvidia,function = "rsvd4";
	314	};
	315	};
ecc295bb SW	316	};
ecc295bb SW	317
2a5fdc9a SW	318	i2s@70002800 {
2a5fdc9a SW	319	status = "okay";
c04abb3a SW	320	};
	321
	322	serial@70006300 {
2a5fdc9a	323	status = "okay";
c04abb3a SW	324	};
c04abb3a SW	325
1771a254 SW	326	pwm: pwm@7000a000 {
	327	status = "okay";
	328	};
	329
88950f3b	330	i2c@7000c000 {
2a5fdc9a	331	status = "okay";
88950f3b	332	clock-frequency = <400000>;
797acf70 SW	333
	334	wm8903: wm8903@1a {
	335	compatible = "wlf,wm8903";
	336	reg = <0x1a>;
	337	interrupt-parent = <&gpio>;
6cecf916	338	interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
797acf70 SW	339
	340	gpio-controller;
	341	#gpio-cells = <2>;
	342
	343	micdet-cfg = <0>;
	344	micdet-delay = <100>;
95decf84	345	gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
797acf70	346	};
b46b0b54 LD	347
	348	/* ALS and proximity sensor */
	349	isl29018@44 {
	350	compatible = "isil,isl29018";
	351	reg = <0x44>;
	352	interrupt-parent = <&gpio>;
6cecf916	353	interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
b46b0b54	354	};
88950f3b SW	355	};
	356
	357	i2c@7000c400 {
2a5fdc9a	358	status = "okay";
97d5520f	359	clock-frequency = <100000>;
88950f3b SW	360	};
88950f3b SW	361
cf633464 MZ	362	i2cmux {
	363	compatible = "i2c-mux-pinctrl";
	364	#address-cells = <1>;
	365	#size-cells = <0>;
	366
	367	i2c-parent = <&{/i2c@7000c400}>;
	368
	369	pinctrl-names = "ddc", "pta", "idle";
	370	pinctrl-0 = <&state_i2cmux_ddc>;
	371	pinctrl-1 = <&state_i2cmux_pta>;
	372	pinctrl-2 = <&state_i2cmux_idle>;
	373
97d5520f	374	hdmi_ddc: i2c@0 {
cf633464 MZ	375	reg = <0>;
	376	#address-cells = <1>;
	377	#size-cells = <0>;
	378	};
	379
1771a254	380	lvds_ddc: i2c@1 {
cf633464 MZ	381	reg = <1>;
	382	#address-cells = <1>;
	383	#size-cells = <0>;
	384	};
	385	};
	386
88950f3b	387	i2c@7000c500 {
2a5fdc9a	388	status = "okay";
88950f3b SW	389	clock-frequency = <400000>;
	390	};
	391
	392	i2c@7000d000 {
2a5fdc9a	393	status = "okay";
88950f3b	394	clock-frequency = <400000>;
017a0104 SW	395
	396	pmic: tps6586x@34 {
	397	compatible = "ti,tps6586x";
	398	reg = <0x34>;
6cecf916	399	interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
017a0104	400
44b12ef7 SW	401	ti,system-power-controller;
44b12ef7 SW	402
017a0104 SW	403	#gpio-cells = <2>;
	404	gpio-controller;
	405
	406	sys-supply = <&vdd_5v0_reg>;
	407	vin-sm0-supply = <&sys_reg>;
	408	vin-sm1-supply = <&sys_reg>;
	409	vin-sm2-supply = <&sys_reg>;
	410	vinldo01-supply = <&sm2_reg>;
	411	vinldo23-supply = <&sm2_reg>;
	412	vinldo4-supply = <&sm2_reg>;
	413	vinldo678-supply = <&sm2_reg>;
	414	vinldo9-supply = <&sm2_reg>;
	415
	416	regulators {
b9c665d7	417	sys_reg: sys {
017a0104 SW	418	regulator-name = "vdd_sys";
	419	regulator-always-on;
	420	};
	421
b9c665d7	422	sm0 {
017a0104 SW	423	regulator-name = "vdd_sm0,vdd_core";
	424	regulator-min-microvolt = <1200000>;
	425	regulator-max-microvolt = <1200000>;
	426	regulator-always-on;
	427	};
	428
b9c665d7	429	sm1 {
017a0104 SW	430	regulator-name = "vdd_sm1,vdd_cpu";
	431	regulator-min-microvolt = <1000000>;
	432	regulator-max-microvolt = <1000000>;
	433	regulator-always-on;
	434	};
	435
b9c665d7	436	sm2_reg: sm2 {
017a0104 SW	437	regulator-name = "vdd_sm2,vin_ldo*";
	438	regulator-min-microvolt = <3700000>;
	439	regulator-max-microvolt = <3700000>;
	440	regulator-always-on;
	441	};
	442
	443	/* LDO0 is not connected to anything */
	444
b9c665d7	445	ldo1 {
017a0104 SW	446	regulator-name = "vdd_ldo1,avdd_pll*";
	447	regulator-min-microvolt = <1100000>;
	448	regulator-max-microvolt = <1100000>;
	449	regulator-always-on;
	450	};
	451
b9c665d7	452	ldo2 {
017a0104 SW	453	regulator-name = "vdd_ldo2,vdd_rtc";
	454	regulator-min-microvolt = <1200000>;
	455	regulator-max-microvolt = <1200000>;
	456	};
	457
b9c665d7	458	ldo3 {
017a0104 SW	459	regulator-name = "vdd_ldo3,avdd_usb*";
	460	regulator-min-microvolt = <3300000>;
	461	regulator-max-microvolt = <3300000>;
	462	regulator-always-on;
	463	};
	464
b9c665d7	465	ldo4 {
017a0104 SW	466	regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
	467	regulator-min-microvolt = <1800000>;
	468	regulator-max-microvolt = <1800000>;
	469	regulator-always-on;
	470	};
	471
b9c665d7	472	ldo5 {
017a0104 SW	473	regulator-name = "vdd_ldo5,vcore_mmc";
	474	regulator-min-microvolt = <2850000>;
	475	regulator-max-microvolt = <2850000>;
	476	regulator-always-on;
	477	};
	478
b9c665d7	479	ldo6 {
017a0104 SW	480	regulator-name = "vdd_ldo6,avdd_vdac";
	481	regulator-min-microvolt = <1800000>;
	482	regulator-max-microvolt = <1800000>;
	483	};
	484
97d5520f	485	hdmi_vdd_reg: ldo7 {
017a0104 SW	486	regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
	487	regulator-min-microvolt = <3300000>;
	488	regulator-max-microvolt = <3300000>;
	489	};
	490
97d5520f	491	hdmi_pll_reg: ldo8 {
017a0104 SW	492	regulator-name = "vdd_ldo8,avdd_hdmi_pll";
	493	regulator-min-microvolt = <1800000>;
	494	regulator-max-microvolt = <1800000>;
	495	};
	496
b9c665d7	497	ldo9 {
017a0104 SW	498	regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
	499	regulator-min-microvolt = <2850000>;
	500	regulator-max-microvolt = <2850000>;
	501	regulator-always-on;
	502	};
	503
b9c665d7	504	ldo_rtc {
017a0104 SW	505	regulator-name = "vdd_rtc_out,vdd_cell";
	506	regulator-min-microvolt = <3300000>;
	507	regulator-max-microvolt = <3300000>;
	508	regulator-always-on;
	509	};
	510	};
	511	};
ee9f7260 TR	512
	513	temperature-sensor@4c {
	514	compatible = "onnn,nct1008";
	515	reg = <0x4c>;
	516	};
017a0104 SW	517	};
017a0104 SW	518
58ecb23f	519	pmc@7000e400 {
017a0104	520	nvidia,invert-interrupt;
47d2d63b	521	nvidia,suspend-mode = <1>;
a44a019d JL	522	nvidia,cpu-pwr-good-time = <2000>;
	523	nvidia,cpu-pwr-off-time = <100>;
	524	nvidia,core-pwr-good-time = <3845 3845>;
	525	nvidia,core-pwr-off-time = <458>;
	526	nvidia,sys-clock-req-active-high;
88950f3b SW	527	};
88950f3b SW	528
2a5fdc9a SW	529	usb@c5000000 {
2a5fdc9a SW	530	status = "okay";
c04abb3a SW	531	};
c04abb3a SW	532
4c94c8b5 VB	533	usb-phy@c5000000 {
	534	status = "okay";
	535	};
	536
2a5fdc9a SW	537	usb@c5004000 {
2a5fdc9a SW	538	status = "okay";
3325f1bc SW	539	nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
3325f1bc SW	540	GPIO_ACTIVE_LOW>;
797acf70 SW	541	};
797acf70 SW	542
9dffe3be	543	usb-phy@c5004000 {
4c94c8b5	544	status = "okay";
3325f1bc SW	545	nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
3325f1bc SW	546	GPIO_ACTIVE_LOW>;
c04abb3a SW	547	};
c04abb3a SW	548
9dffe3be VB	549	usb@c5008000 {
9dffe3be VB	550	status = "okay";
40e8b3a6 VB	551	};
40e8b3a6 VB	552
4c94c8b5 VB	553	usb-phy@c5008000 {
	554	status = "okay";
	555	};
	556
c729429e WN	557	sdhci@c8000000 {
c729429e WN	558	status = "okay";
3325f1bc	559	power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
c729429e	560	bus-width = <4>;
7a2617a6	561	keep-power-in-suspend;
c729429e WN	562	};
c729429e WN	563
c04abb3a	564	sdhci@c8000400 {
2a5fdc9a	565	status = "okay";
3325f1bc SW	566	cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
	567	wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
	568	power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
deb88cc3	569	bus-width = <4>;
c04abb3a SW	570	};
	571
	572	sdhci@c8000600 {
2a5fdc9a	573	status = "okay";
deb88cc3	574	bus-width = <8>;
7a2617a6	575	non-removable;
c04abb3a SW	576	};
c04abb3a SW	577
1771a254 SW	578	backlight: backlight {
	579	compatible = "pwm-backlight";
	580
	581	enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
	582	power-supply = <&vdd_bl_reg>;
	583	pwms = <&pwm 2 5000000>;
	584
	585	brightness-levels = <0 4 8 16 32 64 128 255>;
	586	default-brightness-level = <6>;
	587	};
	588
7021d122 JL	589	clocks {
	590	compatible = "simple-bus";
	591	#address-cells = <1>;
	592	#size-cells = <0>;
	593
58ecb23f	594	clk32k_in: clock@0 {
7021d122	595	compatible = "fixed-clock";
4ec2e601	596	reg = <0>;
7021d122 JL	597	#clock-cells = <0>;
	598	clock-frequency = <32768>;
	599	};
	600	};
	601
5741a256 JL	602	gpio-keys {
	603	compatible = "gpio-keys";
	604
	605	power {
	606	label = "Power";
3325f1bc	607	gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
6bccbd5e	608	linux,code = <KEY_POWER>;
d1c04d30	609	wakeup-source;
5741a256 JL	610	};
	611	};
	612
1771a254 SW	613	panel: panel {
	614	compatible = "chunghwa,claa101wa01a", "simple-panel";
	615
	616	power-supply = <&vdd_pnl_reg>;
	617	enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
	618
	619	backlight = <&backlight>;
	620	ddc-i2c-bus = <&lvds_ddc>;
	621	};
	622
017a0104 SW	623	regulators {
	624	compatible = "simple-bus";
	625	#address-cells = <1>;
	626	#size-cells = <0>;
	627
	628	vdd_5v0_reg: regulator@0 {
	629	compatible = "regulator-fixed";
	630	reg = <0>;
	631	regulator-name = "vdd_5v0";
	632	regulator-min-microvolt = <5000000>;
	633	regulator-max-microvolt = <5000000>;
	634	regulator-always-on;
	635	};
	636
	637	regulator@1 {
	638	compatible = "regulator-fixed";
	639	reg = <1>;
	640	regulator-name = "vdd_1v5";
	641	regulator-min-microvolt = <1500000>;
	642	regulator-max-microvolt = <1500000>;
3325f1bc	643	gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
017a0104 SW	644	};
	645
	646	regulator@2 {
	647	compatible = "regulator-fixed";
	648	reg = <2>;
	649	regulator-name = "vdd_1v2";
	650	regulator-min-microvolt = <1200000>;
	651	regulator-max-microvolt = <1200000>;
3325f1bc	652	gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
017a0104 SW	653	enable-active-high;
	654	};
	655
1771a254	656	vdd_pnl_reg: regulator@3 {
017a0104 SW	657	compatible = "regulator-fixed";
	658	reg = <3>;
	659	regulator-name = "vdd_pnl";
	660	regulator-min-microvolt = <2800000>;
	661	regulator-max-microvolt = <2800000>;
3325f1bc	662	gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
017a0104 SW	663	enable-active-high;
	664	};
	665
1771a254	666	vdd_bl_reg: regulator@4 {
017a0104 SW	667	compatible = "regulator-fixed";
	668	reg = <4>;
	669	regulator-name = "vdd_bl";
	670	regulator-min-microvolt = <2800000>;
	671	regulator-max-microvolt = <2800000>;
3325f1bc	672	gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
017a0104 SW	673	enable-active-high;
	674	};
	675	};
	676
797acf70 SW	677	sound {
	678	compatible = "nvidia,tegra-audio-wm8903-ventana",
	679	"nvidia,tegra-audio-wm8903";
	680	nvidia,model = "NVIDIA Tegra Ventana";
	681
	682	nvidia,audio-routing =
	683	"Headphone Jack", "HPOUTR",
	684	"Headphone Jack", "HPOUTL",
	685	"Int Spk", "ROP",
	686	"Int Spk", "RON",
	687	"Int Spk", "LOP",
	688	"Int Spk", "LON",
	689	"Mic Jack", "MICBIAS",
	690	"IN1L", "Mic Jack";
	691
	692	nvidia,i2s-controller = <&tegra_i2s1>;
	693	nvidia,audio-codec = <&wm8903>;
	694
3325f1bc SW	695	nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
	696	nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
	697	nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
	698	GPIO_ACTIVE_HIGH>;
	699	nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
	700	GPIO_ACTIVE_HIGH>;
f9cd2b3b	701
885a8cfa HD	702	clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
	703	<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
	704	<&tegra_car TEGRA20_CLK_CDEV1>;
f9cd2b3b	705	clock-names = "pll_a", "pll_a_out0", "mclk";
797acf70	706	};
add29e61	707	};