projects / mirror_ubuntu-jammy-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 8e267f3d GL |
1 | /include/ "skeleton.dtsi" |
| 2 | ||
| 3 | / { | |
| 4 | compatible = "nvidia,tegra20"; | |
| 5 | interrupt-parent = <&intc>; | |
| 6 | ||
| 7 | intc: interrupt-controller@50041000 { | |
| 0d4f7479 | 8 | compatible = "arm,cortex-a9-gic"; |
| 8e267f3d | 9 | interrupt-controller; |
| 0d4f7479 | 10 | #interrupt-cells = <3>; |
| 8e267f3d GL |
11 | reg = < 0x50041000 0x1000 >, |
| 12 | < 0x50040100 0x0100 >; | |
| 13 | }; | |
| 14 | ||
| 15 | i2c@7000c000 { | |
| 16 | #address-cells = <1>; | |
| 17 | #size-cells = <0>; | |
| 18 | compatible = "nvidia,tegra20-i2c"; | |
| 19 | reg = <0x7000C000 0x100>; | |
| 0d4f7479 | 20 | interrupts = < 0 38 0x04 >; |
| 8e267f3d GL |
21 | }; |
| 22 | ||
| 23 | i2c@7000c400 { | |
| 24 | #address-cells = <1>; | |
| 25 | #size-cells = <0>; | |
| 26 | compatible = "nvidia,tegra20-i2c"; | |
| 27 | reg = <0x7000C400 0x100>; | |
| 0d4f7479 | 28 | interrupts = < 0 84 0x04 >; |
| 8e267f3d GL |
29 | }; |
| 30 | ||
| 31 | i2c@7000c500 { | |
| 32 | #address-cells = <1>; | |
| 33 | #size-cells = <0>; | |
| 34 | compatible = "nvidia,tegra20-i2c"; | |
| 35 | reg = <0x7000C500 0x100>; | |
| 0d4f7479 | 36 | interrupts = < 0 92 0x04 >; |
| 8e267f3d GL |
37 | }; |
| 38 | ||
| 39 | i2c@7000d000 { | |
| 40 | #address-cells = <1>; | |
| 41 | #size-cells = <0>; | |
| 42 | compatible = "nvidia,tegra20-i2c"; | |
| 43 | reg = <0x7000D000 0x200>; | |
| 0d4f7479 | 44 | interrupts = < 0 53 0x04 >; |
| 8e267f3d GL |
45 | }; |
| 46 | ||
| 47 | i2s@70002800 { | |
| 8e267f3d GL |
48 | compatible = "nvidia,tegra20-i2s"; |
| 49 | reg = <0x70002800 0x200>; | |
| 0d4f7479 | 50 | interrupts = < 0 13 0x04 >; |
| 8e267f3d GL |
51 | dma-channel = < 2 >; |
| 52 | }; | |
| 53 | ||
| 54 | i2s@70002a00 { | |
| 8e267f3d GL |
55 | compatible = "nvidia,tegra20-i2s"; |
| 56 | reg = <0x70002a00 0x200>; | |
| 0d4f7479 | 57 | interrupts = < 0 3 0x04 >; |
| 8e267f3d GL |
58 | dma-channel = < 1 >; |
| 59 | }; | |
| 60 | ||
| 61 | das@70000c00 { | |
| 8e267f3d GL |
62 | compatible = "nvidia,tegra20-das"; |
| 63 | reg = <0x70000c00 0x80>; | |
| 64 | }; | |
| 65 | ||
| 66 | gpio: gpio@6000d000 { | |
| 67 | compatible = "nvidia,tegra20-gpio"; | |
| 68 | reg = < 0x6000d000 0x1000 >; | |
| 0d4f7479 | 69 | interrupts = < 0 32 0x04 |
| 70 | 0 33 0x04 | |
| 71 | 0 34 0x04 | |
| 72 | 0 35 0x04 | |
| 73 | 0 55 0x04 | |
| 74 | 0 87 0x04 | |
| 75 | 0 89 0x04 >; | |
| 8e267f3d GL |
76 | #gpio-cells = <2>; |
| 77 | gpio-controller; | |
| 78 | }; | |
| 79 | ||
| f62f548c SW |
80 | pinmux: pinmux@70000000 { |
| 81 | compatible = "nvidia,tegra20-pinmux"; | |
| 82 | reg = < 0x70000014 0x10 /* Tri-state registers */ | |
| 83 | 0x70000080 0x20 /* Mux registers */ | |
| 84 | 0x700000a0 0x14 /* Pull-up/down registers */ | |
| 85 | 0x70000868 0xa8 >; /* Pad control registers */ | |
| 86 | }; | |
| 87 | ||
| 8e267f3d GL |
88 | serial@70006000 { |
| 89 | compatible = "nvidia,tegra20-uart"; | |
| 90 | reg = <0x70006000 0x40>; | |
| 91 | reg-shift = <2>; | |
| 0d4f7479 | 92 | interrupts = < 0 36 0x04 >; |
| 8e267f3d GL |
93 | }; |
| 94 | ||
| 95 | serial@70006040 { | |
| 96 | compatible = "nvidia,tegra20-uart"; | |
| 97 | reg = <0x70006040 0x40>; | |
| 98 | reg-shift = <2>; | |
| 0d4f7479 | 99 | interrupts = < 0 37 0x04 >; |
| 8e267f3d GL |
100 | }; |
| 101 | ||
| 102 | serial@70006200 { | |
| 103 | compatible = "nvidia,tegra20-uart"; | |
| 104 | reg = <0x70006200 0x100>; | |
| 105 | reg-shift = <2>; | |
| 0d4f7479 | 106 | interrupts = < 0 46 0x04 >; |
| 8e267f3d GL |
107 | }; |
| 108 | ||
| 109 | serial@70006300 { | |
| 110 | compatible = "nvidia,tegra20-uart"; | |
| 111 | reg = <0x70006300 0x100>; | |
| 112 | reg-shift = <2>; | |
| 0d4f7479 | 113 | interrupts = < 0 90 0x04 >; |
| 8e267f3d GL |
114 | }; |
| 115 | ||
| 116 | serial@70006400 { | |
| 117 | compatible = "nvidia,tegra20-uart"; | |
| 118 | reg = <0x70006400 0x100>; | |
| 119 | reg-shift = <2>; | |
| 0d4f7479 | 120 | interrupts = < 0 91 0x04 >; |
| 8e267f3d GL |
121 | }; |
| 122 | ||
| 123 | sdhci@c8000000 { | |
| 124 | compatible = "nvidia,tegra20-sdhci"; | |
| 125 | reg = <0xc8000000 0x200>; | |
| 0d4f7479 | 126 | interrupts = < 0 14 0x04 >; |
| 8e267f3d GL |
127 | }; |
| 128 | ||
| 129 | sdhci@c8000200 { | |
| 130 | compatible = "nvidia,tegra20-sdhci"; | |
| 131 | reg = <0xc8000200 0x200>; | |
| 0d4f7479 | 132 | interrupts = < 0 15 0x04 >; |
| 8e267f3d GL |
133 | }; |
| 134 | ||
| 135 | sdhci@c8000400 { | |
| 136 | compatible = "nvidia,tegra20-sdhci"; | |
| 137 | reg = <0xc8000400 0x200>; | |
| 0d4f7479 | 138 | interrupts = < 0 19 0x04 >; |
| 8e267f3d GL |
139 | }; |
| 140 | ||
| 141 | sdhci@c8000600 { | |
| 142 | compatible = "nvidia,tegra20-sdhci"; | |
| 143 | reg = <0xc8000600 0x200>; | |
| 0d4f7479 | 144 | interrupts = < 0 31 0x04 >; |
| 8e267f3d | 145 | }; |
| c27317c0 OJ |
146 | |
| 147 | usb@c5000000 { | |
| 148 | compatible = "nvidia,tegra20-ehci", "usb-ehci"; | |
| 149 | reg = <0xc5000000 0x4000>; | |
| 0d4f7479 | 150 | interrupts = < 0 20 0x04 >; |
| c27317c0 OJ |
151 | phy_type = "utmi"; |
| 152 | }; | |
| 153 | ||
| 154 | usb@c5004000 { | |
| 155 | compatible = "nvidia,tegra20-ehci", "usb-ehci"; | |
| 156 | reg = <0xc5004000 0x4000>; | |
| 0d4f7479 | 157 | interrupts = < 0 21 0x04 >; |
| c27317c0 OJ |
158 | phy_type = "ulpi"; |
| 159 | }; | |
| 160 | ||
| 161 | usb@c5008000 { | |
| 162 | compatible = "nvidia,tegra20-ehci", "usb-ehci"; | |
| 163 | reg = <0xc5008000 0x4000>; | |
| 0d4f7479 | 164 | interrupts = < 0 97 0x04 >; |
| c27317c0 OJ |
165 | phy_type = "utmi"; |
| 166 | }; | |
| 8e267f3d GL |
167 | }; |
| 168 |