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ARM: tegra: ventana: Add NCT1008 temperature sensor
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CommitLineData
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1/include/ "skeleton.dtsi"
2
3/ {
4 compatible = "nvidia,tegra20";
5 interrupt-parent = <&intc>;
6
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7 cache-controller@50043000 {
8 compatible = "arm,pl310-cache";
9 reg = <0x50043000 0x1000>;
10 arm,data-latency = <5 5 2>;
11 arm,tag-latency = <4 4 2>;
12 cache-unified;
13 cache-level = <2>;
14 };
15
f9eb26a4 16 intc: interrupt-controller {
0d4f7479 17 compatible = "arm,cortex-a9-gic";
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18 reg = <0x50041000 0x1000
19 0x50040100 0x0100>;
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20 interrupt-controller;
21 #interrupt-cells = <3>;
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22 };
23
f9eb26a4 24 apbdma: dma {
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25 compatible = "nvidia,tegra20-apbdma";
26 reg = <0x6000a000 0x1200>;
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27 interrupts = <0 104 0x04
28 0 105 0x04
29 0 106 0x04
30 0 107 0x04
31 0 108 0x04
32 0 109 0x04
33 0 110 0x04
34 0 111 0x04
35 0 112 0x04
36 0 113 0x04
37 0 114 0x04
38 0 115 0x04
39 0 116 0x04
40 0 117 0x04
41 0 118 0x04
42 0 119 0x04>;
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43 };
44
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45 ahb {
46 compatible = "nvidia,tegra20-ahb";
47 reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */
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48 };
49
f9eb26a4 50 gpio: gpio {
8e267f3d 51 compatible = "nvidia,tegra20-gpio";
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52 reg = <0x6000d000 0x1000>;
53 interrupts = <0 32 0x04
54 0 33 0x04
55 0 34 0x04
56 0 35 0x04
57 0 55 0x04
58 0 87 0x04
59 0 89 0x04>;
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60 #gpio-cells = <2>;
61 gpio-controller;
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62 #interrupt-cells = <2>;
63 interrupt-controller;
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64 };
65
f9eb26a4 66 pinmux: pinmux {
f62f548c 67 compatible = "nvidia,tegra20-pinmux";
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68 reg = <0x70000014 0x10 /* Tri-state registers */
69 0x70000080 0x20 /* Mux registers */
70 0x700000a0 0x14 /* Pull-up/down registers */
71 0x70000868 0xa8>; /* Pad control registers */
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72 };
73
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74 das {
75 compatible = "nvidia,tegra20-das";
76 reg = <0x70000c00 0x80>;
77 };
78
79 tegra_i2s1: i2s@70002800 {
80 compatible = "nvidia,tegra20-i2s";
81 reg = <0x70002800 0x200>;
82 interrupts = <0 13 0x04>;
83 nvidia,dma-request-selector = <&apbdma 2>;
223ef78d 84 status = "disabled";
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85 };
86
87 tegra_i2s2: i2s@70002a00 {
88 compatible = "nvidia,tegra20-i2s";
89 reg = <0x70002a00 0x200>;
90 interrupts = <0 3 0x04>;
91 nvidia,dma-request-selector = <&apbdma 1>;
223ef78d 92 status = "disabled";
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93 };
94
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95 serial@70006000 {
96 compatible = "nvidia,tegra20-uart";
97 reg = <0x70006000 0x40>;
98 reg-shift = <2>;
95decf84 99 interrupts = <0 36 0x04>;
223ef78d 100 status = "disabled";
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101 };
102
103 serial@70006040 {
104 compatible = "nvidia,tegra20-uart";
105 reg = <0x70006040 0x40>;
106 reg-shift = <2>;
95decf84 107 interrupts = <0 37 0x04>;
223ef78d 108 status = "disabled";
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109 };
110
111 serial@70006200 {
112 compatible = "nvidia,tegra20-uart";
113 reg = <0x70006200 0x100>;
114 reg-shift = <2>;
95decf84 115 interrupts = <0 46 0x04>;
223ef78d 116 status = "disabled";
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117 };
118
119 serial@70006300 {
120 compatible = "nvidia,tegra20-uart";
121 reg = <0x70006300 0x100>;
122 reg-shift = <2>;
95decf84 123 interrupts = <0 90 0x04>;
223ef78d 124 status = "disabled";
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125 };
126
127 serial@70006400 {
128 compatible = "nvidia,tegra20-uart";
129 reg = <0x70006400 0x100>;
130 reg-shift = <2>;
95decf84 131 interrupts = <0 91 0x04>;
223ef78d 132 status = "disabled";
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133 };
134
2b8b15da 135 pwm: pwm {
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136 compatible = "nvidia,tegra20-pwm";
137 reg = <0x7000a000 0x100>;
138 #pwm-cells = <2>;
139 };
140
c04abb3a 141 i2c@7000c000 {
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142 compatible = "nvidia,tegra20-i2c";
143 reg = <0x7000c000 0x100>;
144 interrupts = <0 38 0x04>;
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145 #address-cells = <1>;
146 #size-cells = <0>;
223ef78d 147 status = "disabled";
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148 };
149
c04abb3a 150 i2c@7000c400 {
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151 compatible = "nvidia,tegra20-i2c";
152 reg = <0x7000c400 0x100>;
153 interrupts = <0 84 0x04>;
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154 #address-cells = <1>;
155 #size-cells = <0>;
223ef78d 156 status = "disabled";
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157 };
158
c04abb3a 159 i2c@7000c500 {
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160 compatible = "nvidia,tegra20-i2c";
161 reg = <0x7000c500 0x100>;
162 interrupts = <0 92 0x04>;
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163 #address-cells = <1>;
164 #size-cells = <0>;
223ef78d 165 status = "disabled";
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166 };
167
c04abb3a 168 i2c@7000d000 {
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169 compatible = "nvidia,tegra20-i2c-dvc";
170 reg = <0x7000d000 0x200>;
171 interrupts = <0 53 0x04>;
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172 #address-cells = <1>;
173 #size-cells = <0>;
223ef78d 174 status = "disabled";
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175 };
176
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177 spi@7000d400 {
178 compatible = "nvidia,tegra20-slink";
179 reg = <0x7000d400 0x200>;
180 interrupts = <0 59 0x04>;
181 nvidia,dma-request-selector = <&apbdma 15>;
182 #address-cells = <1>;
183 #size-cells = <0>;
184 status = "disabled";
185 };
186
187 spi@7000d600 {
188 compatible = "nvidia,tegra20-slink";
189 reg = <0x7000d600 0x200>;
190 interrupts = <0 82 0x04>;
191 nvidia,dma-request-selector = <&apbdma 16>;
192 #address-cells = <1>;
193 #size-cells = <0>;
194 status = "disabled";
195 };
196
197 spi@7000d800 {
198 compatible = "nvidia,tegra20-slink";
199 reg = <0x7000d480 0x200>;
200 interrupts = <0 83 0x04>;
201 nvidia,dma-request-selector = <&apbdma 17>;
202 #address-cells = <1>;
203 #size-cells = <0>;
204 status = "disabled";
205 };
206
207 spi@7000da00 {
208 compatible = "nvidia,tegra20-slink";
209 reg = <0x7000da00 0x200>;
210 interrupts = <0 93 0x04>;
211 nvidia,dma-request-selector = <&apbdma 18>;
212 #address-cells = <1>;
213 #size-cells = <0>;
214 status = "disabled";
215 };
216
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217 pmc {
218 compatible = "nvidia,tegra20-pmc";
219 reg = <0x7000e400 0x400>;
220 };
221
bbfc33bd 222 memory-controller@7000f000 {
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223 compatible = "nvidia,tegra20-mc";
224 reg = <0x7000f000 0x024
225 0x7000f03c 0x3c4>;
226 interrupts = <0 77 0x04>;
227 };
228
229 gart {
230 compatible = "nvidia,tegra20-gart";
231 reg = <0x7000f024 0x00000018 /* controller registers */
232 0x58000000 0x02000000>; /* GART aperture */
233 };
234
bbfc33bd 235 memory-controller@7000f400 {
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236 compatible = "nvidia,tegra20-emc";
237 reg = <0x7000f400 0x200>;
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238 #address-cells = <1>;
239 #size-cells = <0>;
8e267f3d 240 };
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241
242 usb@c5000000 {
243 compatible = "nvidia,tegra20-ehci", "usb-ehci";
244 reg = <0xc5000000 0x4000>;
95decf84 245 interrupts = <0 20 0x04>;
c27317c0 246 phy_type = "utmi";
ba202f15 247 nvidia,has-legacy-mode;
223ef78d 248 status = "disabled";
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249 };
250
251 usb@c5004000 {
252 compatible = "nvidia,tegra20-ehci", "usb-ehci";
253 reg = <0xc5004000 0x4000>;
95decf84 254 interrupts = <0 21 0x04>;
c27317c0 255 phy_type = "ulpi";
223ef78d 256 status = "disabled";
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257 };
258
259 usb@c5008000 {
260 compatible = "nvidia,tegra20-ehci", "usb-ehci";
261 reg = <0xc5008000 0x4000>;
95decf84 262 interrupts = <0 97 0x04>;
c27317c0 263 phy_type = "utmi";
223ef78d 264 status = "disabled";
c27317c0 265 };
7868a9bc 266
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267 sdhci@c8000000 {
268 compatible = "nvidia,tegra20-sdhci";
269 reg = <0xc8000000 0x200>;
270 interrupts = <0 14 0x04>;
223ef78d 271 status = "disabled";
7868a9bc 272 };
4a82f2b3 273
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274 sdhci@c8000200 {
275 compatible = "nvidia,tegra20-sdhci";
276 reg = <0xc8000200 0x200>;
277 interrupts = <0 15 0x04>;
223ef78d 278 status = "disabled";
4a82f2b3 279 };
6a943e0e 280
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281 sdhci@c8000400 {
282 compatible = "nvidia,tegra20-sdhci";
283 reg = <0xc8000400 0x200>;
284 interrupts = <0 19 0x04>;
223ef78d 285 status = "disabled";
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286 };
287
288 sdhci@c8000600 {
289 compatible = "nvidia,tegra20-sdhci";
290 reg = <0xc8000600 0x200>;
291 interrupts = <0 31 0x04>;
223ef78d 292 status = "disabled";
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293 };
294
295 pmu {
296 compatible = "arm,cortex-a9-pmu";
297 interrupts = <0 56 0x04
298 0 57 0x04>;
6a943e0e 299 };
8e267f3d 300};