]>
Commit | Line | Data |
---|---|---|
d7df69fe BW |
1 | /dts-v1/; |
2 | ||
1bd0bd49 | 3 | #include "tegra30.dtsi" |
d7df69fe BW |
4 | |
5 | / { | |
6 | model = "NVIDIA Tegra30 Beaver evaluation board"; | |
7 | compatible = "nvidia,beaver", "nvidia,tegra30"; | |
8 | ||
553c0a20 SW |
9 | aliases { |
10 | rtc0 = "/i2c@7000d000/tps65911@2d"; | |
11 | rtc1 = "/rtc@7000e000"; | |
12 | }; | |
13 | ||
d7df69fe | 14 | memory { |
30022bb4 | 15 | reg = <0x80000000 0x7ff00000>; |
d7df69fe BW |
16 | }; |
17 | ||
58ecb23f | 18 | pcie-controller@00003000 { |
bb034cb5 | 19 | status = "okay"; |
cca8614d TR |
20 | |
21 | avdd-pexa-supply = <&ldo1_reg>; | |
22 | vdd-pexa-supply = <&ldo1_reg>; | |
23 | avdd-pexb-supply = <&ldo1_reg>; | |
24 | vdd-pexb-supply = <&ldo1_reg>; | |
25 | avdd-pex-pll-supply = <&ldo1_reg>; | |
26 | avdd-plle-supply = <&ldo1_reg>; | |
27 | vddio-pex-ctl-supply = <&sys_3v3_reg>; | |
28 | hvdd-pex-supply = <&sys_3v3_pexs_reg>; | |
29 | ||
bb034cb5 TR |
30 | pci@1,0 { |
31 | status = "okay"; | |
44fefab4 | 32 | nvidia,num-lanes = <2>; |
bb034cb5 TR |
33 | }; |
34 | ||
35 | pci@2,0 { | |
44fefab4 | 36 | nvidia,num-lanes = <2>; |
bb034cb5 TR |
37 | }; |
38 | ||
39 | pci@3,0 { | |
44fefab4 SW |
40 | status = "okay"; |
41 | nvidia,num-lanes = <2>; | |
bb034cb5 TR |
42 | }; |
43 | }; | |
44 | ||
58ecb23f SW |
45 | host1x@50000000 { |
46 | hdmi@54280000 { | |
9bd80b41 TR |
47 | status = "okay"; |
48 | ||
597eb8e1 | 49 | hdmi-supply = <&vdd_5v0_hdmi>; |
9bd80b41 TR |
50 | vdd-supply = <&sys_3v3_reg>; |
51 | pll-supply = <&vio_reg>; | |
52 | ||
53 | nvidia,hpd-gpio = | |
54 | <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; | |
55 | nvidia,ddc-i2c-bus = <&hdmiddc>; | |
56 | }; | |
57 | }; | |
58 | ||
58ecb23f | 59 | pinmux@70000868 { |
d7df69fe BW |
60 | pinctrl-names = "default"; |
61 | pinctrl-0 = <&state_default>; | |
62 | ||
63 | state_default: pinmux { | |
64 | sdmmc1_clk_pz0 { | |
65 | nvidia,pins = "sdmmc1_clk_pz0"; | |
66 | nvidia,function = "sdmmc1"; | |
a47c662a LD |
67 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
68 | nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
d7df69fe BW |
69 | }; |
70 | sdmmc1_cmd_pz1 { | |
71 | nvidia,pins = "sdmmc1_cmd_pz1", | |
72 | "sdmmc1_dat0_py7", | |
73 | "sdmmc1_dat1_py6", | |
74 | "sdmmc1_dat2_py5", | |
75 | "sdmmc1_dat3_py4"; | |
76 | nvidia,function = "sdmmc1"; | |
a47c662a LD |
77 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
78 | nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
d7df69fe BW |
79 | }; |
80 | sdmmc3_clk_pa6 { | |
81 | nvidia,pins = "sdmmc3_clk_pa6"; | |
82 | nvidia,function = "sdmmc3"; | |
a47c662a LD |
83 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
84 | nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
d7df69fe BW |
85 | }; |
86 | sdmmc3_cmd_pa7 { | |
87 | nvidia,pins = "sdmmc3_cmd_pa7", | |
88 | "sdmmc3_dat0_pb7", | |
89 | "sdmmc3_dat1_pb6", | |
90 | "sdmmc3_dat2_pb5", | |
91 | "sdmmc3_dat3_pb4"; | |
92 | nvidia,function = "sdmmc3"; | |
a47c662a LD |
93 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
94 | nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
d7df69fe BW |
95 | }; |
96 | sdmmc4_clk_pcc4 { | |
97 | nvidia,pins = "sdmmc4_clk_pcc4", | |
98 | "sdmmc4_rst_n_pcc3"; | |
99 | nvidia,function = "sdmmc4"; | |
a47c662a LD |
100 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
101 | nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
d7df69fe BW |
102 | }; |
103 | sdmmc4_dat0_paa0 { | |
104 | nvidia,pins = "sdmmc4_dat0_paa0", | |
105 | "sdmmc4_dat1_paa1", | |
106 | "sdmmc4_dat2_paa2", | |
107 | "sdmmc4_dat3_paa3", | |
108 | "sdmmc4_dat4_paa4", | |
109 | "sdmmc4_dat5_paa5", | |
110 | "sdmmc4_dat6_paa6", | |
111 | "sdmmc4_dat7_paa7"; | |
112 | nvidia,function = "sdmmc4"; | |
a47c662a LD |
113 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
114 | nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
d7df69fe BW |
115 | }; |
116 | dap2_fs_pa2 { | |
117 | nvidia,pins = "dap2_fs_pa2", | |
118 | "dap2_sclk_pa3", | |
119 | "dap2_din_pa4", | |
120 | "dap2_dout_pa5"; | |
121 | nvidia,function = "i2s1"; | |
a47c662a LD |
122 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
123 | nvidia,tristate = <TEGRA_PIN_DISABLE>; | |
d7df69fe | 124 | }; |
cc34c9f7 TT |
125 | pex_l1_prsnt_n_pdd4 { |
126 | nvidia,pins = "pex_l1_prsnt_n_pdd4", | |
127 | "pex_l1_clkreq_n_pdd6"; | |
a47c662a | 128 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
cc34c9f7 | 129 | }; |
d7df69fe BW |
130 | sdio3 { |
131 | nvidia,pins = "drive_sdio3"; | |
a47c662a LD |
132 | nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>; |
133 | nvidia,schmitt = <TEGRA_PIN_DISABLE>; | |
d7df69fe BW |
134 | nvidia,pull-down-strength = <46>; |
135 | nvidia,pull-up-strength = <42>; | |
136 | nvidia,slew-rate-rising = <1>; | |
137 | nvidia,slew-rate-falling = <1>; | |
138 | }; | |
cc34c9f7 TT |
139 | gpv { |
140 | nvidia,pins = "drive_gpv"; | |
141 | nvidia,pull-up-strength = <16>; | |
142 | }; | |
d7df69fe BW |
143 | }; |
144 | }; | |
145 | ||
146 | serial@70006000 { | |
147 | status = "okay"; | |
d7df69fe BW |
148 | }; |
149 | ||
150 | i2c@7000c000 { | |
151 | status = "okay"; | |
152 | clock-frequency = <100000>; | |
153 | }; | |
154 | ||
155 | i2c@7000c400 { | |
156 | status = "okay"; | |
157 | clock-frequency = <100000>; | |
158 | }; | |
159 | ||
160 | i2c@7000c500 { | |
161 | status = "okay"; | |
162 | clock-frequency = <100000>; | |
163 | }; | |
164 | ||
9bd80b41 | 165 | hdmiddc: i2c@7000c700 { |
d7df69fe BW |
166 | status = "okay"; |
167 | clock-frequency = <100000>; | |
168 | }; | |
169 | ||
170 | i2c@7000d000 { | |
171 | status = "okay"; | |
172 | clock-frequency = <100000>; | |
173 | ||
58ecb23f | 174 | rt5640: rt5640@1c { |
23037bbd SW |
175 | compatible = "realtek,rt5640"; |
176 | reg = <0x1c>; | |
177 | interrupt-parent = <&gpio>; | |
178 | interrupts = <TEGRA_GPIO(X, 3) GPIO_ACTIVE_HIGH>; | |
179 | realtek,ldo1-en-gpios = | |
180 | <&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_HIGH>; | |
181 | }; | |
182 | ||
d7df69fe BW |
183 | pmic: tps65911@2d { |
184 | compatible = "ti,tps65911"; | |
185 | reg = <0x2d>; | |
186 | ||
6cecf916 | 187 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; |
d7df69fe BW |
188 | #interrupt-cells = <2>; |
189 | interrupt-controller; | |
190 | ||
191 | ti,system-power-controller; | |
192 | ||
193 | #gpio-cells = <2>; | |
194 | gpio-controller; | |
195 | ||
196 | vcc1-supply = <&vdd_5v_in_reg>; | |
197 | vcc2-supply = <&vdd_5v_in_reg>; | |
198 | vcc3-supply = <&vio_reg>; | |
199 | vcc4-supply = <&vdd_5v_in_reg>; | |
200 | vcc5-supply = <&vdd_5v_in_reg>; | |
201 | vcc6-supply = <&vdd2_reg>; | |
202 | vcc7-supply = <&vdd_5v_in_reg>; | |
203 | vccio-supply = <&vdd_5v_in_reg>; | |
204 | ||
205 | regulators { | |
206 | #address-cells = <1>; | |
207 | #size-cells = <0>; | |
208 | ||
209 | vdd1_reg: vdd1 { | |
210 | regulator-name = "vddio_ddr_1v2"; | |
211 | regulator-min-microvolt = <1200000>; | |
212 | regulator-max-microvolt = <1200000>; | |
213 | regulator-always-on; | |
214 | }; | |
215 | ||
216 | vdd2_reg: vdd2 { | |
217 | regulator-name = "vdd_1v5_gen"; | |
218 | regulator-min-microvolt = <1500000>; | |
219 | regulator-max-microvolt = <1500000>; | |
220 | regulator-always-on; | |
221 | }; | |
222 | ||
223 | vddctrl_reg: vddctrl { | |
224 | regulator-name = "vdd_cpu,vdd_sys"; | |
225 | regulator-min-microvolt = <1000000>; | |
226 | regulator-max-microvolt = <1000000>; | |
227 | regulator-always-on; | |
228 | }; | |
229 | ||
230 | vio_reg: vio { | |
231 | regulator-name = "vdd_1v8_gen"; | |
232 | regulator-min-microvolt = <1800000>; | |
233 | regulator-max-microvolt = <1800000>; | |
234 | regulator-always-on; | |
235 | }; | |
236 | ||
237 | ldo1_reg: ldo1 { | |
238 | regulator-name = "vdd_pexa,vdd_pexb"; | |
239 | regulator-min-microvolt = <1050000>; | |
240 | regulator-max-microvolt = <1050000>; | |
241 | }; | |
242 | ||
243 | ldo2_reg: ldo2 { | |
244 | regulator-name = "vdd_sata,avdd_plle"; | |
245 | regulator-min-microvolt = <1050000>; | |
246 | regulator-max-microvolt = <1050000>; | |
247 | }; | |
248 | ||
249 | /* LDO3 is not connected to anything */ | |
250 | ||
251 | ldo4_reg: ldo4 { | |
252 | regulator-name = "vdd_rtc"; | |
253 | regulator-min-microvolt = <1200000>; | |
254 | regulator-max-microvolt = <1200000>; | |
255 | regulator-always-on; | |
256 | }; | |
257 | ||
258 | ldo5_reg: ldo5 { | |
259 | regulator-name = "vddio_sdmmc,avdd_vdac"; | |
260 | regulator-min-microvolt = <3300000>; | |
261 | regulator-max-microvolt = <3300000>; | |
262 | regulator-always-on; | |
263 | }; | |
264 | ||
265 | ldo6_reg: ldo6 { | |
266 | regulator-name = "avdd_dsi_csi,pwrdet_mipi"; | |
267 | regulator-min-microvolt = <1200000>; | |
268 | regulator-max-microvolt = <1200000>; | |
269 | }; | |
270 | ||
271 | ldo7_reg: ldo7 { | |
272 | regulator-name = "vdd_pllm,x,u,a_p_c_s"; | |
273 | regulator-min-microvolt = <1200000>; | |
274 | regulator-max-microvolt = <1200000>; | |
275 | regulator-always-on; | |
276 | }; | |
277 | ||
278 | ldo8_reg: ldo8 { | |
279 | regulator-name = "vdd_ddr_hs"; | |
280 | regulator-min-microvolt = <1000000>; | |
281 | regulator-max-microvolt = <1000000>; | |
282 | regulator-always-on; | |
283 | }; | |
284 | }; | |
285 | }; | |
57899053 SW |
286 | |
287 | tps62361@60 { | |
288 | compatible = "ti,tps62361"; | |
289 | reg = <0x60>; | |
290 | ||
291 | regulator-name = "tps62361-vout"; | |
292 | regulator-min-microvolt = <500000>; | |
293 | regulator-max-microvolt = <1500000>; | |
294 | regulator-boot-on; | |
295 | regulator-always-on; | |
296 | ti,vsel0-state-high; | |
297 | ti,vsel1-state-high; | |
298 | }; | |
d7df69fe BW |
299 | }; |
300 | ||
301 | spi@7000da00 { | |
302 | status = "okay"; | |
303 | spi-max-frequency = <25000000>; | |
304 | spi-flash@1 { | |
305 | compatible = "winbond,w25q32"; | |
306 | reg = <1>; | |
307 | spi-max-frequency = <20000000>; | |
308 | }; | |
309 | }; | |
310 | ||
58ecb23f | 311 | pmc@7000e400 { |
d7df69fe BW |
312 | status = "okay"; |
313 | nvidia,invert-interrupt; | |
47d2d63b | 314 | nvidia,suspend-mode = <1>; |
a44a019d JL |
315 | nvidia,cpu-pwr-good-time = <2000>; |
316 | nvidia,cpu-pwr-off-time = <200>; | |
317 | nvidia,core-pwr-good-time = <3845 3845>; | |
318 | nvidia,core-pwr-off-time = <0>; | |
319 | nvidia,core-power-req-active-high; | |
320 | nvidia,sys-clock-req-active-high; | |
d7df69fe BW |
321 | }; |
322 | ||
57899053 SW |
323 | ahub@70080000 { |
324 | i2s@70080400 { | |
325 | status = "okay"; | |
326 | }; | |
327 | }; | |
328 | ||
d7df69fe BW |
329 | sdhci@78000000 { |
330 | status = "okay"; | |
3325f1bc SW |
331 | cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; |
332 | wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>; | |
333 | power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>; | |
d7df69fe BW |
334 | bus-width = <4>; |
335 | }; | |
336 | ||
337 | sdhci@78000600 { | |
338 | status = "okay"; | |
339 | bus-width = <8>; | |
7a2617a6 | 340 | non-removable; |
d7df69fe BW |
341 | }; |
342 | ||
4c696500 EB |
343 | usb@7d004000 { |
344 | status = "okay"; | |
345 | }; | |
346 | ||
347 | phy2: usb-phy@7d004000 { | |
348 | vbus-supply = <&sys_3v3_reg>; | |
349 | status = "okay"; | |
350 | }; | |
351 | ||
cc34c9f7 TT |
352 | usb@7d008000 { |
353 | status = "okay"; | |
354 | }; | |
355 | ||
356 | usb-phy@7d008000 { | |
357 | vbus-supply = <&usb3_vbus_reg>; | |
358 | status = "okay"; | |
359 | }; | |
360 | ||
7021d122 JL |
361 | clocks { |
362 | compatible = "simple-bus"; | |
363 | #address-cells = <1>; | |
364 | #size-cells = <0>; | |
365 | ||
58ecb23f | 366 | clk32k_in: clock@0 { |
7021d122 JL |
367 | compatible = "fixed-clock"; |
368 | reg=<0>; | |
369 | #clock-cells = <0>; | |
370 | clock-frequency = <32768>; | |
371 | }; | |
372 | }; | |
373 | ||
57899053 SW |
374 | gpio-leds { |
375 | compatible = "gpio-leds"; | |
376 | ||
377 | gpled1 { | |
378 | label = "LED1"; /* CR5A1 (blue) */ | |
379 | gpios = <&gpio TEGRA_GPIO(L, 1) GPIO_ACTIVE_HIGH>; | |
380 | }; | |
381 | gpled2 { | |
382 | label = "LED2"; /* CR4A2 (green) */ | |
383 | gpios = <&gpio TEGRA_GPIO(L, 0) GPIO_ACTIVE_HIGH>; | |
384 | }; | |
385 | }; | |
386 | ||
d7df69fe BW |
387 | regulators { |
388 | compatible = "simple-bus"; | |
389 | #address-cells = <1>; | |
390 | #size-cells = <0>; | |
391 | ||
392 | vdd_5v_in_reg: regulator@0 { | |
393 | compatible = "regulator-fixed"; | |
394 | reg = <0>; | |
395 | regulator-name = "vdd_5v_in"; | |
396 | regulator-min-microvolt = <5000000>; | |
397 | regulator-max-microvolt = <5000000>; | |
398 | regulator-always-on; | |
399 | }; | |
400 | ||
401 | chargepump_5v_reg: regulator@1 { | |
402 | compatible = "regulator-fixed"; | |
403 | reg = <1>; | |
404 | regulator-name = "chargepump_5v"; | |
405 | regulator-min-microvolt = <5000000>; | |
406 | regulator-max-microvolt = <5000000>; | |
407 | regulator-boot-on; | |
408 | regulator-always-on; | |
409 | enable-active-high; | |
3325f1bc | 410 | gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
411 | }; |
412 | ||
413 | ddr_reg: regulator@2 { | |
414 | compatible = "regulator-fixed"; | |
415 | reg = <2>; | |
416 | regulator-name = "vdd_ddr"; | |
417 | regulator-min-microvolt = <1500000>; | |
418 | regulator-max-microvolt = <1500000>; | |
419 | regulator-always-on; | |
420 | regulator-boot-on; | |
421 | enable-active-high; | |
3325f1bc | 422 | gpio = <&pmic 7 GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
423 | vin-supply = <&vdd_5v_in_reg>; |
424 | }; | |
425 | ||
426 | vdd_5v_sata_reg: regulator@3 { | |
427 | compatible = "regulator-fixed"; | |
428 | reg = <3>; | |
429 | regulator-name = "vdd_5v_sata"; | |
430 | regulator-min-microvolt = <5000000>; | |
431 | regulator-max-microvolt = <5000000>; | |
432 | regulator-always-on; | |
433 | regulator-boot-on; | |
434 | enable-active-high; | |
3325f1bc | 435 | gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
436 | vin-supply = <&vdd_5v_in_reg>; |
437 | }; | |
438 | ||
439 | usb1_vbus_reg: regulator@4 { | |
440 | compatible = "regulator-fixed"; | |
441 | reg = <4>; | |
442 | regulator-name = "usb1_vbus"; | |
443 | regulator-min-microvolt = <5000000>; | |
444 | regulator-max-microvolt = <5000000>; | |
445 | enable-active-high; | |
cc34c9f7 | 446 | gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
447 | gpio-open-drain; |
448 | vin-supply = <&vdd_5v_in_reg>; | |
449 | }; | |
450 | ||
451 | usb3_vbus_reg: regulator@5 { | |
452 | compatible = "regulator-fixed"; | |
453 | reg = <5>; | |
454 | regulator-name = "usb3_vbus"; | |
455 | regulator-min-microvolt = <5000000>; | |
456 | regulator-max-microvolt = <5000000>; | |
457 | enable-active-high; | |
cc34c9f7 | 458 | gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
459 | gpio-open-drain; |
460 | vin-supply = <&vdd_5v_in_reg>; | |
461 | }; | |
462 | ||
463 | sys_3v3_reg: regulator@6 { | |
464 | compatible = "regulator-fixed"; | |
465 | reg = <6>; | |
466 | regulator-name = "sys_3v3,vdd_3v3_alw"; | |
467 | regulator-min-microvolt = <3300000>; | |
468 | regulator-max-microvolt = <3300000>; | |
469 | regulator-always-on; | |
470 | regulator-boot-on; | |
471 | enable-active-high; | |
3325f1bc | 472 | gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
473 | vin-supply = <&vdd_5v_in_reg>; |
474 | }; | |
475 | ||
476 | sys_3v3_pexs_reg: regulator@7 { | |
477 | compatible = "regulator-fixed"; | |
478 | reg = <7>; | |
479 | regulator-name = "sys_3v3_pexs"; | |
480 | regulator-min-microvolt = <3300000>; | |
481 | regulator-max-microvolt = <3300000>; | |
482 | regulator-always-on; | |
483 | regulator-boot-on; | |
484 | enable-active-high; | |
3325f1bc | 485 | gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>; |
d7df69fe BW |
486 | vin-supply = <&sys_3v3_reg>; |
487 | }; | |
597eb8e1 TR |
488 | |
489 | vdd_5v0_hdmi: regulator@8 { | |
490 | compatible = "regulator-fixed"; | |
491 | reg = <8>; | |
492 | regulator-name = "+VDD_5V_HDMI"; | |
493 | regulator-min-microvolt = <5000000>; | |
494 | regulator-max-microvolt = <5000000>; | |
495 | regulator-always-on; | |
496 | regulator-boot-on; | |
497 | vin-supply = <&sys_3v3_reg>; | |
498 | }; | |
d7df69fe | 499 | }; |
b4dd3e0c | 500 | |
23037bbd SW |
501 | sound { |
502 | compatible = "nvidia,tegra-audio-rt5640-beaver", | |
503 | "nvidia,tegra-audio-rt5640"; | |
504 | nvidia,model = "NVIDIA Tegra Beaver"; | |
505 | ||
506 | nvidia,audio-routing = | |
507 | "Headphones", "HPOR", | |
ac472284 SW |
508 | "Headphones", "HPOL", |
509 | "Mic Jack", "MICBIAS1", | |
510 | "IN2P", "Mic Jack"; | |
23037bbd SW |
511 | |
512 | nvidia,i2s-controller = <&tegra_i2s1>; | |
513 | nvidia,audio-codec = <&rt5640>; | |
514 | ||
515 | nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; | |
516 | ||
517 | clocks = <&tegra_car TEGRA30_CLK_PLL_A>, | |
518 | <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, | |
519 | <&tegra_car TEGRA30_CLK_EXTERN1>; | |
520 | clock-names = "pll_a", "pll_a_out0", "mclk"; | |
521 | }; | |
d7df69fe | 522 | }; |