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efb45b30 SA |
1 | /* |
2 | * Copyright 2013 Freescale Semiconductor, Inc. | |
3 | * | |
4a4d45c7 SA |
4 | * This file is dual-licensed: you can use it either under the terms |
5 | * of the GPL or the X11 license, at your option. Note that this dual | |
6 | * licensing only applies to this file, and not this project as a | |
7 | * whole. | |
8 | * | |
9 | * a) This file is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * version 2 as published by the Free Software Foundation. | |
12 | * | |
13283626 | 13 | * This file is distributed in the hope that it will be useful, |
4a4d45c7 SA |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
13283626 | 18 | * Or, alternatively, |
4a4d45c7 SA |
19 | * |
20 | * b) Permission is hereby granted, free of charge, to any person | |
21 | * obtaining a copy of this software and associated documentation | |
22 | * files (the "Software"), to deal in the Software without | |
13283626 | 23 | * restriction, including without limitation the rights to use, |
4a4d45c7 SA |
24 | * copy, modify, merge, publish, distribute, sublicense, and/or |
25 | * sell copies of the Software, and to permit persons to whom the | |
26 | * Software is furnished to do so, subject to the following | |
27 | * conditions: | |
28 | * | |
29 | * The above copyright notice and this permission notice shall be | |
30 | * included in all copies or substantial portions of the Software. | |
31 | * | |
13283626 | 32 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
4a4d45c7 SA |
33 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
34 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
35 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
13283626 | 36 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
4a4d45c7 SA |
37 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
38 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
39 | * OTHER DEALINGS IN THE SOFTWARE. | |
efb45b30 SA |
40 | */ |
41 | ||
42 | #include "vf610-pinfunc.h" | |
43 | #include <dt-bindings/clock/vf610-clock.h> | |
44 | #include <dt-bindings/interrupt-controller/irq.h> | |
2b36bda3 | 45 | #include <dt-bindings/gpio/gpio.h> |
efb45b30 SA |
46 | |
47 | / { | |
48 | aliases { | |
49 | can0 = &can0; | |
50 | can1 = &can1; | |
17566c72 SA |
51 | ethernet0 = &fec0; |
52 | ethernet1 = &fec1; | |
efb45b30 SA |
53 | serial0 = &uart0; |
54 | serial1 = &uart1; | |
55 | serial2 = &uart2; | |
56 | serial3 = &uart3; | |
57 | serial4 = &uart4; | |
58 | serial5 = &uart5; | |
76713954 SA |
59 | gpio0 = &gpio0; |
60 | gpio1 = &gpio1; | |
61 | gpio2 = &gpio2; | |
62 | gpio3 = &gpio3; | |
63 | gpio4 = &gpio4; | |
efb45b30 SA |
64 | usbphy0 = &usbphy0; |
65 | usbphy1 = &usbphy1; | |
66 | }; | |
67 | ||
68 | fxosc: fxosc { | |
69 | compatible = "fixed-clock"; | |
70 | #clock-cells = <0>; | |
71 | clock-frequency = <24000000>; | |
72 | }; | |
73 | ||
74 | sxosc: sxosc { | |
75 | compatible = "fixed-clock"; | |
76 | #clock-cells = <0>; | |
77 | clock-frequency = <32768>; | |
78 | }; | |
79 | ||
0d018d73 SA |
80 | reboot: syscon-reboot { |
81 | compatible = "syscon-reboot"; | |
82 | regmap = <&src>; | |
83 | offset = <0x0>; | |
84 | mask = <0x1000>; | |
85 | }; | |
86 | ||
efb45b30 SA |
87 | soc { |
88 | #address-cells = <1>; | |
89 | #size-cells = <1>; | |
90 | compatible = "simple-bus"; | |
c09d0f7c | 91 | interrupt-parent = <&mscm_ir>; |
efb45b30 SA |
92 | ranges; |
93 | ||
94 | aips0: aips-bus@40000000 { | |
95 | compatible = "fsl,aips-bus", "simple-bus"; | |
96 | #address-cells = <1>; | |
97 | #size-cells = <1>; | |
ef4a4e14 | 98 | reg = <0x40000000 0x00070000>; |
efb45b30 SA |
99 | ranges; |
100 | ||
c09d0f7c SA |
101 | mscm_cpucfg: cpucfg@40001000 { |
102 | compatible = "fsl,vf610-mscm-cpucfg", "syscon"; | |
103 | reg = <0x40001000 0x800>; | |
104 | }; | |
105 | ||
106 | mscm_ir: interrupt-controller@40001800 { | |
107 | compatible = "fsl,vf610-mscm-ir"; | |
108 | reg = <0x40001800 0x400>; | |
109 | fsl,cpucfg = <&mscm_cpucfg>; | |
110 | interrupt-controller; | |
111 | #interrupt-cells = <2>; | |
112 | }; | |
113 | ||
efb45b30 SA |
114 | edma0: dma-controller@40018000 { |
115 | #dma-cells = <2>; | |
116 | compatible = "fsl,vf610-edma"; | |
117 | reg = <0x40018000 0x2000>, | |
118 | <0x40024000 0x1000>, | |
119 | <0x40025000 0x1000>; | |
120 | dma-channels = <32>; | |
c09d0f7c SA |
121 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH>, |
122 | <9 IRQ_TYPE_LEVEL_HIGH>; | |
123 | interrupt-names = "edma-tx", "edma-err"; | |
efb45b30 SA |
124 | clock-names = "dmamux0", "dmamux1"; |
125 | clocks = <&clks VF610_CLK_DMAMUX0>, | |
126 | <&clks VF610_CLK_DMAMUX1>; | |
127 | status = "disabled"; | |
128 | }; | |
129 | ||
130 | can0: flexcan@40020000 { | |
131 | compatible = "fsl,vf610-flexcan"; | |
132 | reg = <0x40020000 0x4000>; | |
c09d0f7c | 133 | interrupts = <58 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
134 | clocks = <&clks VF610_CLK_FLEXCAN0>, |
135 | <&clks VF610_CLK_FLEXCAN0>; | |
136 | clock-names = "ipg", "per"; | |
137 | status = "disabled"; | |
138 | }; | |
139 | ||
140 | uart0: serial@40027000 { | |
141 | compatible = "fsl,vf610-lpuart"; | |
142 | reg = <0x40027000 0x1000>; | |
c09d0f7c | 143 | interrupts = <61 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
144 | clocks = <&clks VF610_CLK_UART0>; |
145 | clock-names = "ipg"; | |
146 | dmas = <&edma0 0 2>, | |
147 | <&edma0 0 3>; | |
148 | dma-names = "rx","tx"; | |
149 | status = "disabled"; | |
150 | }; | |
151 | ||
152 | uart1: serial@40028000 { | |
153 | compatible = "fsl,vf610-lpuart"; | |
154 | reg = <0x40028000 0x1000>; | |
c09d0f7c | 155 | interrupts = <62 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
156 | clocks = <&clks VF610_CLK_UART1>; |
157 | clock-names = "ipg"; | |
158 | dmas = <&edma0 0 4>, | |
159 | <&edma0 0 5>; | |
160 | dma-names = "rx","tx"; | |
161 | status = "disabled"; | |
162 | }; | |
163 | ||
164 | uart2: serial@40029000 { | |
165 | compatible = "fsl,vf610-lpuart"; | |
166 | reg = <0x40029000 0x1000>; | |
c09d0f7c | 167 | interrupts = <63 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
168 | clocks = <&clks VF610_CLK_UART2>; |
169 | clock-names = "ipg"; | |
170 | dmas = <&edma0 0 6>, | |
171 | <&edma0 0 7>; | |
172 | dma-names = "rx","tx"; | |
173 | status = "disabled"; | |
174 | }; | |
175 | ||
176 | uart3: serial@4002a000 { | |
177 | compatible = "fsl,vf610-lpuart"; | |
178 | reg = <0x4002a000 0x1000>; | |
c09d0f7c | 179 | interrupts = <64 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
180 | clocks = <&clks VF610_CLK_UART3>; |
181 | clock-names = "ipg"; | |
182 | dmas = <&edma0 0 8>, | |
183 | <&edma0 0 9>; | |
184 | dma-names = "rx","tx"; | |
185 | status = "disabled"; | |
186 | }; | |
187 | ||
188 | dspi0: dspi0@4002c000 { | |
189 | #address-cells = <1>; | |
190 | #size-cells = <0>; | |
191 | compatible = "fsl,vf610-dspi"; | |
192 | reg = <0x4002c000 0x1000>; | |
c09d0f7c | 193 | interrupts = <67 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
194 | clocks = <&clks VF610_CLK_DSPI0>; |
195 | clock-names = "dspi"; | |
897ed0ca | 196 | spi-num-chipselects = <6>; |
14c41633 SM |
197 | dmas = <&edma1 1 12>, |
198 | <&edma1 1 13>; | |
199 | dma-names = "rx", "tx"; | |
efb45b30 SA |
200 | status = "disabled"; |
201 | }; | |
202 | ||
1b545c17 BD |
203 | dspi1: dspi1@4002d000 { |
204 | #address-cells = <1>; | |
205 | #size-cells = <0>; | |
206 | compatible = "fsl,vf610-dspi"; | |
207 | reg = <0x4002d000 0x1000>; | |
c09d0f7c | 208 | interrupts = <68 IRQ_TYPE_LEVEL_HIGH>; |
1b545c17 BD |
209 | clocks = <&clks VF610_CLK_DSPI1>; |
210 | clock-names = "dspi"; | |
897ed0ca | 211 | spi-num-chipselects = <4>; |
14c41633 SM |
212 | dmas = <&edma1 1 14>, |
213 | <&edma1 1 15>; | |
214 | dma-names = "rx", "tx"; | |
1b545c17 BD |
215 | status = "disabled"; |
216 | }; | |
217 | ||
26a91d89 SA |
218 | sai0: sai@4002f000 { |
219 | compatible = "fsl,vf610-sai"; | |
220 | reg = <0x4002f000 0x1000>; | |
221 | interrupts = <84 IRQ_TYPE_LEVEL_HIGH>; | |
222 | clocks = <&clks VF610_CLK_SAI0>, | |
223 | <&clks VF610_CLK_SAI0_DIV>, | |
224 | <&clks 0>, <&clks 0>; | |
225 | clock-names = "bus", "mclk1", "mclk2", "mclk3"; | |
226 | dma-names = "tx", "rx"; | |
227 | dmas = <&edma0 0 17>, | |
228 | <&edma0 0 16>; | |
229 | status = "disabled"; | |
230 | }; | |
231 | ||
232 | sai1: sai@40030000 { | |
233 | compatible = "fsl,vf610-sai"; | |
234 | reg = <0x40030000 0x1000>; | |
235 | interrupts = <85 IRQ_TYPE_LEVEL_HIGH>; | |
236 | clocks = <&clks VF610_CLK_SAI1>, | |
237 | <&clks VF610_CLK_SAI1_DIV>, | |
238 | <&clks 0>, <&clks 0>; | |
239 | clock-names = "bus", "mclk1", "mclk2", "mclk3"; | |
240 | dma-names = "tx", "rx"; | |
241 | dmas = <&edma0 0 19>, | |
242 | <&edma0 0 18>; | |
243 | status = "disabled"; | |
244 | }; | |
245 | ||
efb45b30 SA |
246 | sai2: sai@40031000 { |
247 | compatible = "fsl,vf610-sai"; | |
248 | reg = <0x40031000 0x1000>; | |
c09d0f7c | 249 | interrupts = <86 IRQ_TYPE_LEVEL_HIGH>; |
531ee1f4 SA |
250 | clocks = <&clks VF610_CLK_SAI2>, |
251 | <&clks VF610_CLK_SAI2_DIV>, | |
252 | <&clks 0>, <&clks 0>; | |
253 | clock-names = "bus", "mclk1", "mclk2", "mclk3"; | |
efb45b30 SA |
254 | dma-names = "tx", "rx"; |
255 | dmas = <&edma0 0 21>, | |
256 | <&edma0 0 20>; | |
257 | status = "disabled"; | |
258 | }; | |
259 | ||
26a91d89 SA |
260 | sai3: sai@40032000 { |
261 | compatible = "fsl,vf610-sai"; | |
262 | reg = <0x40032000 0x1000>; | |
263 | interrupts = <87 IRQ_TYPE_LEVEL_HIGH>; | |
264 | clocks = <&clks VF610_CLK_SAI3>, | |
265 | <&clks VF610_CLK_SAI3_DIV>, | |
266 | <&clks 0>, <&clks 0>; | |
267 | clock-names = "bus", "mclk1", "mclk2", "mclk3"; | |
268 | dma-names = "tx", "rx"; | |
269 | dmas = <&edma0 1 9>, | |
270 | <&edma0 1 8>; | |
271 | status = "disabled"; | |
272 | }; | |
273 | ||
efb45b30 SA |
274 | pit: pit@40037000 { |
275 | compatible = "fsl,vf610-pit"; | |
276 | reg = <0x40037000 0x1000>; | |
c09d0f7c | 277 | interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
278 | clocks = <&clks VF610_CLK_PIT>; |
279 | clock-names = "pit"; | |
280 | }; | |
281 | ||
282 | pwm0: pwm@40038000 { | |
283 | compatible = "fsl,vf610-ftm-pwm"; | |
284 | #pwm-cells = <3>; | |
285 | reg = <0x40038000 0x1000>; | |
286 | clock-names = "ftm_sys", "ftm_ext", | |
287 | "ftm_fix", "ftm_cnt_clk_en"; | |
288 | clocks = <&clks VF610_CLK_FTM0>, | |
289 | <&clks VF610_CLK_FTM0_EXT_SEL>, | |
290 | <&clks VF610_CLK_FTM0_FIX_SEL>, | |
291 | <&clks VF610_CLK_FTM0_EXT_FIX_EN>; | |
292 | status = "disabled"; | |
293 | }; | |
294 | ||
295 | pwm1: pwm@40039000 { | |
296 | compatible = "fsl,vf610-ftm-pwm"; | |
297 | #pwm-cells = <3>; | |
298 | reg = <0x40039000 0x1000>; | |
299 | clock-names = "ftm_sys", "ftm_ext", | |
300 | "ftm_fix", "ftm_cnt_clk_en"; | |
301 | clocks = <&clks VF610_CLK_FTM1>, | |
302 | <&clks VF610_CLK_FTM1_EXT_SEL>, | |
303 | <&clks VF610_CLK_FTM1_FIX_SEL>, | |
304 | <&clks VF610_CLK_FTM1_EXT_FIX_EN>; | |
305 | status = "disabled"; | |
306 | }; | |
307 | ||
308 | adc0: adc@4003b000 { | |
309 | compatible = "fsl,vf610-adc"; | |
310 | reg = <0x4003b000 0x1000>; | |
c09d0f7c | 311 | interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
312 | clocks = <&clks VF610_CLK_ADC0>; |
313 | clock-names = "adc"; | |
9b1793af | 314 | #io-channel-cells = <1>; |
efb45b30 | 315 | status = "disabled"; |
def0641e SA |
316 | fsl,adck-max-frequency = <30000000>, <40000000>, |
317 | <20000000>; | |
efb45b30 SA |
318 | }; |
319 | ||
1d0fc33f SA |
320 | tcon0: timing-controller@4003d000 { |
321 | compatible = "fsl,vf610-tcon"; | |
322 | reg = <0x4003d000 0x1000>; | |
323 | clocks = <&clks VF610_CLK_TCON0>; | |
324 | clock-names = "ipg"; | |
325 | status = "disabled"; | |
326 | }; | |
327 | ||
c134e09f | 328 | wdoga5: wdog@4003e000 { |
efb45b30 SA |
329 | compatible = "fsl,vf610-wdt", "fsl,imx21-wdt"; |
330 | reg = <0x4003e000 0x1000>; | |
c09d0f7c | 331 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
332 | clocks = <&clks VF610_CLK_WDT>; |
333 | clock-names = "wdog"; | |
334 | status = "disabled"; | |
335 | }; | |
336 | ||
337 | qspi0: quadspi@40044000 { | |
338 | #address-cells = <1>; | |
339 | #size-cells = <0>; | |
340 | compatible = "fsl,vf610-qspi"; | |
f4b89232 CT |
341 | reg = <0x40044000 0x1000>, <0x20000000 0x10000000>; |
342 | reg-names = "QuadSPI", "QuadSPI-memory"; | |
c09d0f7c | 343 | interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
344 | clocks = <&clks VF610_CLK_QSPI0_EN>, |
345 | <&clks VF610_CLK_QSPI0>; | |
346 | clock-names = "qspi_en", "qspi"; | |
347 | status = "disabled"; | |
348 | }; | |
349 | ||
350 | iomuxc: iomuxc@40048000 { | |
351 | compatible = "fsl,vf610-iomuxc"; | |
352 | reg = <0x40048000 0x1000>; | |
efb45b30 SA |
353 | }; |
354 | ||
76713954 | 355 | gpio0: gpio@40049000 { |
efb45b30 SA |
356 | compatible = "fsl,vf610-gpio"; |
357 | reg = <0x40049000 0x1000 0x400ff000 0x40>; | |
358 | gpio-controller; | |
359 | #gpio-cells = <2>; | |
c09d0f7c | 360 | interrupts = <107 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
361 | interrupt-controller; |
362 | #interrupt-cells = <2>; | |
363 | gpio-ranges = <&iomuxc 0 0 32>; | |
364 | }; | |
365 | ||
76713954 | 366 | gpio1: gpio@4004a000 { |
efb45b30 SA |
367 | compatible = "fsl,vf610-gpio"; |
368 | reg = <0x4004a000 0x1000 0x400ff040 0x40>; | |
369 | gpio-controller; | |
370 | #gpio-cells = <2>; | |
c09d0f7c | 371 | interrupts = <108 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
372 | interrupt-controller; |
373 | #interrupt-cells = <2>; | |
374 | gpio-ranges = <&iomuxc 0 32 32>; | |
375 | }; | |
376 | ||
76713954 | 377 | gpio2: gpio@4004b000 { |
efb45b30 SA |
378 | compatible = "fsl,vf610-gpio"; |
379 | reg = <0x4004b000 0x1000 0x400ff080 0x40>; | |
380 | gpio-controller; | |
381 | #gpio-cells = <2>; | |
c09d0f7c | 382 | interrupts = <109 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
383 | interrupt-controller; |
384 | #interrupt-cells = <2>; | |
385 | gpio-ranges = <&iomuxc 0 64 32>; | |
386 | }; | |
387 | ||
76713954 | 388 | gpio3: gpio@4004c000 { |
efb45b30 SA |
389 | compatible = "fsl,vf610-gpio"; |
390 | reg = <0x4004c000 0x1000 0x400ff0c0 0x40>; | |
391 | gpio-controller; | |
392 | #gpio-cells = <2>; | |
c09d0f7c | 393 | interrupts = <110 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
394 | interrupt-controller; |
395 | #interrupt-cells = <2>; | |
396 | gpio-ranges = <&iomuxc 0 96 32>; | |
397 | }; | |
398 | ||
76713954 | 399 | gpio4: gpio@4004d000 { |
efb45b30 SA |
400 | compatible = "fsl,vf610-gpio"; |
401 | reg = <0x4004d000 0x1000 0x400ff100 0x40>; | |
402 | gpio-controller; | |
403 | #gpio-cells = <2>; | |
c09d0f7c | 404 | interrupts = <111 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
405 | interrupt-controller; |
406 | #interrupt-cells = <2>; | |
407 | gpio-ranges = <&iomuxc 0 128 7>; | |
408 | }; | |
409 | ||
410 | anatop: anatop@40050000 { | |
411 | compatible = "fsl,vf610-anatop", "syscon"; | |
412 | reg = <0x40050000 0x400>; | |
413 | }; | |
414 | ||
415 | usbphy0: usbphy@40050800 { | |
416 | compatible = "fsl,vf610-usbphy"; | |
417 | reg = <0x40050800 0x400>; | |
c09d0f7c | 418 | interrupts = <50 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
419 | clocks = <&clks VF610_CLK_USBPHY0>; |
420 | fsl,anatop = <&anatop>; | |
421 | status = "disabled"; | |
422 | }; | |
423 | ||
424 | usbphy1: usbphy@40050c00 { | |
425 | compatible = "fsl,vf610-usbphy"; | |
426 | reg = <0x40050c00 0x400>; | |
c09d0f7c | 427 | interrupts = <51 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
428 | clocks = <&clks VF610_CLK_USBPHY1>; |
429 | fsl,anatop = <&anatop>; | |
430 | status = "disabled"; | |
431 | }; | |
432 | ||
1d0fc33f SA |
433 | dcu0: dcu@40058000 { |
434 | compatible = "fsl,vf610-dcu"; | |
435 | reg = <0x40058000 0x1200>; | |
436 | interrupts = <30 IRQ_TYPE_LEVEL_HIGH>; | |
437 | clocks = <&clks VF610_CLK_DCU0>, | |
438 | <&clks VF610_CLK_DCU0_DIV>; | |
439 | clock-names = "dcu", "pix"; | |
440 | fsl,tcon = <&tcon0>; | |
441 | status = "disabled"; | |
442 | }; | |
443 | ||
efb45b30 SA |
444 | i2c0: i2c@40066000 { |
445 | #address-cells = <1>; | |
446 | #size-cells = <0>; | |
447 | compatible = "fsl,vf610-i2c"; | |
448 | reg = <0x40066000 0x1000>; | |
c09d0f7c | 449 | interrupts = <71 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
450 | clocks = <&clks VF610_CLK_I2C0>; |
451 | clock-names = "ipg"; | |
452 | dmas = <&edma0 0 50>, | |
453 | <&edma0 0 51>; | |
454 | dma-names = "rx","tx"; | |
455 | status = "disabled"; | |
456 | }; | |
457 | ||
2d4e4a62 CT |
458 | i2c1: i2c@40067000 { |
459 | #address-cells = <1>; | |
460 | #size-cells = <0>; | |
461 | compatible = "fsl,vf610-i2c"; | |
462 | reg = <0x40067000 0x1000>; | |
463 | interrupts = <72 IRQ_TYPE_LEVEL_HIGH>; | |
464 | clocks = <&clks VF610_CLK_I2C1>; | |
465 | clock-names = "ipg"; | |
466 | dmas = <&edma0 0 52>, | |
467 | <&edma0 0 53>; | |
468 | dma-names = "rx","tx"; | |
469 | status = "disabled"; | |
470 | }; | |
471 | ||
efb45b30 SA |
472 | clks: ccm@4006b000 { |
473 | compatible = "fsl,vf610-ccm"; | |
474 | reg = <0x4006b000 0x1000>; | |
475 | clocks = <&sxosc>, <&fxosc>; | |
476 | clock-names = "sxosc", "fxosc"; | |
477 | #clock-cells = <1>; | |
478 | }; | |
479 | ||
480 | usbdev0: usb@40034000 { | |
481 | compatible = "fsl,vf610-usb", "fsl,imx27-usb"; | |
482 | reg = <0x40034000 0x800>; | |
c09d0f7c | 483 | interrupts = <75 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
484 | clocks = <&clks VF610_CLK_USBC0>; |
485 | fsl,usbphy = <&usbphy0>; | |
486 | fsl,usbmisc = <&usbmisc0 0>; | |
487 | dr_mode = "peripheral"; | |
488 | status = "disabled"; | |
489 | }; | |
490 | ||
491 | usbmisc0: usb@40034800 { | |
492 | #index-cells = <1>; | |
493 | compatible = "fsl,vf610-usbmisc"; | |
494 | reg = <0x40034800 0x200>; | |
495 | clocks = <&clks VF610_CLK_USBC0>; | |
496 | status = "disabled"; | |
497 | }; | |
0d018d73 SA |
498 | |
499 | src: src@4006e000 { | |
500 | compatible = "fsl,vf610-src", "syscon"; | |
501 | reg = <0x4006e000 0x1000>; | |
53f643d2 | 502 | interrupts = <96 IRQ_TYPE_LEVEL_HIGH>; |
0d018d73 | 503 | }; |
efb45b30 SA |
504 | }; |
505 | ||
506 | aips1: aips-bus@40080000 { | |
507 | compatible = "fsl,aips-bus", "simple-bus"; | |
508 | #address-cells = <1>; | |
509 | #size-cells = <1>; | |
ef4a4e14 | 510 | reg = <0x40080000 0x0007f000>; |
efb45b30 SA |
511 | ranges; |
512 | ||
513 | edma1: dma-controller@40098000 { | |
514 | #dma-cells = <2>; | |
515 | compatible = "fsl,vf610-edma"; | |
516 | reg = <0x40098000 0x2000>, | |
517 | <0x400a1000 0x1000>, | |
518 | <0x400a2000 0x1000>; | |
519 | dma-channels = <32>; | |
c09d0f7c SA |
520 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH>, |
521 | <11 IRQ_TYPE_LEVEL_HIGH>; | |
522 | interrupt-names = "edma-tx", "edma-err"; | |
efb45b30 SA |
523 | clock-names = "dmamux0", "dmamux1"; |
524 | clocks = <&clks VF610_CLK_DMAMUX2>, | |
525 | <&clks VF610_CLK_DMAMUX3>; | |
526 | status = "disabled"; | |
527 | }; | |
fa8d20c8 AS |
528 | |
529 | ocotp: ocotp@400a5000 { | |
530 | compatible = "fsl,vf610-ocotp"; | |
531 | reg = <0x400a5000 0x1000>; | |
532 | clocks = <&clks VF610_CLK_OCOTP>; | |
533 | }; | |
efb45b30 | 534 | |
8455dd0d | 535 | snvs0: snvs@400a7000 { |
95d739b5 FL |
536 | compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; |
537 | reg = <0x400a7000 0x2000>; | |
8455dd0d | 538 | |
95d739b5 | 539 | snvsrtc: snvs-rtc-lp { |
8455dd0d | 540 | compatible = "fsl,sec-v4.0-mon-rtc-lp"; |
95d739b5 FL |
541 | regmap = <&snvs0>; |
542 | offset = <0x34>; | |
53f643d2 | 543 | interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; |
8455dd0d SM |
544 | clocks = <&clks VF610_CLK_SNVS>; |
545 | clock-names = "snvs-rtc"; | |
546 | }; | |
547 | }; | |
548 | ||
efb45b30 SA |
549 | uart4: serial@400a9000 { |
550 | compatible = "fsl,vf610-lpuart"; | |
551 | reg = <0x400a9000 0x1000>; | |
c09d0f7c | 552 | interrupts = <65 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
553 | clocks = <&clks VF610_CLK_UART4>; |
554 | clock-names = "ipg"; | |
555 | status = "disabled"; | |
556 | }; | |
557 | ||
558 | uart5: serial@400aa000 { | |
559 | compatible = "fsl,vf610-lpuart"; | |
560 | reg = <0x400aa000 0x1000>; | |
c09d0f7c | 561 | interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
562 | clocks = <&clks VF610_CLK_UART5>; |
563 | clock-names = "ipg"; | |
564 | status = "disabled"; | |
565 | }; | |
566 | ||
5f060c71 CT |
567 | dspi2: dspi2@400ac000 { |
568 | #address-cells = <1>; | |
569 | #size-cells = <0>; | |
570 | compatible = "fsl,vf610-dspi"; | |
571 | reg = <0x400ac000 0x1000>; | |
572 | interrupts = <69 IRQ_TYPE_LEVEL_HIGH>; | |
573 | clocks = <&clks VF610_CLK_DSPI2>; | |
574 | clock-names = "dspi"; | |
575 | spi-num-chipselects = <2>; | |
4743ced9 SM |
576 | dmas = <&edma1 0 10>, |
577 | <&edma1 0 11>; | |
578 | dma-names = "rx", "tx"; | |
5f060c71 CT |
579 | status = "disabled"; |
580 | }; | |
581 | ||
582 | dspi3: dspi3@400ad000 { | |
583 | #address-cells = <1>; | |
584 | #size-cells = <0>; | |
585 | compatible = "fsl,vf610-dspi"; | |
586 | reg = <0x400ad000 0x1000>; | |
587 | interrupts = <70 IRQ_TYPE_LEVEL_HIGH>; | |
588 | clocks = <&clks VF610_CLK_DSPI3>; | |
589 | clock-names = "dspi"; | |
590 | spi-num-chipselects = <2>; | |
4743ced9 SM |
591 | dmas = <&edma1 0 12>, |
592 | <&edma1 0 13>; | |
593 | dma-names = "rx", "tx"; | |
5f060c71 CT |
594 | status = "disabled"; |
595 | }; | |
596 | ||
efb45b30 SA |
597 | adc1: adc@400bb000 { |
598 | compatible = "fsl,vf610-adc"; | |
599 | reg = <0x400bb000 0x1000>; | |
c09d0f7c | 600 | interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
601 | clocks = <&clks VF610_CLK_ADC1>; |
602 | clock-names = "adc"; | |
9b1793af | 603 | #io-channel-cells = <1>; |
efb45b30 | 604 | status = "disabled"; |
3fa2f949 SM |
605 | fsl,adck-max-frequency = <30000000>, <40000000>, |
606 | <20000000>; | |
efb45b30 SA |
607 | }; |
608 | ||
3b7816ba CT |
609 | esdhc0: esdhc@400b1000 { |
610 | compatible = "fsl,imx53-esdhc"; | |
611 | reg = <0x400b1000 0x1000>; | |
612 | interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; | |
613 | clocks = <&clks VF610_CLK_IPG_BUS>, | |
614 | <&clks VF610_CLK_PLATFORM_BUS>, | |
615 | <&clks VF610_CLK_ESDHC0>; | |
616 | clock-names = "ipg", "ahb", "per"; | |
617 | status = "disabled"; | |
618 | }; | |
619 | ||
efb45b30 SA |
620 | esdhc1: esdhc@400b2000 { |
621 | compatible = "fsl,imx53-esdhc"; | |
622 | reg = <0x400b2000 0x1000>; | |
c09d0f7c | 623 | interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
624 | clocks = <&clks VF610_CLK_IPG_BUS>, |
625 | <&clks VF610_CLK_PLATFORM_BUS>, | |
626 | <&clks VF610_CLK_ESDHC1>; | |
627 | clock-names = "ipg", "ahb", "per"; | |
628 | status = "disabled"; | |
629 | }; | |
630 | ||
631 | usbh1: usb@400b4000 { | |
632 | compatible = "fsl,vf610-usb", "fsl,imx27-usb"; | |
633 | reg = <0x400b4000 0x800>; | |
c09d0f7c | 634 | interrupts = <76 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
635 | clocks = <&clks VF610_CLK_USBC1>; |
636 | fsl,usbphy = <&usbphy1>; | |
637 | fsl,usbmisc = <&usbmisc1 0>; | |
638 | dr_mode = "host"; | |
639 | status = "disabled"; | |
640 | }; | |
641 | ||
642 | usbmisc1: usb@400b4800 { | |
643 | #index-cells = <1>; | |
644 | compatible = "fsl,vf610-usbmisc"; | |
645 | reg = <0x400b4800 0x200>; | |
646 | clocks = <&clks VF610_CLK_USBC1>; | |
647 | status = "disabled"; | |
648 | }; | |
649 | ||
650 | ftm: ftm@400b8000 { | |
651 | compatible = "fsl,ftm-timer"; | |
652 | reg = <0x400b8000 0x1000 0x400b9000 0x1000>; | |
c09d0f7c | 653 | interrupts = <44 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
654 | clock-names = "ftm-evt", "ftm-src", |
655 | "ftm-evt-counter-en", "ftm-src-counter-en"; | |
656 | clocks = <&clks VF610_CLK_FTM2>, | |
657 | <&clks VF610_CLK_FTM3>, | |
658 | <&clks VF610_CLK_FTM2_EXT_FIX_EN>, | |
659 | <&clks VF610_CLK_FTM3_EXT_FIX_EN>; | |
660 | status = "disabled"; | |
661 | }; | |
662 | ||
6f5e6967 CT |
663 | qspi1: quadspi@400c4000 { |
664 | #address-cells = <1>; | |
665 | #size-cells = <0>; | |
666 | compatible = "fsl,vf610-qspi"; | |
667 | reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>; | |
668 | reg-names = "QuadSPI", "QuadSPI-memory"; | |
669 | interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; | |
670 | clocks = <&clks VF610_CLK_QSPI1_EN>, | |
671 | <&clks VF610_CLK_QSPI1>; | |
672 | clock-names = "qspi_en", "qspi"; | |
673 | status = "disabled"; | |
674 | }; | |
675 | ||
18e75ad2 SM |
676 | dac0: dac@400cc000 { |
677 | compatible = "fsl,vf610-dac"; | |
678 | reg = <0x400cc000 1000>; | |
679 | interrupts = <55 IRQ_TYPE_LEVEL_HIGH>; | |
680 | clock-names = "dac"; | |
681 | clocks = <&clks VF610_CLK_DAC0>; | |
682 | status = "disabled"; | |
683 | }; | |
684 | ||
685 | dac1: dac@400cd000 { | |
686 | compatible = "fsl,vf610-dac"; | |
687 | reg = <0x400cd000 1000>; | |
688 | interrupts = <56 IRQ_TYPE_LEVEL_HIGH>; | |
689 | clock-names = "dac"; | |
690 | clocks = <&clks VF610_CLK_DAC1>; | |
691 | status = "disabled"; | |
692 | }; | |
693 | ||
efb45b30 SA |
694 | fec0: ethernet@400d0000 { |
695 | compatible = "fsl,mvf600-fec"; | |
696 | reg = <0x400d0000 0x1000>; | |
c09d0f7c | 697 | interrupts = <78 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
698 | clocks = <&clks VF610_CLK_ENET0>, |
699 | <&clks VF610_CLK_ENET0>, | |
700 | <&clks VF610_CLK_ENET>; | |
701 | clock-names = "ipg", "ahb", "ptp"; | |
702 | status = "disabled"; | |
703 | }; | |
704 | ||
705 | fec1: ethernet@400d1000 { | |
706 | compatible = "fsl,mvf600-fec"; | |
707 | reg = <0x400d1000 0x1000>; | |
c09d0f7c | 708 | interrupts = <79 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
709 | clocks = <&clks VF610_CLK_ENET1>, |
710 | <&clks VF610_CLK_ENET1>, | |
711 | <&clks VF610_CLK_ENET>; | |
712 | clock-names = "ipg", "ahb", "ptp"; | |
713 | status = "disabled"; | |
714 | }; | |
715 | ||
716 | can1: flexcan@400d4000 { | |
717 | compatible = "fsl,vf610-flexcan"; | |
718 | reg = <0x400d4000 0x4000>; | |
c09d0f7c | 719 | interrupts = <59 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
720 | clocks = <&clks VF610_CLK_FLEXCAN1>, |
721 | <&clks VF610_CLK_FLEXCAN1>; | |
722 | clock-names = "ipg", "per"; | |
723 | status = "disabled"; | |
724 | }; | |
725 | ||
baeeb541 SA |
726 | nfc: nand@400e0000 { |
727 | #address-cells = <1>; | |
728 | #size-cells = <0>; | |
729 | compatible = "fsl,vf610-nfc"; | |
730 | reg = <0x400e0000 0x4000>; | |
731 | interrupts = <83 IRQ_TYPE_LEVEL_HIGH>; | |
732 | clocks = <&clks VF610_CLK_NFC>; | |
733 | clock-names = "nfc"; | |
734 | status = "disabled"; | |
735 | }; | |
736 | ||
2d4e4a62 CT |
737 | i2c2: i2c@400e6000 { |
738 | #address-cells = <1>; | |
739 | #size-cells = <0>; | |
740 | compatible = "fsl,vf610-i2c"; | |
741 | reg = <0x400e6000 0x1000>; | |
742 | interrupts = <73 IRQ_TYPE_LEVEL_HIGH>; | |
743 | clocks = <&clks VF610_CLK_I2C2>; | |
744 | clock-names = "ipg"; | |
745 | dmas = <&edma0 1 36>, | |
746 | <&edma0 1 37>; | |
747 | dma-names = "rx","tx"; | |
748 | status = "disabled"; | |
749 | }; | |
750 | ||
751 | i2c3: i2c@400e7000 { | |
752 | #address-cells = <1>; | |
753 | #size-cells = <0>; | |
754 | compatible = "fsl,vf610-i2c"; | |
755 | reg = <0x400e7000 0x1000>; | |
756 | interrupts = <74 IRQ_TYPE_LEVEL_HIGH>; | |
757 | clocks = <&clks VF610_CLK_I2C3>; | |
758 | clock-names = "ipg"; | |
759 | dmas = <&edma0 1 38>, | |
760 | <&edma0 1 39>; | |
761 | dma-names = "rx","tx"; | |
762 | status = "disabled"; | |
763 | }; | |
efb45b30 | 764 | }; |
0aa8a996 SM |
765 | |
766 | iio-hwmon { | |
767 | compatible = "iio-hwmon"; | |
768 | io-channels = <&adc0 16>, <&adc1 16>; | |
769 | }; | |
efb45b30 SA |
770 | }; |
771 | }; |