[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / vfxxx.dtsi

/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include "vf610-pinfunc.h"
#include <dt-bindings/clock/vf610-clock.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	aliases {
		can0 = &can0;
		can1 = &can1;
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		serial4 = &uart4;
		serial5 = &uart5;
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		gpio4 = &gpio4;
		usbphy0 = &usbphy0;
		usbphy1 = &usbphy1;
	};

	fxosc: fxosc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24000000>;
	};

	sxosc: sxosc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <32768>;
	};

	reboot: syscon-reboot {
		compatible = "syscon-reboot";
		regmap = <&src>;
		offset = <0x0>;
		mask = <0x1000>;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		ranges;

		aips0: aips-bus@40000000 {
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			edma0: dma-controller@40018000 {
				#dma-cells = <2>;
				compatible = "fsl,vf610-edma";
				reg = <0x40018000 0x2000>,
					<0x40024000 0x1000>,
					<0x40025000 0x1000>;
				dma-channels = <32>;
				clock-names = "dmamux0", "dmamux1";
				clocks = <&clks VF610_CLK_DMAMUX0>,
					<&clks VF610_CLK_DMAMUX1>;
				status = "disabled";
			};

			can0: flexcan@40020000 {
				compatible = "fsl,vf610-flexcan";
				reg = <0x40020000 0x4000>;
				clocks = <&clks VF610_CLK_FLEXCAN0>,
					 <&clks VF610_CLK_FLEXCAN0>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart0: serial@40027000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40027000 0x1000>;
				clocks = <&clks VF610_CLK_UART0>;
				clock-names = "ipg";
				dmas = <&edma0 0 2>,
					<&edma0 0 3>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart1: serial@40028000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40028000 0x1000>;
				clocks = <&clks VF610_CLK_UART1>;
				clock-names = "ipg";
				dmas = <&edma0 0 4>,
					<&edma0 0 5>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart2: serial@40029000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40029000 0x1000>;
				clocks = <&clks VF610_CLK_UART2>;
				clock-names = "ipg";
				dmas = <&edma0 0 6>,
					<&edma0 0 7>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart3: serial@4002a000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x4002a000 0x1000>;
				clocks = <&clks VF610_CLK_UART3>;
				clock-names = "ipg";
				dmas = <&edma0 0 8>,
					<&edma0 0 9>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			dspi0: dspi0@4002c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x4002c000 0x1000>;
				clocks = <&clks VF610_CLK_DSPI0>;
				clock-names = "dspi";
				spi-num-chipselects = <5>;
				status = "disabled";
			};

			dspi1: dspi1@4002d000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x4002d000 0x1000>;
				clocks = <&clks VF610_CLK_DSPI1>;
				clock-names = "dspi";
				spi-num-chipselects = <5>;
				status = "disabled";
			};

			sai2: sai@40031000 {
				compatible = "fsl,vf610-sai";
				reg = <0x40031000 0x1000>;
				clocks = <&clks VF610_CLK_SAI2>;
				clock-names = "sai";
				dma-names = "tx", "rx";
				dmas = <&edma0 0 21>,
					<&edma0 0 20>;
				status = "disabled";
			};

			pit: pit@40037000 {
				compatible = "fsl,vf610-pit";
				reg = <0x40037000 0x1000>;
				clocks = <&clks VF610_CLK_PIT>;
				clock-names = "pit";
			};

			pwm0: pwm@40038000 {
				compatible = "fsl,vf610-ftm-pwm";
				#pwm-cells = <3>;
				reg = <0x40038000 0x1000>;
				clock-names = "ftm_sys", "ftm_ext",
					      "ftm_fix", "ftm_cnt_clk_en";
				clocks = <&clks VF610_CLK_FTM0>,
					<&clks VF610_CLK_FTM0_EXT_SEL>,
					<&clks VF610_CLK_FTM0_FIX_SEL>,
					<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
				status = "disabled";
			};

			pwm1: pwm@40039000 {
				compatible = "fsl,vf610-ftm-pwm";
				#pwm-cells = <3>;
				reg = <0x40039000 0x1000>;
				clock-names = "ftm_sys", "ftm_ext",
					      "ftm_fix", "ftm_cnt_clk_en";
				clocks = <&clks VF610_CLK_FTM1>,
					<&clks VF610_CLK_FTM1_EXT_SEL>,
					<&clks VF610_CLK_FTM1_FIX_SEL>,
					<&clks VF610_CLK_FTM1_EXT_FIX_EN>;
				status = "disabled";
			};

			adc0: adc@4003b000 {
				compatible = "fsl,vf610-adc";
				reg = <0x4003b000 0x1000>;
				clocks = <&clks VF610_CLK_ADC0>;
				clock-names = "adc";
				status = "disabled";
			};

			wdoga5: wdog@4003e000 {
				compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
				reg = <0x4003e000 0x1000>;
				clocks = <&clks VF610_CLK_WDT>;
				clock-names = "wdog";
				status = "disabled";
			};

			qspi0: quadspi@40044000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-qspi";
				reg = <0x40044000 0x1000>;
				clocks = <&clks VF610_CLK_QSPI0_EN>,
					<&clks VF610_CLK_QSPI0>;
				clock-names = "qspi_en", "qspi";
				status = "disabled";
			};

			iomuxc: iomuxc@40048000 {
				compatible = "fsl,vf610-iomuxc";
				reg = <0x40048000 0x1000>;
			};

			gpio0: gpio@40049000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x40049000 0x1000 0x400ff000 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 0 32>;
			};

			gpio1: gpio@4004a000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004a000 0x1000 0x400ff040 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 32 32>;
			};

			gpio2: gpio@4004b000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004b000 0x1000 0x400ff080 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 64 32>;
			};

			gpio3: gpio@4004c000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 96 32>;
			};

			gpio4: gpio@4004d000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004d000 0x1000 0x400ff100 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 128 7>;
			};

			anatop: anatop@40050000 {
				compatible = "fsl,vf610-anatop", "syscon";
				reg = <0x40050000 0x400>;
			};

			usbphy0: usbphy@40050800 {
				compatible = "fsl,vf610-usbphy";
				reg = <0x40050800 0x400>;
				clocks = <&clks VF610_CLK_USBPHY0>;
				fsl,anatop = <&anatop>;
				status = "disabled";
			};

			usbphy1: usbphy@40050c00 {
				compatible = "fsl,vf610-usbphy";
				reg = <0x40050c00 0x400>;
				clocks = <&clks VF610_CLK_USBPHY1>;
				fsl,anatop = <&anatop>;
				status = "disabled";
			};

			i2c0: i2c@40066000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x40066000 0x1000>;
				clocks = <&clks VF610_CLK_I2C0>;
				clock-names = "ipg";
				dmas = <&edma0 0 50>,
					<&edma0 0 51>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			clks: ccm@4006b000 {
				compatible = "fsl,vf610-ccm";
				reg = <0x4006b000 0x1000>;
				clocks = <&sxosc>, <&fxosc>;
				clock-names = "sxosc", "fxosc";
				#clock-cells = <1>;
			};

			usbdev0: usb@40034000 {
				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
				reg = <0x40034000 0x800>;
				clocks = <&clks VF610_CLK_USBC0>;
				fsl,usbphy = <&usbphy0>;
				fsl,usbmisc = <&usbmisc0 0>;
				dr_mode = "peripheral";
				status = "disabled";
			};

			usbmisc0: usb@40034800 {
				#index-cells = <1>;
				compatible = "fsl,vf610-usbmisc";
				reg = <0x40034800 0x200>;
				clocks = <&clks VF610_CLK_USBC0>;
				status = "disabled";
			};

			src: src@4006e000 {
				compatible = "fsl,vf610-src", "syscon";
				reg = <0x4006e000 0x1000>;
			};
		};

		aips1: aips-bus@40080000 {
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			edma1: dma-controller@40098000 {
				#dma-cells = <2>;
				compatible = "fsl,vf610-edma";
				reg = <0x40098000 0x2000>,
					<0x400a1000 0x1000>,
					<0x400a2000 0x1000>;
				dma-channels = <32>;
				clock-names = "dmamux0", "dmamux1";
				clocks = <&clks VF610_CLK_DMAMUX2>,
					<&clks VF610_CLK_DMAMUX3>;
				status = "disabled";
			};

			snvs0: snvs@400a7000 {
			    compatible = "fsl,sec-v4.0-mon", "simple-bus";
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x400a7000 0x2000>;

				snvsrtc: snvs-rtc-lp@34 {
					compatible = "fsl,sec-v4.0-mon-rtc-lp";
					reg = <0x34 0x58>;
					clocks = <&clks VF610_CLK_SNVS>;
					clock-names = "snvs-rtc";
				};
			};

			uart4: serial@400a9000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x400a9000 0x1000>;
				clocks = <&clks VF610_CLK_UART4>;
				clock-names = "ipg";
				status = "disabled";
			};

			uart5: serial@400aa000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x400aa000 0x1000>;
				clocks = <&clks VF610_CLK_UART5>;
				clock-names = "ipg";
				status = "disabled";
			};

			adc1: adc@400bb000 {
				compatible = "fsl,vf610-adc";
				reg = <0x400bb000 0x1000>;
				clocks = <&clks VF610_CLK_ADC1>;
				clock-names = "adc";
				status = "disabled";
			};

			esdhc1: esdhc@400b2000 {
				compatible = "fsl,imx53-esdhc";
				reg = <0x400b2000 0x1000>;
				clocks = <&clks VF610_CLK_IPG_BUS>,
					<&clks VF610_CLK_PLATFORM_BUS>,
					<&clks VF610_CLK_ESDHC1>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			usbh1: usb@400b4000 {
				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
				reg = <0x400b4000 0x800>;
				clocks = <&clks VF610_CLK_USBC1>;
				fsl,usbphy = <&usbphy1>;
				fsl,usbmisc = <&usbmisc1 0>;
				dr_mode = "host";
				status = "disabled";
			};

			usbmisc1: usb@400b4800 {
				#index-cells = <1>;
				compatible = "fsl,vf610-usbmisc";
				reg = <0x400b4800 0x200>;
				clocks = <&clks VF610_CLK_USBC1>;
				status = "disabled";
			};

			ftm: ftm@400b8000 {
				compatible = "fsl,ftm-timer";
				reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
				clock-names = "ftm-evt", "ftm-src",
					"ftm-evt-counter-en", "ftm-src-counter-en";
				clocks = <&clks VF610_CLK_FTM2>,
					<&clks VF610_CLK_FTM3>,
					<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
					<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
				status = "disabled";
			};

			fec0: ethernet@400d0000 {
				compatible = "fsl,mvf600-fec";
				reg = <0x400d0000 0x1000>;
				clocks = <&clks VF610_CLK_ENET0>,
					<&clks VF610_CLK_ENET0>,
					<&clks VF610_CLK_ENET>;
				clock-names = "ipg", "ahb", "ptp";
				status = "disabled";
			};

			fec1: ethernet@400d1000 {
				compatible = "fsl,mvf600-fec";
				reg = <0x400d1000 0x1000>;
				clocks = <&clks VF610_CLK_ENET1>,
					<&clks VF610_CLK_ENET1>,
					<&clks VF610_CLK_ENET>;
				clock-names = "ipg", "ahb", "ptp";
				status = "disabled";
			};

			can1: flexcan@400d4000 {
				compatible = "fsl,vf610-flexcan";
				reg = <0x400d4000 0x4000>;
				clocks = <&clks VF610_CLK_FLEXCAN1>,
					 <&clks VF610_CLK_FLEXCAN1>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

		};
	};
};
Commit	Line	Data
efb45b30 SA	1	/*
	2	* Copyright 2013 Freescale Semiconductor, Inc.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*/
	9
	10	#include "vf610-pinfunc.h"
	11	#include <dt-bindings/clock/vf610-clock.h>
	12	#include <dt-bindings/interrupt-controller/irq.h>
2b36bda3	13	#include <dt-bindings/gpio/gpio.h>
efb45b30 SA	14
	15	/ {
	16	aliases {
	17	can0 = &can0;
	18	can1 = &can1;
	19	serial0 = &uart0;
	20	serial1 = &uart1;
	21	serial2 = &uart2;
	22	serial3 = &uart3;
	23	serial4 = &uart4;
	24	serial5 = &uart5;
76713954 SA	25	gpio0 = &gpio0;
	26	gpio1 = &gpio1;
	27	gpio2 = &gpio2;
	28	gpio3 = &gpio3;
	29	gpio4 = &gpio4;
efb45b30 SA	30	usbphy0 = &usbphy0;
	31	usbphy1 = &usbphy1;
	32	};
	33
	34	fxosc: fxosc {
	35	compatible = "fixed-clock";
	36	#clock-cells = <0>;
	37	clock-frequency = <24000000>;
	38	};
	39
	40	sxosc: sxosc {
	41	compatible = "fixed-clock";
	42	#clock-cells = <0>;
	43	clock-frequency = <32768>;
	44	};
	45
0d018d73 SA	46	reboot: syscon-reboot {
	47	compatible = "syscon-reboot";
	48	regmap = <&src>;
	49	offset = <0x0>;
	50	mask = <0x1000>;
	51	};
	52
efb45b30 SA	53	soc {
	54	#address-cells = <1>;
	55	#size-cells = <1>;
	56	compatible = "simple-bus";
	57	ranges;
	58
	59	aips0: aips-bus@40000000 {
	60	compatible = "fsl,aips-bus", "simple-bus";
	61	#address-cells = <1>;
	62	#size-cells = <1>;
	63	ranges;
	64
	65	edma0: dma-controller@40018000 {
	66	#dma-cells = <2>;
	67	compatible = "fsl,vf610-edma";
	68	reg = <0x40018000 0x2000>,
	69	<0x40024000 0x1000>,
	70	<0x40025000 0x1000>;
	71	dma-channels = <32>;
	72	clock-names = "dmamux0", "dmamux1";
	73	clocks = <&clks VF610_CLK_DMAMUX0>,
	74	<&clks VF610_CLK_DMAMUX1>;
	75	status = "disabled";
	76	};
	77
	78	can0: flexcan@40020000 {
	79	compatible = "fsl,vf610-flexcan";
	80	reg = <0x40020000 0x4000>;
	81	clocks = <&clks VF610_CLK_FLEXCAN0>,
	82	<&clks VF610_CLK_FLEXCAN0>;
	83	clock-names = "ipg", "per";
	84	status = "disabled";
	85	};
	86
	87	uart0: serial@40027000 {
	88	compatible = "fsl,vf610-lpuart";
	89	reg = <0x40027000 0x1000>;
	90	clocks = <&clks VF610_CLK_UART0>;
	91	clock-names = "ipg";
	92	dmas = <&edma0 0 2>,
	93	<&edma0 0 3>;
	94	dma-names = "rx","tx";
	95	status = "disabled";
	96	};
	97
	98	uart1: serial@40028000 {
	99	compatible = "fsl,vf610-lpuart";
	100	reg = <0x40028000 0x1000>;
	101	clocks = <&clks VF610_CLK_UART1>;
	102	clock-names = "ipg";
	103	dmas = <&edma0 0 4>,
	104	<&edma0 0 5>;
	105	dma-names = "rx","tx";
	106	status = "disabled";
	107	};
	108
	109	uart2: serial@40029000 {
	110	compatible = "fsl,vf610-lpuart";
	111	reg = <0x40029000 0x1000>;
	112	clocks = <&clks VF610_CLK_UART2>;
	113	clock-names = "ipg";
	114	dmas = <&edma0 0 6>,
	115	<&edma0 0 7>;
	116	dma-names = "rx","tx";
117	status = "disabled";
118	};
119
120	uart3: serial@4002a000 {
121	compatible = "fsl,vf610-lpuart";
122	reg = <0x4002a000 0x1000>;
123	clocks = <&clks VF610_CLK_UART3>;
124	clock-names = "ipg";
125	dmas = <&edma0 0 8>,
126	<&edma0 0 9>;
127	dma-names = "rx","tx";
128	status = "disabled";
129	};
130
131	dspi0: dspi0@4002c000 {
132	#address-cells = <1>;
133	#size-cells = <0>;
134	compatible = "fsl,vf610-dspi";
135	reg = <0x4002c000 0x1000>;
136	clocks = <&clks VF610_CLK_DSPI0>;
137	clock-names = "dspi";
138	spi-num-chipselects = <5>;
139	status = "disabled";
140	};
141
1b545c17 BD	142	dspi1: dspi1@4002d000 {
	143	#address-cells = <1>;
	144	#size-cells = <0>;
	145	compatible = "fsl,vf610-dspi";
	146	reg = <0x4002d000 0x1000>;
	147	clocks = <&clks VF610_CLK_DSPI1>;
	148	clock-names = "dspi";
	149	spi-num-chipselects = <5>;
	150	status = "disabled";
	151	};
	152
efb45b30 SA	153	sai2: sai@40031000 {
	154	compatible = "fsl,vf610-sai";
	155	reg = <0x40031000 0x1000>;
	156	clocks = <&clks VF610_CLK_SAI2>;
	157	clock-names = "sai";
	158	dma-names = "tx", "rx";
	159	dmas = <&edma0 0 21>,
	160	<&edma0 0 20>;
	161	status = "disabled";
	162	};
	163
	164	pit: pit@40037000 {
	165	compatible = "fsl,vf610-pit";
	166	reg = <0x40037000 0x1000>;
	167	clocks = <&clks VF610_CLK_PIT>;
	168	clock-names = "pit";
	169	};
	170
	171	pwm0: pwm@40038000 {
	172	compatible = "fsl,vf610-ftm-pwm";
	173	#pwm-cells = <3>;
	174	reg = <0x40038000 0x1000>;
	175	clock-names = "ftm_sys", "ftm_ext",
	176	"ftm_fix", "ftm_cnt_clk_en";
	177	clocks = <&clks VF610_CLK_FTM0>,
	178	<&clks VF610_CLK_FTM0_EXT_SEL>,
	179	<&clks VF610_CLK_FTM0_FIX_SEL>,
	180	<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
	181	status = "disabled";
	182	};
	183
	184	pwm1: pwm@40039000 {
	185	compatible = "fsl,vf610-ftm-pwm";
	186	#pwm-cells = <3>;
	187	reg = <0x40039000 0x1000>;
	188	clock-names = "ftm_sys", "ftm_ext",
	189	"ftm_fix", "ftm_cnt_clk_en";
	190	clocks = <&clks VF610_CLK_FTM1>,
	191	<&clks VF610_CLK_FTM1_EXT_SEL>,
	192	<&clks VF610_CLK_FTM1_FIX_SEL>,
	193	<&clks VF610_CLK_FTM1_EXT_FIX_EN>;
	194	status = "disabled";
	195	};
	196
	197	adc0: adc@4003b000 {
	198	compatible = "fsl,vf610-adc";
	199	reg = <0x4003b000 0x1000>;
	200	clocks = <&clks VF610_CLK_ADC0>;
	201	clock-names = "adc";
	202	status = "disabled";
	203	};
	204
c134e09f	205	wdoga5: wdog@4003e000 {
efb45b30 SA	206	compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
	207	reg = <0x4003e000 0x1000>;
	208	clocks = <&clks VF610_CLK_WDT>;
	209	clock-names = "wdog";
	210	status = "disabled";
	211	};
	212
	213	qspi0: quadspi@40044000 {
	214	#address-cells = <1>;
	215	#size-cells = <0>;
	216	compatible = "fsl,vf610-qspi";
	217	reg = <0x40044000 0x1000>;
	218	clocks = <&clks VF610_CLK_QSPI0_EN>,
	219	<&clks VF610_CLK_QSPI0>;
	220	clock-names = "qspi_en", "qspi";
	221	status = "disabled";
	222	};
	223
	224	iomuxc: iomuxc@40048000 {
	225	compatible = "fsl,vf610-iomuxc";
	226	reg = <0x40048000 0x1000>;
efb45b30 SA	227	};
efb45b30 SA	228
76713954	229	gpio0: gpio@40049000 {
efb45b30 SA	230	compatible = "fsl,vf610-gpio";
	231	reg = <0x40049000 0x1000 0x400ff000 0x40>;
	232	gpio-controller;
	233	#gpio-cells = <2>;
	234	interrupt-controller;
	235	#interrupt-cells = <2>;
	236	gpio-ranges = <&iomuxc 0 0 32>;
	237	};
	238
76713954	239	gpio1: gpio@4004a000 {
efb45b30 SA	240	compatible = "fsl,vf610-gpio";
	241	reg = <0x4004a000 0x1000 0x400ff040 0x40>;
	242	gpio-controller;
	243	#gpio-cells = <2>;
	244	interrupt-controller;
	245	#interrupt-cells = <2>;
	246	gpio-ranges = <&iomuxc 0 32 32>;
	247	};
	248
76713954	249	gpio2: gpio@4004b000 {
efb45b30 SA	250	compatible = "fsl,vf610-gpio";
	251	reg = <0x4004b000 0x1000 0x400ff080 0x40>;
	252	gpio-controller;
	253	#gpio-cells = <2>;
	254	interrupt-controller;
	255	#interrupt-cells = <2>;
	256	gpio-ranges = <&iomuxc 0 64 32>;
	257	};
	258
76713954	259	gpio3: gpio@4004c000 {
efb45b30 SA	260	compatible = "fsl,vf610-gpio";
	261	reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
	262	gpio-controller;
	263	#gpio-cells = <2>;
	264	interrupt-controller;
	265	#interrupt-cells = <2>;
	266	gpio-ranges = <&iomuxc 0 96 32>;
	267	};
	268
76713954	269	gpio4: gpio@4004d000 {
efb45b30 SA	270	compatible = "fsl,vf610-gpio";
	271	reg = <0x4004d000 0x1000 0x400ff100 0x40>;
	272	gpio-controller;
	273	#gpio-cells = <2>;
	274	interrupt-controller;
	275	#interrupt-cells = <2>;
	276	gpio-ranges = <&iomuxc 0 128 7>;
	277	};
	278
	279	anatop: anatop@40050000 {
	280	compatible = "fsl,vf610-anatop", "syscon";
	281	reg = <0x40050000 0x400>;
	282	};
	283
	284	usbphy0: usbphy@40050800 {
	285	compatible = "fsl,vf610-usbphy";
	286	reg = <0x40050800 0x400>;
	287	clocks = <&clks VF610_CLK_USBPHY0>;
	288	fsl,anatop = <&anatop>;
	289	status = "disabled";
	290	};
	291
	292	usbphy1: usbphy@40050c00 {
	293	compatible = "fsl,vf610-usbphy";
	294	reg = <0x40050c00 0x400>;
	295	clocks = <&clks VF610_CLK_USBPHY1>;
	296	fsl,anatop = <&anatop>;
	297	status = "disabled";
	298	};
	299
	300	i2c0: i2c@40066000 {
	301	#address-cells = <1>;
	302	#size-cells = <0>;
	303	compatible = "fsl,vf610-i2c";
	304	reg = <0x40066000 0x1000>;
	305	clocks = <&clks VF610_CLK_I2C0>;
	306	clock-names = "ipg";
	307	dmas = <&edma0 0 50>,
	308	<&edma0 0 51>;
	309	dma-names = "rx","tx";
	310	status = "disabled";
	311	};
	312
	313	clks: ccm@4006b000 {
	314	compatible = "fsl,vf610-ccm";
	315	reg = <0x4006b000 0x1000>;
	316	clocks = <&sxosc>, <&fxosc>;
	317	clock-names = "sxosc", "fxosc";
	318	#clock-cells = <1>;
	319	};
	320
	321	usbdev0: usb@40034000 {
	322	compatible = "fsl,vf610-usb", "fsl,imx27-usb";
	323	reg = <0x40034000 0x800>;
	324	clocks = <&clks VF610_CLK_USBC0>;
	325	fsl,usbphy = <&usbphy0>;
	326	fsl,usbmisc = <&usbmisc0 0>;
	327	dr_mode = "peripheral";
	328	status = "disabled";
	329	};
	330
	331	usbmisc0: usb@40034800 {
	332	#index-cells = <1>;
	333	compatible = "fsl,vf610-usbmisc";
334	reg = <0x40034800 0x200>;
335	clocks = <&clks VF610_CLK_USBC0>;
336	status = "disabled";
337	};
0d018d73 SA	338
	339	src: src@4006e000 {
	340	compatible = "fsl,vf610-src", "syscon";
	341	reg = <0x4006e000 0x1000>;
	342	};
efb45b30 SA	343	};
	344
	345	aips1: aips-bus@40080000 {
	346	compatible = "fsl,aips-bus", "simple-bus";
	347	#address-cells = <1>;
	348	#size-cells = <1>;
	349	ranges;
	350
	351	edma1: dma-controller@40098000 {
	352	#dma-cells = <2>;
	353	compatible = "fsl,vf610-edma";
	354	reg = <0x40098000 0x2000>,
	355	<0x400a1000 0x1000>,
	356	<0x400a2000 0x1000>;
	357	dma-channels = <32>;
	358	clock-names = "dmamux0", "dmamux1";
	359	clocks = <&clks VF610_CLK_DMAMUX2>,
	360	<&clks VF610_CLK_DMAMUX3>;
	361	status = "disabled";
	362	};
	363
8455dd0d SM	364	snvs0: snvs@400a7000 {
	365	compatible = "fsl,sec-v4.0-mon", "simple-bus";
	366	#address-cells = <1>;
	367	#size-cells = <1>;
	368	ranges = <0 0x400a7000 0x2000>;
	369
	370	snvsrtc: snvs-rtc-lp@34 {
	371	compatible = "fsl,sec-v4.0-mon-rtc-lp";
	372	reg = <0x34 0x58>;
	373	clocks = <&clks VF610_CLK_SNVS>;
	374	clock-names = "snvs-rtc";
	375	};
	376	};
	377
efb45b30 SA	378	uart4: serial@400a9000 {
	379	compatible = "fsl,vf610-lpuart";
	380	reg = <0x400a9000 0x1000>;
	381	clocks = <&clks VF610_CLK_UART4>;
	382	clock-names = "ipg";
	383	status = "disabled";
	384	};
	385
	386	uart5: serial@400aa000 {
	387	compatible = "fsl,vf610-lpuart";
	388	reg = <0x400aa000 0x1000>;
	389	clocks = <&clks VF610_CLK_UART5>;
	390	clock-names = "ipg";
	391	status = "disabled";
	392	};
	393
	394	adc1: adc@400bb000 {
	395	compatible = "fsl,vf610-adc";
	396	reg = <0x400bb000 0x1000>;
	397	clocks = <&clks VF610_CLK_ADC1>;
	398	clock-names = "adc";
	399	status = "disabled";
	400	};
	401
	402	esdhc1: esdhc@400b2000 {
	403	compatible = "fsl,imx53-esdhc";
	404	reg = <0x400b2000 0x1000>;
	405	clocks = <&clks VF610_CLK_IPG_BUS>,
	406	<&clks VF610_CLK_PLATFORM_BUS>,
	407	<&clks VF610_CLK_ESDHC1>;
	408	clock-names = "ipg", "ahb", "per";
	409	status = "disabled";
	410	};
	411
	412	usbh1: usb@400b4000 {
	413	compatible = "fsl,vf610-usb", "fsl,imx27-usb";
	414	reg = <0x400b4000 0x800>;
	415	clocks = <&clks VF610_CLK_USBC1>;
	416	fsl,usbphy = <&usbphy1>;
	417	fsl,usbmisc = <&usbmisc1 0>;
	418	dr_mode = "host";
	419	status = "disabled";
	420	};
	421
	422	usbmisc1: usb@400b4800 {
	423	#index-cells = <1>;
	424	compatible = "fsl,vf610-usbmisc";
	425	reg = <0x400b4800 0x200>;
	426	clocks = <&clks VF610_CLK_USBC1>;
	427	status = "disabled";
	428	};
	429
	430	ftm: ftm@400b8000 {
	431	compatible = "fsl,ftm-timer";
	432	reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
	433	clock-names = "ftm-evt", "ftm-src",
	434	"ftm-evt-counter-en", "ftm-src-counter-en";
	435	clocks = <&clks VF610_CLK_FTM2>,
	436	<&clks VF610_CLK_FTM3>,
	437	<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
	438	<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
	439	status = "disabled";
	440	};
	441
442	fec0: ethernet@400d0000 {
443	compatible = "fsl,mvf600-fec";
444	reg = <0x400d0000 0x1000>;
445	clocks = <&clks VF610_CLK_ENET0>,
446	<&clks VF610_CLK_ENET0>,
447	<&clks VF610_CLK_ENET>;
448	clock-names = "ipg", "ahb", "ptp";
449	status = "disabled";
450	};
451
452	fec1: ethernet@400d1000 {
453	compatible = "fsl,mvf600-fec";
454	reg = <0x400d1000 0x1000>;
455	clocks = <&clks VF610_CLK_ENET1>,
456	<&clks VF610_CLK_ENET1>,
457	<&clks VF610_CLK_ENET>;
458	clock-names = "ipg", "ahb", "ptp";
459	status = "disabled";
460	};
461
462	can1: flexcan@400d4000 {
463	compatible = "fsl,vf610-flexcan";
464	reg = <0x400d4000 0x4000>;
465	clocks = <&clks VF610_CLK_FLEXCAN1>,
466	<&clks VF610_CLK_FLEXCAN1>;
467	clock-names = "ipg", "per";
468	status = "disabled";
469	};
470
471	};
472	};
473	};