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1da177e4 | 1 | /* |
f30c2269 | 2 | * linux/arch/arm/common/sa1111.c |
1da177e4 LT |
3 | * |
4 | * SA1111 support | |
5 | * | |
6 | * Original code by John Dorsey | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This file contains all generic SA1111 support. | |
13 | * | |
14 | * All initialization functions provided here are intended to be called | |
15 | * from machine specific code with proper arguments when required. | |
16 | */ | |
1da177e4 LT |
17 | #include <linux/module.h> |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/delay.h> | |
1da177e4 LT |
21 | #include <linux/errno.h> |
22 | #include <linux/ioport.h> | |
d052d1be | 23 | #include <linux/platform_device.h> |
1da177e4 LT |
24 | #include <linux/slab.h> |
25 | #include <linux/spinlock.h> | |
26 | #include <linux/dma-mapping.h> | |
97d654f8 | 27 | #include <linux/clk.h> |
1da177e4 LT |
28 | |
29 | #include <asm/hardware.h> | |
30 | #include <asm/mach-types.h> | |
31 | #include <asm/io.h> | |
32 | #include <asm/irq.h> | |
33 | #include <asm/mach/irq.h> | |
45e109d0 | 34 | #include <asm/sizes.h> |
1da177e4 LT |
35 | |
36 | #include <asm/hardware/sa1111.h> | |
37 | ||
1da177e4 LT |
38 | extern void __init sa1110_mb_enable(void); |
39 | ||
40 | /* | |
41 | * We keep the following data for the overall SA1111. Note that the | |
42 | * struct device and struct resource are "fake"; they should be supplied | |
43 | * by the bus above us. However, in the interests of getting all SA1111 | |
44 | * drivers converted over to the device model, we provide this as an | |
45 | * anchor point for all the other drivers. | |
46 | */ | |
47 | struct sa1111 { | |
48 | struct device *dev; | |
97d654f8 | 49 | struct clk *clk; |
1da177e4 LT |
50 | unsigned long phys; |
51 | int irq; | |
52 | spinlock_t lock; | |
53 | void __iomem *base; | |
54 | }; | |
55 | ||
56 | /* | |
57 | * We _really_ need to eliminate this. Its only users | |
58 | * are the PWM and DMA checking code. | |
59 | */ | |
60 | static struct sa1111 *g_sa1111; | |
61 | ||
62 | struct sa1111_dev_info { | |
63 | unsigned long offset; | |
64 | unsigned long skpcr_mask; | |
65 | unsigned int devid; | |
66 | unsigned int irq[6]; | |
67 | }; | |
68 | ||
69 | static struct sa1111_dev_info sa1111_devices[] = { | |
70 | { | |
71 | .offset = SA1111_USB, | |
72 | .skpcr_mask = SKPCR_UCLKEN, | |
73 | .devid = SA1111_DEVID_USB, | |
74 | .irq = { | |
75 | IRQ_USBPWR, | |
76 | IRQ_HCIM, | |
77 | IRQ_HCIBUFFACC, | |
78 | IRQ_HCIRMTWKP, | |
79 | IRQ_NHCIMFCIR, | |
80 | IRQ_USB_PORT_RESUME | |
81 | }, | |
82 | }, | |
83 | { | |
84 | .offset = 0x0600, | |
85 | .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN, | |
86 | .devid = SA1111_DEVID_SAC, | |
87 | .irq = { | |
88 | AUDXMTDMADONEA, | |
89 | AUDXMTDMADONEB, | |
90 | AUDRCVDMADONEA, | |
91 | AUDRCVDMADONEB | |
92 | }, | |
93 | }, | |
94 | { | |
95 | .offset = 0x0800, | |
96 | .skpcr_mask = SKPCR_SCLKEN, | |
97 | .devid = SA1111_DEVID_SSP, | |
98 | }, | |
99 | { | |
100 | .offset = SA1111_KBD, | |
101 | .skpcr_mask = SKPCR_PTCLKEN, | |
102 | .devid = SA1111_DEVID_PS2, | |
103 | .irq = { | |
104 | IRQ_TPRXINT, | |
105 | IRQ_TPTXINT | |
106 | }, | |
107 | }, | |
108 | { | |
109 | .offset = SA1111_MSE, | |
110 | .skpcr_mask = SKPCR_PMCLKEN, | |
111 | .devid = SA1111_DEVID_PS2, | |
112 | .irq = { | |
113 | IRQ_MSRXINT, | |
114 | IRQ_MSTXINT | |
115 | }, | |
116 | }, | |
117 | { | |
118 | .offset = 0x1800, | |
119 | .skpcr_mask = 0, | |
120 | .devid = SA1111_DEVID_PCMCIA, | |
121 | .irq = { | |
122 | IRQ_S0_READY_NINT, | |
123 | IRQ_S0_CD_VALID, | |
124 | IRQ_S0_BVD1_STSCHG, | |
125 | IRQ_S1_READY_NINT, | |
126 | IRQ_S1_CD_VALID, | |
127 | IRQ_S1_BVD1_STSCHG, | |
128 | }, | |
129 | }, | |
130 | }; | |
131 | ||
1b12050f RK |
132 | void __init sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes) |
133 | { | |
134 | unsigned int sz = SZ_1M >> PAGE_SHIFT; | |
135 | ||
136 | if (node != 0) | |
137 | sz = 0; | |
138 | ||
139 | size[1] = size[0] - sz; | |
140 | size[0] = sz; | |
141 | } | |
142 | ||
1da177e4 LT |
143 | /* |
144 | * SA1111 interrupt support. Since clearing an IRQ while there are | |
145 | * active IRQs causes the interrupt output to pulse, the upper levels | |
146 | * will call us again if there are more interrupts to process. | |
147 | */ | |
148 | static void | |
10dd5ce2 | 149 | sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) |
1da177e4 LT |
150 | { |
151 | unsigned int stat0, stat1, i; | |
c4bfa28a | 152 | void __iomem *base = get_irq_data(irq); |
1da177e4 LT |
153 | |
154 | stat0 = sa1111_readl(base + SA1111_INTSTATCLR0); | |
155 | stat1 = sa1111_readl(base + SA1111_INTSTATCLR1); | |
156 | ||
157 | sa1111_writel(stat0, base + SA1111_INTSTATCLR0); | |
158 | ||
159 | desc->chip->ack(irq); | |
160 | ||
161 | sa1111_writel(stat1, base + SA1111_INTSTATCLR1); | |
162 | ||
163 | if (stat0 == 0 && stat1 == 0) { | |
0cd61b68 | 164 | do_bad_IRQ(irq, desc); |
1da177e4 LT |
165 | return; |
166 | } | |
167 | ||
168 | for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1) | |
169 | if (stat0 & 1) | |
0cd61b68 | 170 | handle_edge_irq(i, irq_desc + i); |
1da177e4 LT |
171 | |
172 | for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1) | |
173 | if (stat1 & 1) | |
0cd61b68 | 174 | handle_edge_irq(i, irq_desc + i); |
1da177e4 LT |
175 | |
176 | /* For level-based interrupts */ | |
177 | desc->chip->unmask(irq); | |
178 | } | |
179 | ||
180 | #define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START)) | |
181 | #define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32)) | |
182 | ||
183 | static void sa1111_ack_irq(unsigned int irq) | |
184 | { | |
185 | } | |
186 | ||
187 | static void sa1111_mask_lowirq(unsigned int irq) | |
188 | { | |
10dd5ce2 | 189 | void __iomem *mapbase = get_irq_chip_data(irq); |
1da177e4 LT |
190 | unsigned long ie0; |
191 | ||
192 | ie0 = sa1111_readl(mapbase + SA1111_INTEN0); | |
193 | ie0 &= ~SA1111_IRQMASK_LO(irq); | |
194 | writel(ie0, mapbase + SA1111_INTEN0); | |
195 | } | |
196 | ||
197 | static void sa1111_unmask_lowirq(unsigned int irq) | |
198 | { | |
10dd5ce2 | 199 | void __iomem *mapbase = get_irq_chip_data(irq); |
1da177e4 LT |
200 | unsigned long ie0; |
201 | ||
202 | ie0 = sa1111_readl(mapbase + SA1111_INTEN0); | |
203 | ie0 |= SA1111_IRQMASK_LO(irq); | |
204 | sa1111_writel(ie0, mapbase + SA1111_INTEN0); | |
205 | } | |
206 | ||
207 | /* | |
208 | * Attempt to re-trigger the interrupt. The SA1111 contains a register | |
209 | * (INTSET) which claims to do this. However, in practice no amount of | |
210 | * manipulation of INTEN and INTSET guarantees that the interrupt will | |
211 | * be triggered. In fact, its very difficult, if not impossible to get | |
212 | * INTSET to re-trigger the interrupt. | |
213 | */ | |
214 | static int sa1111_retrigger_lowirq(unsigned int irq) | |
215 | { | |
216 | unsigned int mask = SA1111_IRQMASK_LO(irq); | |
10dd5ce2 | 217 | void __iomem *mapbase = get_irq_chip_data(irq); |
1da177e4 LT |
218 | unsigned long ip0; |
219 | int i; | |
220 | ||
221 | ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); | |
222 | for (i = 0; i < 8; i++) { | |
223 | sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0); | |
224 | sa1111_writel(ip0, mapbase + SA1111_INTPOL0); | |
225 | if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) | |
226 | break; | |
227 | } | |
228 | ||
229 | if (i == 8) | |
230 | printk(KERN_ERR "Danger Will Robinson: failed to " | |
231 | "re-trigger IRQ%d\n", irq); | |
232 | return i == 8 ? -1 : 0; | |
233 | } | |
234 | ||
235 | static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) | |
236 | { | |
237 | unsigned int mask = SA1111_IRQMASK_LO(irq); | |
10dd5ce2 | 238 | void __iomem *mapbase = get_irq_chip_data(irq); |
1da177e4 LT |
239 | unsigned long ip0; |
240 | ||
241 | if (flags == IRQT_PROBE) | |
242 | return 0; | |
243 | ||
244 | if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0) | |
245 | return -EINVAL; | |
246 | ||
247 | ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); | |
248 | if (flags & __IRQT_RISEDGE) | |
249 | ip0 &= ~mask; | |
250 | else | |
251 | ip0 |= mask; | |
252 | sa1111_writel(ip0, mapbase + SA1111_INTPOL0); | |
253 | sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0); | |
254 | ||
255 | return 0; | |
256 | } | |
257 | ||
258 | static int sa1111_wake_lowirq(unsigned int irq, unsigned int on) | |
259 | { | |
260 | unsigned int mask = SA1111_IRQMASK_LO(irq); | |
10dd5ce2 | 261 | void __iomem *mapbase = get_irq_chip_data(irq); |
1da177e4 LT |
262 | unsigned long we0; |
263 | ||
264 | we0 = sa1111_readl(mapbase + SA1111_WAKEEN0); | |
265 | if (on) | |
266 | we0 |= mask; | |
267 | else | |
268 | we0 &= ~mask; | |
269 | sa1111_writel(we0, mapbase + SA1111_WAKEEN0); | |
270 | ||
271 | return 0; | |
272 | } | |
273 | ||
38c677cb DB |
274 | static struct irq_chip sa1111_low_chip = { |
275 | .name = "SA1111-l", | |
1da177e4 LT |
276 | .ack = sa1111_ack_irq, |
277 | .mask = sa1111_mask_lowirq, | |
278 | .unmask = sa1111_unmask_lowirq, | |
279 | .retrigger = sa1111_retrigger_lowirq, | |
7801907b RK |
280 | .set_type = sa1111_type_lowirq, |
281 | .set_wake = sa1111_wake_lowirq, | |
1da177e4 LT |
282 | }; |
283 | ||
284 | static void sa1111_mask_highirq(unsigned int irq) | |
285 | { | |
10dd5ce2 | 286 | void __iomem *mapbase = get_irq_chip_data(irq); |
1da177e4 LT |
287 | unsigned long ie1; |
288 | ||
289 | ie1 = sa1111_readl(mapbase + SA1111_INTEN1); | |
290 | ie1 &= ~SA1111_IRQMASK_HI(irq); | |
291 | sa1111_writel(ie1, mapbase + SA1111_INTEN1); | |
292 | } | |
293 | ||
294 | static void sa1111_unmask_highirq(unsigned int irq) | |
295 | { | |
10dd5ce2 | 296 | void __iomem *mapbase = get_irq_chip_data(irq); |
1da177e4 LT |
297 | unsigned long ie1; |
298 | ||
299 | ie1 = sa1111_readl(mapbase + SA1111_INTEN1); | |
300 | ie1 |= SA1111_IRQMASK_HI(irq); | |
301 | sa1111_writel(ie1, mapbase + SA1111_INTEN1); | |
302 | } | |
303 | ||
304 | /* | |
305 | * Attempt to re-trigger the interrupt. The SA1111 contains a register | |
306 | * (INTSET) which claims to do this. However, in practice no amount of | |
307 | * manipulation of INTEN and INTSET guarantees that the interrupt will | |
308 | * be triggered. In fact, its very difficult, if not impossible to get | |
309 | * INTSET to re-trigger the interrupt. | |
310 | */ | |
311 | static int sa1111_retrigger_highirq(unsigned int irq) | |
312 | { | |
313 | unsigned int mask = SA1111_IRQMASK_HI(irq); | |
10dd5ce2 | 314 | void __iomem *mapbase = get_irq_chip_data(irq); |
1da177e4 LT |
315 | unsigned long ip1; |
316 | int i; | |
317 | ||
318 | ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); | |
319 | for (i = 0; i < 8; i++) { | |
320 | sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1); | |
321 | sa1111_writel(ip1, mapbase + SA1111_INTPOL1); | |
322 | if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) | |
323 | break; | |
324 | } | |
325 | ||
326 | if (i == 8) | |
327 | printk(KERN_ERR "Danger Will Robinson: failed to " | |
328 | "re-trigger IRQ%d\n", irq); | |
329 | return i == 8 ? -1 : 0; | |
330 | } | |
331 | ||
332 | static int sa1111_type_highirq(unsigned int irq, unsigned int flags) | |
333 | { | |
334 | unsigned int mask = SA1111_IRQMASK_HI(irq); | |
10dd5ce2 | 335 | void __iomem *mapbase = get_irq_chip_data(irq); |
1da177e4 LT |
336 | unsigned long ip1; |
337 | ||
338 | if (flags == IRQT_PROBE) | |
339 | return 0; | |
340 | ||
341 | if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0) | |
342 | return -EINVAL; | |
343 | ||
344 | ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); | |
345 | if (flags & __IRQT_RISEDGE) | |
346 | ip1 &= ~mask; | |
347 | else | |
348 | ip1 |= mask; | |
349 | sa1111_writel(ip1, mapbase + SA1111_INTPOL1); | |
350 | sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1); | |
351 | ||
352 | return 0; | |
353 | } | |
354 | ||
355 | static int sa1111_wake_highirq(unsigned int irq, unsigned int on) | |
356 | { | |
357 | unsigned int mask = SA1111_IRQMASK_HI(irq); | |
10dd5ce2 | 358 | void __iomem *mapbase = get_irq_chip_data(irq); |
1da177e4 LT |
359 | unsigned long we1; |
360 | ||
361 | we1 = sa1111_readl(mapbase + SA1111_WAKEEN1); | |
362 | if (on) | |
363 | we1 |= mask; | |
364 | else | |
365 | we1 &= ~mask; | |
366 | sa1111_writel(we1, mapbase + SA1111_WAKEEN1); | |
367 | ||
368 | return 0; | |
369 | } | |
370 | ||
38c677cb DB |
371 | static struct irq_chip sa1111_high_chip = { |
372 | .name = "SA1111-h", | |
1da177e4 LT |
373 | .ack = sa1111_ack_irq, |
374 | .mask = sa1111_mask_highirq, | |
375 | .unmask = sa1111_unmask_highirq, | |
376 | .retrigger = sa1111_retrigger_highirq, | |
7801907b RK |
377 | .set_type = sa1111_type_highirq, |
378 | .set_wake = sa1111_wake_highirq, | |
1da177e4 LT |
379 | }; |
380 | ||
381 | static void sa1111_setup_irq(struct sa1111 *sachip) | |
382 | { | |
383 | void __iomem *irqbase = sachip->base + SA1111_INTC; | |
384 | unsigned int irq; | |
385 | ||
386 | /* | |
387 | * We're guaranteed that this region hasn't been taken. | |
388 | */ | |
389 | request_mem_region(sachip->phys + SA1111_INTC, 512, "irq"); | |
390 | ||
391 | /* disable all IRQs */ | |
392 | sa1111_writel(0, irqbase + SA1111_INTEN0); | |
393 | sa1111_writel(0, irqbase + SA1111_INTEN1); | |
394 | sa1111_writel(0, irqbase + SA1111_WAKEEN0); | |
395 | sa1111_writel(0, irqbase + SA1111_WAKEEN1); | |
396 | ||
397 | /* | |
398 | * detect on rising edge. Note: Feb 2001 Errata for SA1111 | |
399 | * specifies that S0ReadyInt and S1ReadyInt should be '1'. | |
400 | */ | |
401 | sa1111_writel(0, irqbase + SA1111_INTPOL0); | |
402 | sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) | | |
403 | SA1111_IRQMASK_HI(IRQ_S1_READY_NINT), | |
404 | irqbase + SA1111_INTPOL1); | |
405 | ||
406 | /* clear all IRQs */ | |
407 | sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0); | |
408 | sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); | |
409 | ||
410 | for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { | |
411 | set_irq_chip(irq, &sa1111_low_chip); | |
10dd5ce2 RK |
412 | set_irq_chip_data(irq, irqbase); |
413 | set_irq_handler(irq, handle_edge_irq); | |
1da177e4 LT |
414 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
415 | } | |
416 | ||
417 | for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { | |
418 | set_irq_chip(irq, &sa1111_high_chip); | |
10dd5ce2 RK |
419 | set_irq_chip_data(irq, irqbase); |
420 | set_irq_handler(irq, handle_edge_irq); | |
1da177e4 LT |
421 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
422 | } | |
423 | ||
424 | /* | |
425 | * Register SA1111 interrupt | |
426 | */ | |
427 | set_irq_type(sachip->irq, IRQT_RISING); | |
428 | set_irq_data(sachip->irq, irqbase); | |
429 | set_irq_chained_handler(sachip->irq, sa1111_irq_handler); | |
430 | } | |
431 | ||
432 | /* | |
433 | * Bring the SA1111 out of reset. This requires a set procedure: | |
434 | * 1. nRESET asserted (by hardware) | |
435 | * 2. CLK turned on from SA1110 | |
436 | * 3. nRESET deasserted | |
437 | * 4. VCO turned on, PLL_BYPASS turned off | |
438 | * 5. Wait lock time, then assert RCLKEn | |
439 | * 7. PCR set to allow clocking of individual functions | |
440 | * | |
441 | * Until we've done this, the only registers we can access are: | |
442 | * SBI_SKCR | |
443 | * SBI_SMCR | |
444 | * SBI_SKID | |
445 | */ | |
446 | static void sa1111_wake(struct sa1111 *sachip) | |
447 | { | |
448 | unsigned long flags, r; | |
449 | ||
450 | spin_lock_irqsave(&sachip->lock, flags); | |
451 | ||
97d654f8 | 452 | clk_enable(sachip->clk); |
1da177e4 LT |
453 | |
454 | /* | |
455 | * Turn VCO on, and disable PLL Bypass. | |
456 | */ | |
457 | r = sa1111_readl(sachip->base + SA1111_SKCR); | |
458 | r &= ~SKCR_VCO_OFF; | |
459 | sa1111_writel(r, sachip->base + SA1111_SKCR); | |
460 | r |= SKCR_PLL_BYPASS | SKCR_OE_EN; | |
461 | sa1111_writel(r, sachip->base + SA1111_SKCR); | |
462 | ||
463 | /* | |
464 | * Wait lock time. SA1111 manual _doesn't_ | |
465 | * specify a figure for this! We choose 100us. | |
466 | */ | |
467 | udelay(100); | |
468 | ||
469 | /* | |
470 | * Enable RCLK. We also ensure that RDYEN is set. | |
471 | */ | |
472 | r |= SKCR_RCLKEN | SKCR_RDYEN; | |
473 | sa1111_writel(r, sachip->base + SA1111_SKCR); | |
474 | ||
475 | /* | |
476 | * Wait 14 RCLK cycles for the chip to finish coming out | |
477 | * of reset. (RCLK=24MHz). This is 590ns. | |
478 | */ | |
479 | udelay(1); | |
480 | ||
481 | /* | |
482 | * Ensure all clocks are initially off. | |
483 | */ | |
484 | sa1111_writel(0, sachip->base + SA1111_SKPCR); | |
485 | ||
486 | spin_unlock_irqrestore(&sachip->lock, flags); | |
487 | } | |
488 | ||
489 | #ifdef CONFIG_ARCH_SA1100 | |
490 | ||
491 | static u32 sa1111_dma_mask[] = { | |
492 | ~0, | |
493 | ~(1 << 20), | |
494 | ~(1 << 23), | |
495 | ~(1 << 24), | |
496 | ~(1 << 25), | |
497 | ~(1 << 20), | |
498 | ~(1 << 20), | |
499 | 0, | |
500 | }; | |
501 | ||
502 | /* | |
503 | * Configure the SA1111 shared memory controller. | |
504 | */ | |
505 | void | |
506 | sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac, | |
507 | unsigned int cas_latency) | |
508 | { | |
509 | unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC); | |
510 | ||
511 | if (cas_latency == 3) | |
512 | smcr |= SMCR_CLAT; | |
513 | ||
514 | sa1111_writel(smcr, sachip->base + SA1111_SMCR); | |
515 | ||
516 | /* | |
517 | * Now clear the bits in the DMA mask to work around the SA1111 | |
518 | * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion | |
519 | * Chip Specification Update, June 2000, Erratum #7). | |
520 | */ | |
521 | if (sachip->dev->dma_mask) | |
522 | *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2]; | |
523 | ||
524 | sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2]; | |
525 | } | |
526 | ||
527 | #endif | |
528 | ||
529 | static void sa1111_dev_release(struct device *_dev) | |
530 | { | |
531 | struct sa1111_dev *dev = SA1111_DEV(_dev); | |
532 | ||
533 | release_resource(&dev->res); | |
534 | kfree(dev); | |
535 | } | |
536 | ||
537 | static int | |
538 | sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, | |
539 | struct sa1111_dev_info *info) | |
540 | { | |
541 | struct sa1111_dev *dev; | |
542 | int ret; | |
543 | ||
d2a02b93 | 544 | dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL); |
1da177e4 LT |
545 | if (!dev) { |
546 | ret = -ENOMEM; | |
547 | goto out; | |
548 | } | |
1da177e4 LT |
549 | |
550 | snprintf(dev->dev.bus_id, sizeof(dev->dev.bus_id), | |
551 | "%4.4lx", info->offset); | |
552 | ||
553 | dev->devid = info->devid; | |
554 | dev->dev.parent = sachip->dev; | |
555 | dev->dev.bus = &sa1111_bus_type; | |
556 | dev->dev.release = sa1111_dev_release; | |
557 | dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask; | |
558 | dev->res.start = sachip->phys + info->offset; | |
559 | dev->res.end = dev->res.start + 511; | |
560 | dev->res.name = dev->dev.bus_id; | |
561 | dev->res.flags = IORESOURCE_MEM; | |
562 | dev->mapbase = sachip->base + info->offset; | |
563 | dev->skpcr_mask = info->skpcr_mask; | |
564 | memmove(dev->irq, info->irq, sizeof(dev->irq)); | |
565 | ||
566 | ret = request_resource(parent, &dev->res); | |
567 | if (ret) { | |
568 | printk("SA1111: failed to allocate resource for %s\n", | |
569 | dev->res.name); | |
570 | kfree(dev); | |
571 | goto out; | |
572 | } | |
573 | ||
574 | ||
575 | ret = device_register(&dev->dev); | |
576 | if (ret) { | |
577 | release_resource(&dev->res); | |
578 | kfree(dev); | |
579 | goto out; | |
580 | } | |
581 | ||
582 | /* | |
583 | * If the parent device has a DMA mask associated with it, | |
584 | * propagate it down to the children. | |
585 | */ | |
586 | if (sachip->dev->dma_mask) { | |
587 | dev->dma_mask = *sachip->dev->dma_mask; | |
588 | dev->dev.dma_mask = &dev->dma_mask; | |
589 | ||
590 | if (dev->dma_mask != 0xffffffffUL) { | |
591 | ret = dmabounce_register_dev(&dev->dev, 1024, 4096); | |
592 | if (ret) { | |
593 | printk("SA1111: Failed to register %s with dmabounce", dev->dev.bus_id); | |
594 | device_unregister(&dev->dev); | |
595 | } | |
596 | } | |
597 | } | |
598 | ||
599 | out: | |
600 | return ret; | |
601 | } | |
602 | ||
603 | /** | |
604 | * sa1111_probe - probe for a single SA1111 chip. | |
605 | * @phys_addr: physical address of device. | |
606 | * | |
607 | * Probe for a SA1111 chip. This must be called | |
608 | * before any other SA1111-specific code. | |
609 | * | |
610 | * Returns: | |
611 | * %-ENODEV device not found. | |
612 | * %-EBUSY physical address already marked in-use. | |
613 | * %0 successful. | |
614 | */ | |
615 | static int | |
616 | __sa1111_probe(struct device *me, struct resource *mem, int irq) | |
617 | { | |
618 | struct sa1111 *sachip; | |
619 | unsigned long id; | |
416112f8 | 620 | unsigned int has_devs; |
1da177e4 LT |
621 | int i, ret = -ENODEV; |
622 | ||
d2a02b93 | 623 | sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL); |
1da177e4 LT |
624 | if (!sachip) |
625 | return -ENOMEM; | |
626 | ||
97d654f8 RK |
627 | sachip->clk = clk_get(me, "GPIO27_CLK"); |
628 | if (!sachip->clk) { | |
629 | ret = PTR_ERR(sachip->clk); | |
630 | goto err_free; | |
631 | } | |
632 | ||
1da177e4 LT |
633 | spin_lock_init(&sachip->lock); |
634 | ||
635 | sachip->dev = me; | |
636 | dev_set_drvdata(sachip->dev, sachip); | |
637 | ||
638 | sachip->phys = mem->start; | |
639 | sachip->irq = irq; | |
640 | ||
641 | /* | |
642 | * Map the whole region. This also maps the | |
643 | * registers for our children. | |
644 | */ | |
645 | sachip->base = ioremap(mem->start, PAGE_SIZE * 2); | |
646 | if (!sachip->base) { | |
647 | ret = -ENOMEM; | |
97d654f8 | 648 | goto err_clkput; |
1da177e4 LT |
649 | } |
650 | ||
651 | /* | |
652 | * Probe for the chip. Only touch the SBI registers. | |
653 | */ | |
654 | id = sa1111_readl(sachip->base + SA1111_SKID); | |
655 | if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { | |
656 | printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id); | |
657 | ret = -ENODEV; | |
97d654f8 | 658 | goto err_unmap; |
1da177e4 LT |
659 | } |
660 | ||
661 | printk(KERN_INFO "SA1111 Microprocessor Companion Chip: " | |
662 | "silicon revision %lx, metal revision %lx\n", | |
663 | (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK)); | |
664 | ||
665 | /* | |
666 | * We found it. Wake the chip up, and initialise. | |
667 | */ | |
668 | sa1111_wake(sachip); | |
669 | ||
670 | #ifdef CONFIG_ARCH_SA1100 | |
416112f8 DB |
671 | { |
672 | unsigned int val; | |
673 | ||
1da177e4 LT |
674 | /* |
675 | * The SDRAM configuration of the SA1110 and the SA1111 must | |
676 | * match. This is very important to ensure that SA1111 accesses | |
677 | * don't corrupt the SDRAM. Note that this ungates the SA1111's | |
678 | * MBGNT signal, so we must have called sa1110_mb_disable() | |
679 | * beforehand. | |
680 | */ | |
681 | sa1111_configure_smc(sachip, 1, | |
682 | FExtr(MDCNFG, MDCNFG_SA1110_DRAC0), | |
683 | FExtr(MDCNFG, MDCNFG_SA1110_TDL0)); | |
684 | ||
685 | /* | |
686 | * We only need to turn on DCLK whenever we want to use the | |
687 | * DMA. It can otherwise be held firmly in the off position. | |
688 | * (currently, we always enable it.) | |
689 | */ | |
690 | val = sa1111_readl(sachip->base + SA1111_SKPCR); | |
691 | sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR); | |
692 | ||
693 | /* | |
694 | * Enable the SA1110 memory bus request and grant signals. | |
695 | */ | |
696 | sa1110_mb_enable(); | |
416112f8 | 697 | } |
1da177e4 LT |
698 | #endif |
699 | ||
700 | /* | |
701 | * The interrupt controller must be initialised before any | |
702 | * other device to ensure that the interrupts are available. | |
703 | */ | |
704 | if (sachip->irq != NO_IRQ) | |
705 | sa1111_setup_irq(sachip); | |
706 | ||
707 | g_sa1111 = sachip; | |
708 | ||
709 | has_devs = ~0; | |
710 | if (machine_is_assabet() || machine_is_jornada720() || | |
711 | machine_is_badge4()) | |
712 | has_devs &= ~(1 << 4); | |
713 | else | |
714 | has_devs &= ~(1 << 1); | |
715 | ||
716 | for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++) | |
717 | if (has_devs & (1 << i)) | |
718 | sa1111_init_one_child(sachip, mem, &sa1111_devices[i]); | |
719 | ||
720 | return 0; | |
721 | ||
97d654f8 | 722 | err_unmap: |
1da177e4 | 723 | iounmap(sachip->base); |
97d654f8 RK |
724 | err_clkput: |
725 | clk_put(sachip->clk); | |
726 | err_free: | |
1da177e4 LT |
727 | kfree(sachip); |
728 | return ret; | |
729 | } | |
730 | ||
522c37b9 RK |
731 | static int sa1111_remove_one(struct device *dev, void *data) |
732 | { | |
733 | device_unregister(dev); | |
734 | return 0; | |
735 | } | |
736 | ||
1da177e4 LT |
737 | static void __sa1111_remove(struct sa1111 *sachip) |
738 | { | |
1da177e4 LT |
739 | void __iomem *irqbase = sachip->base + SA1111_INTC; |
740 | ||
522c37b9 | 741 | device_for_each_child(sachip->dev, NULL, sa1111_remove_one); |
1da177e4 LT |
742 | |
743 | /* disable all IRQs */ | |
744 | sa1111_writel(0, irqbase + SA1111_INTEN0); | |
745 | sa1111_writel(0, irqbase + SA1111_INTEN1); | |
746 | sa1111_writel(0, irqbase + SA1111_WAKEEN0); | |
747 | sa1111_writel(0, irqbase + SA1111_WAKEEN1); | |
748 | ||
97d654f8 RK |
749 | clk_disable(sachip->clk); |
750 | ||
1da177e4 LT |
751 | if (sachip->irq != NO_IRQ) { |
752 | set_irq_chained_handler(sachip->irq, NULL); | |
753 | set_irq_data(sachip->irq, NULL); | |
754 | ||
755 | release_mem_region(sachip->phys + SA1111_INTC, 512); | |
756 | } | |
757 | ||
758 | iounmap(sachip->base); | |
97d654f8 | 759 | clk_put(sachip->clk); |
1da177e4 LT |
760 | kfree(sachip); |
761 | } | |
762 | ||
763 | /* | |
764 | * According to the "Intel StrongARM SA-1111 Microprocessor Companion | |
765 | * Chip Specification Update" (June 2000), erratum #7, there is a | |
766 | * significant bug in the SA1111 SDRAM shared memory controller. If | |
767 | * an access to a region of memory above 1MB relative to the bank base, | |
768 | * it is important that address bit 10 _NOT_ be asserted. Depending | |
769 | * on the configuration of the RAM, bit 10 may correspond to one | |
770 | * of several different (processor-relative) address bits. | |
771 | * | |
772 | * This routine only identifies whether or not a given DMA address | |
773 | * is susceptible to the bug. | |
774 | * | |
775 | * This should only get called for sa1111_device types due to the | |
776 | * way we configure our device dma_masks. | |
777 | */ | |
778 | int dma_needs_bounce(struct device *dev, dma_addr_t addr, size_t size) | |
779 | { | |
780 | /* | |
781 | * Section 4.6 of the "Intel StrongARM SA-1111 Development Module | |
782 | * User's Guide" mentions that jumpers R51 and R52 control the | |
783 | * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or | |
784 | * SDRAM bank 1 on Neponset). The default configuration selects | |
785 | * Assabet, so any address in bank 1 is necessarily invalid. | |
786 | */ | |
787 | return ((machine_is_assabet() || machine_is_pfs168()) && | |
788 | (addr >= 0xc8000000 || (addr + size) >= 0xc8000000)); | |
789 | } | |
790 | ||
791 | struct sa1111_save_data { | |
792 | unsigned int skcr; | |
793 | unsigned int skpcr; | |
794 | unsigned int skcdr; | |
795 | unsigned char skaud; | |
796 | unsigned char skpwm0; | |
797 | unsigned char skpwm1; | |
798 | ||
799 | /* | |
800 | * Interrupt controller | |
801 | */ | |
802 | unsigned int intpol0; | |
803 | unsigned int intpol1; | |
804 | unsigned int inten0; | |
805 | unsigned int inten1; | |
806 | unsigned int wakepol0; | |
807 | unsigned int wakepol1; | |
808 | unsigned int wakeen0; | |
809 | unsigned int wakeen1; | |
810 | }; | |
811 | ||
812 | #ifdef CONFIG_PM | |
813 | ||
3ae5eaec | 814 | static int sa1111_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 815 | { |
3ae5eaec | 816 | struct sa1111 *sachip = platform_get_drvdata(dev); |
1da177e4 LT |
817 | struct sa1111_save_data *save; |
818 | unsigned long flags; | |
819 | unsigned int val; | |
820 | void __iomem *base; | |
821 | ||
1da177e4 LT |
822 | save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL); |
823 | if (!save) | |
824 | return -ENOMEM; | |
3ae5eaec | 825 | dev->dev.power.saved_state = save; |
1da177e4 LT |
826 | |
827 | spin_lock_irqsave(&sachip->lock, flags); | |
828 | ||
829 | /* | |
830 | * Save state. | |
831 | */ | |
832 | base = sachip->base; | |
833 | save->skcr = sa1111_readl(base + SA1111_SKCR); | |
834 | save->skpcr = sa1111_readl(base + SA1111_SKPCR); | |
835 | save->skcdr = sa1111_readl(base + SA1111_SKCDR); | |
836 | save->skaud = sa1111_readl(base + SA1111_SKAUD); | |
837 | save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0); | |
838 | save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1); | |
839 | ||
840 | base = sachip->base + SA1111_INTC; | |
841 | save->intpol0 = sa1111_readl(base + SA1111_INTPOL0); | |
842 | save->intpol1 = sa1111_readl(base + SA1111_INTPOL1); | |
843 | save->inten0 = sa1111_readl(base + SA1111_INTEN0); | |
844 | save->inten1 = sa1111_readl(base + SA1111_INTEN1); | |
845 | save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0); | |
846 | save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1); | |
847 | save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0); | |
848 | save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1); | |
849 | ||
850 | /* | |
851 | * Disable. | |
852 | */ | |
853 | val = sa1111_readl(sachip->base + SA1111_SKCR); | |
854 | sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR); | |
855 | sa1111_writel(0, sachip->base + SA1111_SKPWM0); | |
856 | sa1111_writel(0, sachip->base + SA1111_SKPWM1); | |
857 | ||
97d654f8 RK |
858 | clk_disable(sachip->clk); |
859 | ||
1da177e4 LT |
860 | spin_unlock_irqrestore(&sachip->lock, flags); |
861 | ||
862 | return 0; | |
863 | } | |
864 | ||
865 | /* | |
866 | * sa1111_resume - Restore the SA1111 device state. | |
867 | * @dev: device to restore | |
1da177e4 LT |
868 | * |
869 | * Restore the general state of the SA1111; clock control and | |
870 | * interrupt controller. Other parts of the SA1111 must be | |
871 | * restored by their respective drivers, and must be called | |
872 | * via LDM after this function. | |
873 | */ | |
3ae5eaec | 874 | static int sa1111_resume(struct platform_device *dev) |
1da177e4 | 875 | { |
3ae5eaec | 876 | struct sa1111 *sachip = platform_get_drvdata(dev); |
1da177e4 LT |
877 | struct sa1111_save_data *save; |
878 | unsigned long flags, id; | |
879 | void __iomem *base; | |
880 | ||
3ae5eaec | 881 | save = (struct sa1111_save_data *)dev->dev.power.saved_state; |
1da177e4 LT |
882 | if (!save) |
883 | return 0; | |
884 | ||
885 | spin_lock_irqsave(&sachip->lock, flags); | |
886 | ||
887 | /* | |
888 | * Ensure that the SA1111 is still here. | |
889 | * FIXME: shouldn't do this here. | |
890 | */ | |
891 | id = sa1111_readl(sachip->base + SA1111_SKID); | |
892 | if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { | |
893 | __sa1111_remove(sachip); | |
3ae5eaec | 894 | platform_set_drvdata(dev, NULL); |
1da177e4 LT |
895 | kfree(save); |
896 | return 0; | |
897 | } | |
898 | ||
899 | /* | |
900 | * First of all, wake up the chip. | |
901 | */ | |
902 | sa1111_wake(sachip); | |
903 | sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0); | |
904 | sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1); | |
905 | ||
906 | base = sachip->base; | |
907 | sa1111_writel(save->skcr, base + SA1111_SKCR); | |
908 | sa1111_writel(save->skpcr, base + SA1111_SKPCR); | |
909 | sa1111_writel(save->skcdr, base + SA1111_SKCDR); | |
910 | sa1111_writel(save->skaud, base + SA1111_SKAUD); | |
911 | sa1111_writel(save->skpwm0, base + SA1111_SKPWM0); | |
912 | sa1111_writel(save->skpwm1, base + SA1111_SKPWM1); | |
913 | ||
914 | base = sachip->base + SA1111_INTC; | |
915 | sa1111_writel(save->intpol0, base + SA1111_INTPOL0); | |
916 | sa1111_writel(save->intpol1, base + SA1111_INTPOL1); | |
917 | sa1111_writel(save->inten0, base + SA1111_INTEN0); | |
918 | sa1111_writel(save->inten1, base + SA1111_INTEN1); | |
919 | sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0); | |
920 | sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1); | |
921 | sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0); | |
922 | sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1); | |
923 | ||
924 | spin_unlock_irqrestore(&sachip->lock, flags); | |
925 | ||
3ae5eaec | 926 | dev->dev.power.saved_state = NULL; |
1da177e4 LT |
927 | kfree(save); |
928 | ||
929 | return 0; | |
930 | } | |
931 | ||
932 | #else | |
933 | #define sa1111_suspend NULL | |
934 | #define sa1111_resume NULL | |
935 | #endif | |
936 | ||
3ae5eaec | 937 | static int sa1111_probe(struct platform_device *pdev) |
1da177e4 | 938 | { |
1da177e4 LT |
939 | struct resource *mem; |
940 | int irq; | |
941 | ||
942 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
943 | if (!mem) | |
944 | return -EINVAL; | |
945 | irq = platform_get_irq(pdev, 0); | |
48944738 DV |
946 | if (irq < 0) |
947 | return -ENXIO; | |
1da177e4 | 948 | |
3ae5eaec | 949 | return __sa1111_probe(&pdev->dev, mem, irq); |
1da177e4 LT |
950 | } |
951 | ||
3ae5eaec | 952 | static int sa1111_remove(struct platform_device *pdev) |
1da177e4 | 953 | { |
3ae5eaec | 954 | struct sa1111 *sachip = platform_get_drvdata(pdev); |
1da177e4 LT |
955 | |
956 | if (sachip) { | |
957 | __sa1111_remove(sachip); | |
3ae5eaec | 958 | platform_set_drvdata(pdev, NULL); |
1da177e4 LT |
959 | |
960 | #ifdef CONFIG_PM | |
3ae5eaec RK |
961 | kfree(pdev->dev.power.saved_state); |
962 | pdev->dev.power.saved_state = NULL; | |
1da177e4 LT |
963 | #endif |
964 | } | |
965 | ||
966 | return 0; | |
967 | } | |
968 | ||
969 | /* | |
970 | * Not sure if this should be on the system bus or not yet. | |
971 | * We really want some way to register a system device at | |
972 | * the per-machine level, and then have this driver pick | |
973 | * up the registered devices. | |
974 | * | |
975 | * We also need to handle the SDRAM configuration for | |
976 | * PXA250/SA1110 machine classes. | |
977 | */ | |
3ae5eaec | 978 | static struct platform_driver sa1111_device_driver = { |
1da177e4 LT |
979 | .probe = sa1111_probe, |
980 | .remove = sa1111_remove, | |
981 | .suspend = sa1111_suspend, | |
982 | .resume = sa1111_resume, | |
3ae5eaec RK |
983 | .driver = { |
984 | .name = "sa1111", | |
985 | }, | |
1da177e4 LT |
986 | }; |
987 | ||
988 | /* | |
989 | * Get the parent device driver (us) structure | |
990 | * from a child function device | |
991 | */ | |
992 | static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev) | |
993 | { | |
994 | return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent); | |
995 | } | |
996 | ||
997 | /* | |
998 | * The bits in the opdiv field are non-linear. | |
999 | */ | |
1000 | static unsigned char opdiv_table[] = { 1, 4, 2, 8 }; | |
1001 | ||
1002 | static unsigned int __sa1111_pll_clock(struct sa1111 *sachip) | |
1003 | { | |
1004 | unsigned int skcdr, fbdiv, ipdiv, opdiv; | |
1005 | ||
1006 | skcdr = sa1111_readl(sachip->base + SA1111_SKCDR); | |
1007 | ||
1008 | fbdiv = (skcdr & 0x007f) + 2; | |
1009 | ipdiv = ((skcdr & 0x0f80) >> 7) + 2; | |
1010 | opdiv = opdiv_table[(skcdr & 0x3000) >> 12]; | |
1011 | ||
1012 | return 3686400 * fbdiv / (ipdiv * opdiv); | |
1013 | } | |
1014 | ||
1015 | /** | |
1016 | * sa1111_pll_clock - return the current PLL clock frequency. | |
1017 | * @sadev: SA1111 function block | |
1018 | * | |
1019 | * BUG: we should look at SKCR. We also blindly believe that | |
1020 | * the chip is being fed with the 3.6864MHz clock. | |
1021 | * | |
1022 | * Returns the PLL clock in Hz. | |
1023 | */ | |
1024 | unsigned int sa1111_pll_clock(struct sa1111_dev *sadev) | |
1025 | { | |
1026 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1027 | ||
1028 | return __sa1111_pll_clock(sachip); | |
1029 | } | |
1030 | ||
1031 | /** | |
1032 | * sa1111_select_audio_mode - select I2S or AC link mode | |
1033 | * @sadev: SA1111 function block | |
1034 | * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S | |
1035 | * | |
1036 | * Frob the SKCR to select AC Link mode or I2S mode for | |
1037 | * the audio block. | |
1038 | */ | |
1039 | void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode) | |
1040 | { | |
1041 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1042 | unsigned long flags; | |
1043 | unsigned int val; | |
1044 | ||
1045 | spin_lock_irqsave(&sachip->lock, flags); | |
1046 | ||
1047 | val = sa1111_readl(sachip->base + SA1111_SKCR); | |
1048 | if (mode == SA1111_AUDIO_I2S) { | |
1049 | val &= ~SKCR_SELAC; | |
1050 | } else { | |
1051 | val |= SKCR_SELAC; | |
1052 | } | |
1053 | sa1111_writel(val, sachip->base + SA1111_SKCR); | |
1054 | ||
1055 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1056 | } | |
1057 | ||
1058 | /** | |
1059 | * sa1111_set_audio_rate - set the audio sample rate | |
1060 | * @sadev: SA1111 SAC function block | |
1061 | * @rate: sample rate to select | |
1062 | */ | |
1063 | int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate) | |
1064 | { | |
1065 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1066 | unsigned int div; | |
1067 | ||
1068 | if (sadev->devid != SA1111_DEVID_SAC) | |
1069 | return -EINVAL; | |
1070 | ||
1071 | div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate; | |
1072 | if (div == 0) | |
1073 | div = 1; | |
1074 | if (div > 128) | |
1075 | div = 128; | |
1076 | ||
1077 | sa1111_writel(div - 1, sachip->base + SA1111_SKAUD); | |
1078 | ||
1079 | return 0; | |
1080 | } | |
1081 | ||
1082 | /** | |
1083 | * sa1111_get_audio_rate - get the audio sample rate | |
1084 | * @sadev: SA1111 SAC function block device | |
1085 | */ | |
1086 | int sa1111_get_audio_rate(struct sa1111_dev *sadev) | |
1087 | { | |
1088 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1089 | unsigned long div; | |
1090 | ||
1091 | if (sadev->devid != SA1111_DEVID_SAC) | |
1092 | return -EINVAL; | |
1093 | ||
1094 | div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1; | |
1095 | ||
1096 | return __sa1111_pll_clock(sachip) / (256 * div); | |
1097 | } | |
1098 | ||
1099 | void sa1111_set_io_dir(struct sa1111_dev *sadev, | |
1100 | unsigned int bits, unsigned int dir, | |
1101 | unsigned int sleep_dir) | |
1102 | { | |
1103 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1104 | unsigned long flags; | |
1105 | unsigned int val; | |
1106 | void __iomem *gpio = sachip->base + SA1111_GPIO; | |
1107 | ||
1108 | #define MODIFY_BITS(port, mask, dir) \ | |
1109 | if (mask) { \ | |
1110 | val = sa1111_readl(port); \ | |
1111 | val &= ~(mask); \ | |
1112 | val |= (dir) & (mask); \ | |
1113 | sa1111_writel(val, port); \ | |
1114 | } | |
1115 | ||
1116 | spin_lock_irqsave(&sachip->lock, flags); | |
1117 | MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir); | |
1118 | MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8); | |
1119 | MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16); | |
1120 | ||
1121 | MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir); | |
1122 | MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8); | |
1123 | MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16); | |
1124 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1125 | } | |
1126 | ||
1127 | void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) | |
1128 | { | |
1129 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1130 | unsigned long flags; | |
1131 | unsigned int val; | |
1132 | void __iomem *gpio = sachip->base + SA1111_GPIO; | |
1133 | ||
1134 | spin_lock_irqsave(&sachip->lock, flags); | |
1135 | MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v); | |
1136 | MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8); | |
1137 | MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16); | |
1138 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1139 | } | |
1140 | ||
1141 | void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) | |
1142 | { | |
1143 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1144 | unsigned long flags; | |
1145 | unsigned int val; | |
1146 | void __iomem *gpio = sachip->base + SA1111_GPIO; | |
1147 | ||
1148 | spin_lock_irqsave(&sachip->lock, flags); | |
1149 | MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v); | |
1150 | MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8); | |
1151 | MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16); | |
1152 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1153 | } | |
1154 | ||
1155 | /* | |
1156 | * Individual device operations. | |
1157 | */ | |
1158 | ||
1159 | /** | |
1160 | * sa1111_enable_device - enable an on-chip SA1111 function block | |
1161 | * @sadev: SA1111 function block device to enable | |
1162 | */ | |
1163 | void sa1111_enable_device(struct sa1111_dev *sadev) | |
1164 | { | |
1165 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1166 | unsigned long flags; | |
1167 | unsigned int val; | |
1168 | ||
1169 | spin_lock_irqsave(&sachip->lock, flags); | |
1170 | val = sa1111_readl(sachip->base + SA1111_SKPCR); | |
1171 | sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR); | |
1172 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1173 | } | |
1174 | ||
1175 | /** | |
1176 | * sa1111_disable_device - disable an on-chip SA1111 function block | |
1177 | * @sadev: SA1111 function block device to disable | |
1178 | */ | |
1179 | void sa1111_disable_device(struct sa1111_dev *sadev) | |
1180 | { | |
1181 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1182 | unsigned long flags; | |
1183 | unsigned int val; | |
1184 | ||
1185 | spin_lock_irqsave(&sachip->lock, flags); | |
1186 | val = sa1111_readl(sachip->base + SA1111_SKPCR); | |
1187 | sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR); | |
1188 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1189 | } | |
1190 | ||
1191 | /* | |
1192 | * SA1111 "Register Access Bus." | |
1193 | * | |
1194 | * We model this as a regular bus type, and hang devices directly | |
1195 | * off this. | |
1196 | */ | |
1197 | static int sa1111_match(struct device *_dev, struct device_driver *_drv) | |
1198 | { | |
1199 | struct sa1111_dev *dev = SA1111_DEV(_dev); | |
1200 | struct sa1111_driver *drv = SA1111_DRV(_drv); | |
1201 | ||
1202 | return dev->devid == drv->devid; | |
1203 | } | |
1204 | ||
1205 | static int sa1111_bus_suspend(struct device *dev, pm_message_t state) | |
1206 | { | |
1207 | struct sa1111_dev *sadev = SA1111_DEV(dev); | |
1208 | struct sa1111_driver *drv = SA1111_DRV(dev->driver); | |
1209 | int ret = 0; | |
1210 | ||
1211 | if (drv && drv->suspend) | |
1212 | ret = drv->suspend(sadev, state); | |
1213 | return ret; | |
1214 | } | |
1215 | ||
1216 | static int sa1111_bus_resume(struct device *dev) | |
1217 | { | |
1218 | struct sa1111_dev *sadev = SA1111_DEV(dev); | |
1219 | struct sa1111_driver *drv = SA1111_DRV(dev->driver); | |
1220 | int ret = 0; | |
1221 | ||
1222 | if (drv && drv->resume) | |
1223 | ret = drv->resume(sadev); | |
1224 | return ret; | |
1225 | } | |
1226 | ||
1227 | static int sa1111_bus_probe(struct device *dev) | |
1228 | { | |
1229 | struct sa1111_dev *sadev = SA1111_DEV(dev); | |
1230 | struct sa1111_driver *drv = SA1111_DRV(dev->driver); | |
1231 | int ret = -ENODEV; | |
1232 | ||
1233 | if (drv->probe) | |
1234 | ret = drv->probe(sadev); | |
1235 | return ret; | |
1236 | } | |
1237 | ||
1238 | static int sa1111_bus_remove(struct device *dev) | |
1239 | { | |
1240 | struct sa1111_dev *sadev = SA1111_DEV(dev); | |
1241 | struct sa1111_driver *drv = SA1111_DRV(dev->driver); | |
1242 | int ret = 0; | |
1243 | ||
1244 | if (drv->remove) | |
1245 | ret = drv->remove(sadev); | |
1246 | return ret; | |
1247 | } | |
1248 | ||
1249 | struct bus_type sa1111_bus_type = { | |
1250 | .name = "sa1111-rab", | |
1251 | .match = sa1111_match, | |
2876ba43 RK |
1252 | .probe = sa1111_bus_probe, |
1253 | .remove = sa1111_bus_remove, | |
1da177e4 LT |
1254 | .suspend = sa1111_bus_suspend, |
1255 | .resume = sa1111_bus_resume, | |
1256 | }; | |
1257 | ||
1258 | int sa1111_driver_register(struct sa1111_driver *driver) | |
1259 | { | |
1da177e4 LT |
1260 | driver->drv.bus = &sa1111_bus_type; |
1261 | return driver_register(&driver->drv); | |
1262 | } | |
1263 | ||
1264 | void sa1111_driver_unregister(struct sa1111_driver *driver) | |
1265 | { | |
1266 | driver_unregister(&driver->drv); | |
1267 | } | |
1268 | ||
1269 | static int __init sa1111_init(void) | |
1270 | { | |
1271 | int ret = bus_register(&sa1111_bus_type); | |
1272 | if (ret == 0) | |
3ae5eaec | 1273 | platform_driver_register(&sa1111_device_driver); |
1da177e4 LT |
1274 | return ret; |
1275 | } | |
1276 | ||
1277 | static void __exit sa1111_exit(void) | |
1278 | { | |
3ae5eaec | 1279 | platform_driver_unregister(&sa1111_device_driver); |
1da177e4 LT |
1280 | bus_unregister(&sa1111_bus_type); |
1281 | } | |
1282 | ||
72724382 | 1283 | subsys_initcall(sa1111_init); |
1da177e4 LT |
1284 | module_exit(sa1111_exit); |
1285 | ||
1286 | MODULE_DESCRIPTION("Intel Corporation SA1111 core driver"); | |
1287 | MODULE_LICENSE("GPL"); | |
1288 | ||
1289 | EXPORT_SYMBOL(sa1111_select_audio_mode); | |
1290 | EXPORT_SYMBOL(sa1111_set_audio_rate); | |
1291 | EXPORT_SYMBOL(sa1111_get_audio_rate); | |
1292 | EXPORT_SYMBOL(sa1111_set_io_dir); | |
1293 | EXPORT_SYMBOL(sa1111_set_io); | |
1294 | EXPORT_SYMBOL(sa1111_set_sleep_io); | |
1295 | EXPORT_SYMBOL(sa1111_enable_device); | |
1296 | EXPORT_SYMBOL(sa1111_disable_device); | |
1297 | EXPORT_SYMBOL(sa1111_pll_clock); | |
1298 | EXPORT_SYMBOL(sa1111_bus_type); | |
1299 | EXPORT_SYMBOL(sa1111_driver_register); | |
1300 | EXPORT_SYMBOL(sa1111_driver_unregister); |