]>
Commit | Line | Data |
---|---|---|
b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | #ifndef __ASM_ARM_DMA_H |
3 | #define __ASM_ARM_DMA_H | |
4 | ||
d4c6fc99 RK |
5 | /* |
6 | * This is the maximum virtual address which can be DMA'd from. | |
7 | */ | |
65032018 NP |
8 | #ifndef CONFIG_ZONE_DMA |
9 | #define MAX_DMA_ADDRESS 0xffffffffUL | |
2fb3ec5c | 10 | #else |
65032018 | 11 | #define MAX_DMA_ADDRESS ({ \ |
26f09e9b SS |
12 | extern phys_addr_t arm_dma_zone_size; \ |
13 | arm_dma_zone_size && arm_dma_zone_size < (0x10000000 - PAGE_OFFSET) ? \ | |
65032018 | 14 | (PAGE_OFFSET + arm_dma_zone_size) : 0xffffffffUL; }) |
d4c6fc99 RK |
15 | #endif |
16 | ||
dcea83ad RK |
17 | #ifdef CONFIG_ISA_DMA_API |
18 | /* | |
19 | * This is used to support drivers written for the x86 ISA DMA API. | |
20 | * It should not be re-used except for that purpose. | |
21 | */ | |
22 | #include <linux/spinlock.h> | |
84be456f | 23 | #include <linux/scatterlist.h> |
dcea83ad | 24 | |
f40b121d | 25 | #include <mach/isa-dma.h> |
dcea83ad | 26 | |
bc6447b8 RK |
27 | /* |
28 | * The DMA modes reflect the settings for the ISA DMA controller | |
29 | */ | |
30 | #define DMA_MODE_MASK 0xcc | |
1da177e4 | 31 | |
bc6447b8 RK |
32 | #define DMA_MODE_READ 0x44 |
33 | #define DMA_MODE_WRITE 0x48 | |
34 | #define DMA_MODE_CASCADE 0xc0 | |
35 | #define DMA_AUTOINIT 0x10 | |
1da177e4 | 36 | |
bd31b859 | 37 | extern raw_spinlock_t dma_spin_lock; |
1da177e4 LT |
38 | |
39 | static inline unsigned long claim_dma_lock(void) | |
40 | { | |
41 | unsigned long flags; | |
bd31b859 | 42 | raw_spin_lock_irqsave(&dma_spin_lock, flags); |
1da177e4 LT |
43 | return flags; |
44 | } | |
45 | ||
46 | static inline void release_dma_lock(unsigned long flags) | |
47 | { | |
bd31b859 | 48 | raw_spin_unlock_irqrestore(&dma_spin_lock, flags); |
1da177e4 LT |
49 | } |
50 | ||
51 | /* Clear the 'DMA Pointer Flip Flop'. | |
52 | * Write 0 for LSB/MSB, 1 for MSB/LSB access. | |
53 | */ | |
1df81302 | 54 | #define clear_dma_ff(chan) |
1da177e4 LT |
55 | |
56 | /* Set only the page register bits of the transfer address. | |
57 | * | |
58 | * NOTE: This is an architecture specific function, and should | |
59 | * be hidden from the drivers | |
60 | */ | |
1df81302 | 61 | extern void set_dma_page(unsigned int chan, char pagenr); |
1da177e4 LT |
62 | |
63 | /* Request a DMA channel | |
64 | * | |
65 | * Some architectures may need to do allocate an interrupt | |
66 | */ | |
1df81302 | 67 | extern int request_dma(unsigned int chan, const char * device_id); |
1da177e4 LT |
68 | |
69 | /* Free a DMA channel | |
70 | * | |
71 | * Some architectures may need to do free an interrupt | |
72 | */ | |
1df81302 | 73 | extern void free_dma(unsigned int chan); |
1da177e4 LT |
74 | |
75 | /* Enable DMA for this channel | |
76 | * | |
77 | * On some architectures, this may have other side effects like | |
78 | * enabling an interrupt and setting the DMA registers. | |
79 | */ | |
1df81302 | 80 | extern void enable_dma(unsigned int chan); |
1da177e4 LT |
81 | |
82 | /* Disable DMA for this channel | |
83 | * | |
84 | * On some architectures, this may have other side effects like | |
85 | * disabling an interrupt or whatever. | |
86 | */ | |
1df81302 | 87 | extern void disable_dma(unsigned int chan); |
1da177e4 LT |
88 | |
89 | /* Test whether the specified channel has an active DMA transfer | |
90 | */ | |
1df81302 | 91 | extern int dma_channel_active(unsigned int chan); |
1da177e4 LT |
92 | |
93 | /* Set the DMA scatter gather list for this channel | |
94 | * | |
95 | * This should not be called if a DMA channel is enabled, | |
96 | * especially since some DMA architectures don't update the | |
97 | * DMA address immediately, but defer it to the enable_dma(). | |
98 | */ | |
1df81302 | 99 | extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg); |
1da177e4 LT |
100 | |
101 | /* Set the DMA address for this channel | |
102 | * | |
103 | * This should not be called if a DMA channel is enabled, | |
104 | * especially since some DMA architectures don't update the | |
105 | * DMA address immediately, but defer it to the enable_dma(). | |
106 | */ | |
1df81302 RK |
107 | extern void __set_dma_addr(unsigned int chan, void *addr); |
108 | #define set_dma_addr(chan, addr) \ | |
a5d533ee | 109 | __set_dma_addr(chan, (void *)__bus_to_virt(addr)) |
1da177e4 LT |
110 | |
111 | /* Set the DMA byte count for this channel | |
112 | * | |
113 | * This should not be called if a DMA channel is enabled, | |
114 | * especially since some DMA architectures don't update the | |
115 | * DMA count immediately, but defer it to the enable_dma(). | |
116 | */ | |
1df81302 | 117 | extern void set_dma_count(unsigned int chan, unsigned long count); |
1da177e4 LT |
118 | |
119 | /* Set the transfer direction for this channel | |
120 | * | |
121 | * This should not be called if a DMA channel is enabled, | |
122 | * especially since some DMA architectures don't update the | |
123 | * DMA transfer direction immediately, but defer it to the | |
124 | * enable_dma(). | |
125 | */ | |
f0ffc816 | 126 | extern void set_dma_mode(unsigned int chan, unsigned int mode); |
1da177e4 LT |
127 | |
128 | /* Set the transfer speed for this channel | |
129 | */ | |
1df81302 | 130 | extern void set_dma_speed(unsigned int chan, int cycle_ns); |
1da177e4 LT |
131 | |
132 | /* Get DMA residue count. After a DMA transfer, this | |
133 | * should return zero. Reading this while a DMA transfer is | |
134 | * still in progress will return unpredictable results. | |
135 | * If called before the channel has been used, it may return 1. | |
136 | * Otherwise, it returns the number of _bytes_ left to transfer. | |
137 | */ | |
1df81302 | 138 | extern int get_dma_residue(unsigned int chan); |
1da177e4 LT |
139 | |
140 | #ifndef NO_DMA | |
141 | #define NO_DMA 255 | |
142 | #endif | |
143 | ||
f892027c PH |
144 | #endif /* CONFIG_ISA_DMA_API */ |
145 | ||
1da177e4 LT |
146 | #ifdef CONFIG_PCI |
147 | extern int isa_dma_bridge_buggy; | |
148 | #else | |
149 | #define isa_dma_bridge_buggy (0) | |
150 | #endif | |
151 | ||
dcea83ad | 152 | #endif /* __ASM_ARM_DMA_H */ |