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1da177e4 LT |
1 | #ifndef __ASM_ARM_DMA_H |
2 | #define __ASM_ARM_DMA_H | |
3 | ||
b9c78022 | 4 | #include <asm/memory.h> |
1da177e4 | 5 | |
d4c6fc99 RK |
6 | /* |
7 | * This is the maximum virtual address which can be DMA'd from. | |
8 | */ | |
9 | #ifndef MAX_DMA_ADDRESS | |
10 | #define MAX_DMA_ADDRESS 0xffffffff | |
11 | #endif | |
12 | ||
dcea83ad RK |
13 | #ifdef CONFIG_ISA_DMA_API |
14 | /* | |
15 | * This is used to support drivers written for the x86 ISA DMA API. | |
16 | * It should not be re-used except for that purpose. | |
17 | */ | |
18 | #include <linux/spinlock.h> | |
19 | #include <asm/system.h> | |
20 | #include <asm/scatterlist.h> | |
21 | ||
22 | typedef unsigned int dmach_t; | |
23 | ||
24 | #include <mach/dma.h> | |
25 | ||
1da177e4 LT |
26 | /* |
27 | * DMA modes | |
28 | */ | |
29 | typedef unsigned int dmamode_t; | |
30 | ||
31 | #define DMA_MODE_MASK 3 | |
32 | ||
33 | #define DMA_MODE_READ 0 | |
34 | #define DMA_MODE_WRITE 1 | |
35 | #define DMA_MODE_CASCADE 2 | |
36 | #define DMA_AUTOINIT 4 | |
37 | ||
38 | extern spinlock_t dma_spin_lock; | |
39 | ||
40 | static inline unsigned long claim_dma_lock(void) | |
41 | { | |
42 | unsigned long flags; | |
43 | spin_lock_irqsave(&dma_spin_lock, flags); | |
44 | return flags; | |
45 | } | |
46 | ||
47 | static inline void release_dma_lock(unsigned long flags) | |
48 | { | |
49 | spin_unlock_irqrestore(&dma_spin_lock, flags); | |
50 | } | |
51 | ||
52 | /* Clear the 'DMA Pointer Flip Flop'. | |
53 | * Write 0 for LSB/MSB, 1 for MSB/LSB access. | |
54 | */ | |
55 | #define clear_dma_ff(channel) | |
56 | ||
57 | /* Set only the page register bits of the transfer address. | |
58 | * | |
59 | * NOTE: This is an architecture specific function, and should | |
60 | * be hidden from the drivers | |
61 | */ | |
62 | extern void set_dma_page(dmach_t channel, char pagenr); | |
63 | ||
64 | /* Request a DMA channel | |
65 | * | |
66 | * Some architectures may need to do allocate an interrupt | |
67 | */ | |
68 | extern int request_dma(dmach_t channel, const char * device_id); | |
69 | ||
70 | /* Free a DMA channel | |
71 | * | |
72 | * Some architectures may need to do free an interrupt | |
73 | */ | |
74 | extern void free_dma(dmach_t channel); | |
75 | ||
76 | /* Enable DMA for this channel | |
77 | * | |
78 | * On some architectures, this may have other side effects like | |
79 | * enabling an interrupt and setting the DMA registers. | |
80 | */ | |
81 | extern void enable_dma(dmach_t channel); | |
82 | ||
83 | /* Disable DMA for this channel | |
84 | * | |
85 | * On some architectures, this may have other side effects like | |
86 | * disabling an interrupt or whatever. | |
87 | */ | |
88 | extern void disable_dma(dmach_t channel); | |
89 | ||
90 | /* Test whether the specified channel has an active DMA transfer | |
91 | */ | |
92 | extern int dma_channel_active(dmach_t channel); | |
93 | ||
94 | /* Set the DMA scatter gather list for this channel | |
95 | * | |
96 | * This should not be called if a DMA channel is enabled, | |
97 | * especially since some DMA architectures don't update the | |
98 | * DMA address immediately, but defer it to the enable_dma(). | |
99 | */ | |
100 | extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); | |
101 | ||
102 | /* Set the DMA address for this channel | |
103 | * | |
104 | * This should not be called if a DMA channel is enabled, | |
105 | * especially since some DMA architectures don't update the | |
106 | * DMA address immediately, but defer it to the enable_dma(). | |
107 | */ | |
333c9624 RK |
108 | extern void __set_dma_addr(dmach_t channel, void *addr); |
109 | #define set_dma_addr(channel, addr) \ | |
110 | __set_dma_addr(channel, bus_to_virt(addr)) | |
1da177e4 LT |
111 | |
112 | /* Set the DMA byte count for this channel | |
113 | * | |
114 | * This should not be called if a DMA channel is enabled, | |
115 | * especially since some DMA architectures don't update the | |
116 | * DMA count immediately, but defer it to the enable_dma(). | |
117 | */ | |
118 | extern void set_dma_count(dmach_t channel, unsigned long count); | |
119 | ||
120 | /* Set the transfer direction for this channel | |
121 | * | |
122 | * This should not be called if a DMA channel is enabled, | |
123 | * especially since some DMA architectures don't update the | |
124 | * DMA transfer direction immediately, but defer it to the | |
125 | * enable_dma(). | |
126 | */ | |
127 | extern void set_dma_mode(dmach_t channel, dmamode_t mode); | |
128 | ||
129 | /* Set the transfer speed for this channel | |
130 | */ | |
131 | extern void set_dma_speed(dmach_t channel, int cycle_ns); | |
132 | ||
133 | /* Get DMA residue count. After a DMA transfer, this | |
134 | * should return zero. Reading this while a DMA transfer is | |
135 | * still in progress will return unpredictable results. | |
136 | * If called before the channel has been used, it may return 1. | |
137 | * Otherwise, it returns the number of _bytes_ left to transfer. | |
138 | */ | |
139 | extern int get_dma_residue(dmach_t channel); | |
140 | ||
141 | #ifndef NO_DMA | |
142 | #define NO_DMA 255 | |
143 | #endif | |
144 | ||
145 | #ifdef CONFIG_PCI | |
146 | extern int isa_dma_bridge_buggy; | |
147 | #else | |
148 | #define isa_dma_bridge_buggy (0) | |
149 | #endif | |
150 | ||
dcea83ad RK |
151 | #endif /* CONFIG_ISA_DMA_API */ |
152 | ||
153 | #endif /* __ASM_ARM_DMA_H */ |