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1/*
2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
18
19#ifndef __ARM_KVM_HOST_H__
20#define __ARM_KVM_HOST_H__
21
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22#include <linux/types.h>
23#include <linux/kvm_types.h>
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24#include <asm/kvm.h>
25#include <asm/kvm_asm.h>
45e96ea6 26#include <asm/kvm_mmio.h>
f7ed45be 27#include <asm/fpstate.h>
7275acdf 28#include <kvm/arm_arch_timer.h>
749cf76c 29
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30#define __KVM_HAVE_ARCH_INTC_INITIALIZED
31
2b5e1e47 32#define KVM_USER_MEM_SLOTS 32
1138245c 33#define KVM_HAVE_ONE_REG
920552b2 34#define KVM_HALT_POLL_NS_DEFAULT 500000
749cf76c 35
7d0f84aa 36#define KVM_VCPU_MAX_FEATURES 2
749cf76c 37
7275acdf 38#include <kvm/arm_vgic.h>
1a89dd91 39
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40
41#ifdef CONFIG_ARM_GIC_V3
42#define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
43#else
ef748917 44#define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
acda5430 45#endif
ef748917 46
7b244e2b 47#define KVM_REQ_SLEEP \
2387149e 48 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
325f9c64 49#define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1)
b13216cf 50
749cf76c 51u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
6951e48b 52int __attribute_const__ kvm_target_cpu(void);
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53int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
54void kvm_reset_coprocs(struct kvm_vcpu *vcpu);
55
56struct kvm_arch {
57 /* VTTBR value associated with below pgd and vmid */
58 u64 vttbr;
59
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60 /* The last vcpu id that ran on each physical CPU */
61 int __percpu *last_vcpu_ran;
62
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63 /*
64 * Anything that is not used directly from assembly code goes
65 * here.
66 */
67
68 /* The VMID generation used for the virt. memory system */
69 u64 vmid_gen;
70 u32 vmid;
71
72 /* Stage-2 page table */
73 pgd_t *pgd;
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74
75 /* Interrupt controller */
76 struct vgic_dist vgic;
3caa2d8c 77 int max_vcpus;
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78};
79
80#define KVM_NR_MEM_OBJS 40
81
82/*
83 * We don't want allocation failures within the mmu code, so we preallocate
84 * enough memory for a single page fault in a cache.
85 */
86struct kvm_mmu_memory_cache {
87 int nobjs;
88 void *objects[KVM_NR_MEM_OBJS];
89};
90
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91struct kvm_vcpu_fault_info {
92 u32 hsr; /* Hyp Syndrome Register */
93 u32 hxfar; /* Hyp Data/Inst. Fault Address Register */
94 u32 hpfar; /* Hyp IPA Fault Address Register */
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95};
96
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97/*
98 * 0 is reserved as an invalid value.
99 * Order should be kept in sync with the save/restore code.
100 */
101enum vcpu_sysreg {
102 __INVALID_SYSREG__,
103 c0_MPIDR, /* MultiProcessor ID Register */
104 c0_CSSELR, /* Cache Size Selection Register */
105 c1_SCTLR, /* System Control Register */
106 c1_ACTLR, /* Auxiliary Control Register */
107 c1_CPACR, /* Coprocessor Access Control */
108 c2_TTBR0, /* Translation Table Base Register 0 */
109 c2_TTBR0_high, /* TTBR0 top 32 bits */
110 c2_TTBR1, /* Translation Table Base Register 1 */
111 c2_TTBR1_high, /* TTBR1 top 32 bits */
112 c2_TTBCR, /* Translation Table Base Control R. */
113 c3_DACR, /* Domain Access Control Register */
114 c5_DFSR, /* Data Fault Status Register */
115 c5_IFSR, /* Instruction Fault Status Register */
116 c5_ADFSR, /* Auxilary Data Fault Status R */
117 c5_AIFSR, /* Auxilary Instrunction Fault Status R */
118 c6_DFAR, /* Data Fault Address Register */
119 c6_IFAR, /* Instruction Fault Address Register */
120 c7_PAR, /* Physical Address Register */
121 c7_PAR_high, /* PAR top 32 bits */
122 c9_L2CTLR, /* Cortex A15/A7 L2 Control Register */
123 c10_PRRR, /* Primary Region Remap Register */
124 c10_NMRR, /* Normal Memory Remap Register */
125 c12_VBAR, /* Vector Base Address Register */
126 c13_CID, /* Context ID Register */
127 c13_TID_URW, /* Thread ID, User R/W */
128 c13_TID_URO, /* Thread ID, User R/O */
129 c13_TID_PRIV, /* Thread ID, Privileged */
130 c14_CNTKCTL, /* Timer Control Register (PL1) */
131 c10_AMAIR0, /* Auxilary Memory Attribute Indirection Reg0 */
132 c10_AMAIR1, /* Auxilary Memory Attribute Indirection Reg1 */
133 NR_CP15_REGS /* Number of regs (incl. invalid) */
134};
135
0ca5565d 136struct kvm_cpu_context {
c2a8dab5 137 struct kvm_regs gp_regs;
0ca5565d 138 struct vfp_hard_struct vfp;
fb32a52a 139 u32 cp15[NR_CP15_REGS];
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140};
141
142typedef struct kvm_cpu_context kvm_cpu_context_t;
9c7a6432 143
749cf76c 144struct kvm_vcpu_arch {
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145 struct kvm_cpu_context ctxt;
146
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147 int target; /* Processor target */
148 DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES);
149
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150 /* The CPU type we expose to the VM */
151 u32 midr;
152
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153 /* HYP trapping configuration */
154 u32 hcr;
155
156 /* Interrupt related fields */
157 u32 irq_lines; /* IRQ and FIQ levels */
158
749cf76c 159 /* Exception Information */
7393b599 160 struct kvm_vcpu_fault_info fault;
749cf76c 161
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162 /* Host FP context */
163 kvm_cpu_context_t *host_cpu_context;
f7ed45be 164
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165 /* VGIC state */
166 struct vgic_cpu vgic_cpu;
53e72406 167 struct arch_timer_cpu timer_cpu;
1a89dd91 168
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169 /*
170 * Anything that is not used directly from assembly code goes
171 * here.
172 */
5b3e5e5b 173
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174 /* vcpu power-off state */
175 bool power_off;
aa024c2f 176
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177 /* Don't run the guest (internal implementation need) */
178 bool pause;
179
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180 /* IO related fields */
181 struct kvm_decode mmio_decode;
182
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183 /* Cache some mmu pages needed inside spinlock regions */
184 struct kvm_mmu_memory_cache mmu_page_cache;
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185
186 /* Detect first run of a vcpu */
187 bool has_run_once;
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188};
189
190struct kvm_vm_stat {
8a7e75d4 191 ulong remote_tlb_flush;
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192};
193
194struct kvm_vcpu_stat {
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195 u64 halt_successful_poll;
196 u64 halt_attempted_poll;
197 u64 halt_poll_invalid;
198 u64 halt_wakeup;
199 u64 hvc_exit_stat;
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200 u64 wfe_exit_stat;
201 u64 wfi_exit_stat;
202 u64 mmio_exit_user;
203 u64 mmio_exit_kernel;
204 u64 exits;
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205};
206
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207#define vcpu_cp15(v,r) (v)->arch.ctxt.cp15[r]
208
4a6fee80 209int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init);
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210unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
211int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
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212int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
213int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
b57cd6f6 214unsigned long kvm_call_hyp(void *hypfn, ...);
f7ed45be 215void force_vm_exit(const cpumask_t *mask);
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216
217#define KVM_ARCH_WANT_MMU_NOTIFIER
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218int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
219int kvm_unmap_hva_range(struct kvm *kvm,
220 unsigned long start, unsigned long end);
221void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
222
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223unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
224int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
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225int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
226int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1138245c 227
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228struct kvm_vcpu *kvm_arm_get_running_vcpu(void);
229struct kvm_vcpu __percpu **kvm_get_running_vcpus(void);
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230void kvm_arm_halt_guest(struct kvm *kvm);
231void kvm_arm_resume_guest(struct kvm *kvm);
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232
233int kvm_arm_copy_coproc_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
234unsigned long kvm_arm_num_coproc_regs(struct kvm_vcpu *vcpu);
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235int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
236int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
237
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238int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
239 int exception_index);
240
12fda812 241static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr,
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242 unsigned long hyp_stack_ptr,
243 unsigned long vector_ptr)
244{
e7858c58 245 /*
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246 * Call initialization code, and switch to the full blown HYP
247 * code. The init code doesn't need to preserve these
248 * registers as r0-r3 are already callee saved according to
249 * the AAPCS.
cd602a37 250 * Note that we slightly misuse the prototype by casting the
5a677ce0 251 * stack pointer to a void *.
5a677ce0 252
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253 * The PGDs are always passed as the third argument, in order
254 * to be passed into r2-r3 to the init code (yes, this is
255 * compliant with the PCS!).
256 */
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257
258 kvm_call_hyp((void*)hyp_stack_ptr, vector_ptr, pgd_ptr);
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259}
260
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261static inline void __cpu_init_stage2(void)
262{
d4c7688c 263 kvm_call_hyp(__init_stage2_translation);
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264}
265
b46f01ce 266static inline int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext)
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267{
268 return 0;
269}
270
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271int kvm_perf_init(void);
272int kvm_perf_teardown(void);
273
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274void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot);
275
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276struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
277
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278static inline void kvm_arch_hardware_unsetup(void) {}
279static inline void kvm_arch_sync_events(struct kvm *kvm) {}
280static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {}
281static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
3491caf2 282static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
0865e636 283
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284static inline void kvm_arm_init_debug(void) {}
285static inline void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) {}
286static inline void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) {}
84e690bf 287static inline void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu) {}
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288
289int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
290 struct kvm_device_attr *attr);
291int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
292 struct kvm_device_attr *attr);
293int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
294 struct kvm_device_attr *attr);
56c7f5e7 295
749cf76c 296#endif /* __ARM_KVM_HOST_H__ */