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1da177e4 | 1 | /* |
4baa9922 | 2 | * arch/arm/include/asm/memory.h |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2000-2002 Russell King | |
002547b4 | 5 | * modification for nommu, Hyok S. Choi, 2004 |
1da177e4 LT |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * Note: this file should not be included by non-asm/.h files | |
12 | */ | |
13 | #ifndef __ASM_ARM_MEMORY_H | |
14 | #define __ASM_ARM_MEMORY_H | |
15 | ||
8d5796d2 LB |
16 | #include <linux/compiler.h> |
17 | #include <linux/const.h> | |
3a6b1676 | 18 | #include <linux/types.h> |
158e8bfe | 19 | #include <linux/sizes.h> |
8d5796d2 | 20 | |
4756dcbf CC |
21 | #include <asm/cache.h> |
22 | ||
0cdc8b92 | 23 | #ifdef CONFIG_NEED_MACH_MEMORY_H |
1b9f95f8 NP |
24 | #include <mach/memory.h> |
25 | #endif | |
26 | ||
f09b9979 NP |
27 | /* |
28 | * Allow for constants defined here to be used from assembly code | |
29 | * by prepending the UL suffix only with actual C code compilation. | |
30 | */ | |
8d5796d2 | 31 | #define UL(x) _AC(x, UL) |
1da177e4 | 32 | |
002547b4 RK |
33 | #ifdef CONFIG_MMU |
34 | ||
1da177e4 | 35 | /* |
8d5796d2 | 36 | * PAGE_OFFSET - the virtual address of the start of the kernel image |
1da177e4 LT |
37 | * TASK_SIZE - the maximum size of a user space task. |
38 | * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area | |
39 | */ | |
8d5796d2 | 40 | #define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET) |
5d1c20bc | 41 | #define TASK_SIZE (UL(CONFIG_PAGE_OFFSET) - UL(SZ_16M)) |
79d1f5c9 | 42 | #define TASK_UNMAPPED_BASE ALIGN(TASK_SIZE / 3, SZ_16M) |
1da177e4 LT |
43 | |
44 | /* | |
45 | * The maximum size of a 26-bit user space task. | |
46 | */ | |
5d1c20bc | 47 | #define TASK_SIZE_26 (UL(1) << 26) |
1da177e4 | 48 | |
002547b4 RK |
49 | /* |
50 | * The module space lives between the addresses given by TASK_SIZE | |
51 | * and PAGE_OFFSET - it must be within 32MB of the kernel text. | |
52 | */ | |
adca6dc2 | 53 | #ifndef CONFIG_THUMB2_KERNEL |
5d1c20bc | 54 | #define MODULES_VADDR (PAGE_OFFSET - SZ_16M) |
adca6dc2 CM |
55 | #else |
56 | /* smaller range for Thumb-2 symbols relocation (2^24)*/ | |
5d1c20bc | 57 | #define MODULES_VADDR (PAGE_OFFSET - SZ_8M) |
adca6dc2 CM |
58 | #endif |
59 | ||
ab4f2ee1 | 60 | #if TASK_SIZE > MODULES_VADDR |
002547b4 RK |
61 | #error Top of user space clashes with start of module space |
62 | #endif | |
63 | ||
d73cd428 NP |
64 | /* |
65 | * The highmem pkmap virtual space shares the end of the module area. | |
66 | */ | |
67 | #ifdef CONFIG_HIGHMEM | |
68 | #define MODULES_END (PAGE_OFFSET - PMD_SIZE) | |
69 | #else | |
70 | #define MODULES_END (PAGE_OFFSET) | |
71 | #endif | |
72 | ||
002547b4 RK |
73 | /* |
74 | * The XIP kernel gets mapped at the bottom of the module vm area. | |
75 | * Since we use sections to map it, this macro replaces the physical address | |
76 | * with its virtual address while keeping offset from the base section. | |
77 | */ | |
ab4f2ee1 | 78 | #define XIP_VIRT_ADDR(physaddr) (MODULES_VADDR + ((physaddr) & 0x000fffff)) |
002547b4 | 79 | |
ff0daca5 | 80 | /* |
a069c896 | 81 | * Allow 16MB-aligned ioremap pages |
ff0daca5 | 82 | */ |
a069c896 | 83 | #define IOREMAP_MAX_ORDER 24 |
ff0daca5 | 84 | |
a7bd08c8 | 85 | #define CONSISTENT_END (0xffe00000UL) |
a7bd08c8 | 86 | |
002547b4 RK |
87 | #else /* CONFIG_MMU */ |
88 | ||
89 | /* | |
90 | * The limitation of user task size can grow up to the end of free ram region. | |
91 | * It is difficult to define and perhaps will never meet the original meaning | |
92 | * of this define that was meant to. | |
93 | * Fortunately, there is no reference for this in noMMU mode, for now. | |
94 | */ | |
95 | #ifndef TASK_SIZE | |
96 | #define TASK_SIZE (CONFIG_DRAM_SIZE) | |
97 | #endif | |
98 | ||
99 | #ifndef TASK_UNMAPPED_BASE | |
100 | #define TASK_UNMAPPED_BASE UL(0x00000000) | |
101 | #endif | |
102 | ||
002547b4 | 103 | #ifndef END_MEM |
c931b4f6 | 104 | #define END_MEM (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE) |
002547b4 RK |
105 | #endif |
106 | ||
107 | #ifndef PAGE_OFFSET | |
b713aa0b | 108 | #define PAGE_OFFSET PLAT_PHYS_OFFSET |
002547b4 RK |
109 | #endif |
110 | ||
111 | /* | |
112 | * The module can be at any place in ram in nommu mode. | |
113 | */ | |
ab4f2ee1 | 114 | #define MODULES_END (END_MEM) |
b713aa0b | 115 | #define MODULES_VADDR PAGE_OFFSET |
002547b4 | 116 | |
38b4205a UKK |
117 | #define XIP_VIRT_ADDR(physaddr) (physaddr) |
118 | ||
002547b4 RK |
119 | #endif /* !CONFIG_MMU */ |
120 | ||
1dbd30e9 LW |
121 | /* |
122 | * We fix the TCM memories max 32 KiB ITCM resp DTCM at these | |
123 | * locations | |
124 | */ | |
125 | #ifdef CONFIG_HAVE_TCM | |
126 | #define ITCM_OFFSET UL(0xfffe0000) | |
127 | #define DTCM_OFFSET UL(0xfffe8000) | |
128 | #endif | |
129 | ||
9d4ae727 DS |
130 | /* |
131 | * Convert a physical address to a Page Frame Number and back | |
132 | */ | |
3a6b1676 WD |
133 | #define __phys_to_pfn(paddr) ((unsigned long)((paddr) >> PAGE_SHIFT)) |
134 | #define __pfn_to_phys(pfn) ((phys_addr_t)(pfn) << PAGE_SHIFT) | |
9d4ae727 | 135 | |
719301ff RK |
136 | /* |
137 | * Convert a page to/from a physical address | |
138 | */ | |
139 | #define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page))) | |
140 | #define phys_to_page(phys) (pfn_to_page(__phys_to_pfn(phys))) | |
141 | ||
4756dcbf CC |
142 | /* |
143 | * Minimum guaranted alignment in pgd_alloc(). The page table pointers passed | |
144 | * around in head.S and proc-*.S are shifted by this amount, in order to | |
145 | * leave spare high bits for systems with physical address extension. This | |
146 | * does not fully accomodate the 40-bit addressing capability of ARM LPAE, but | |
147 | * gives us about 38-bits or so. | |
148 | */ | |
149 | #ifdef CONFIG_ARM_LPAE | |
150 | #define ARCH_PGD_SHIFT L1_CACHE_SHIFT | |
151 | #else | |
152 | #define ARCH_PGD_SHIFT 0 | |
153 | #endif | |
154 | #define ARCH_PGD_MASK ((1 << ARCH_PGD_SHIFT) - 1) | |
155 | ||
b713aa0b RK |
156 | /* |
157 | * PLAT_PHYS_OFFSET is the offset (from zero) of the start of physical | |
158 | * memory. This is used for XIP and NoMMU kernels, or by kernels which | |
159 | * have their own mach/memory.h. Assembly code must always use | |
160 | * PLAT_PHYS_OFFSET and not PHYS_OFFSET. | |
161 | */ | |
162 | #ifndef PLAT_PHYS_OFFSET | |
163 | #define PLAT_PHYS_OFFSET UL(CONFIG_PHYS_OFFSET) | |
164 | #endif | |
165 | ||
1da177e4 LT |
166 | #ifndef __ASSEMBLY__ |
167 | ||
dc21af99 RK |
168 | /* |
169 | * Physical vs virtual RAM address space conversion. These are | |
170 | * private definitions which should NOT be used outside memory.h | |
171 | * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. | |
172 | */ | |
173 | #ifndef __virt_to_phys | |
174 | #ifdef CONFIG_ARM_PATCH_PHYS_VIRT | |
175 | ||
cada3c08 RK |
176 | /* |
177 | * Constants used to force the right instruction encodings and shifts | |
178 | * so that all we need to do is modify the 8-bit constant field. | |
179 | */ | |
180 | #define __PV_BITS_31_24 0x81000000 | |
f52bb722 | 181 | #define __PV_BITS_7_0 0x81 |
cada3c08 | 182 | |
f52bb722 S |
183 | extern u64 __pv_phys_offset; |
184 | extern u64 __pv_offset; | |
185 | extern void fixup_pv_table(const void *, unsigned long); | |
186 | extern const void *__pv_table_begin, *__pv_table_end; | |
187 | ||
dc21af99 RK |
188 | #define PHYS_OFFSET __pv_phys_offset |
189 | ||
cada3c08 | 190 | #define __pv_stub(from,to,instr,type) \ |
dc21af99 RK |
191 | __asm__("@ __pv_stub\n" \ |
192 | "1: " instr " %0, %1, %2\n" \ | |
193 | " .pushsection .pv_table,\"a\"\n" \ | |
194 | " .long 1b\n" \ | |
195 | " .popsection\n" \ | |
196 | : "=r" (to) \ | |
cada3c08 | 197 | : "r" (from), "I" (type)) |
dc21af99 | 198 | |
f52bb722 S |
199 | #define __pv_stub_mov_hi(t) \ |
200 | __asm__ volatile("@ __pv_stub_mov\n" \ | |
201 | "1: mov %R0, %1\n" \ | |
202 | " .pushsection .pv_table,\"a\"\n" \ | |
203 | " .long 1b\n" \ | |
204 | " .popsection\n" \ | |
205 | : "=r" (t) \ | |
206 | : "I" (__PV_BITS_7_0)) | |
207 | ||
208 | #define __pv_add_carry_stub(x, y) \ | |
209 | __asm__ volatile("@ __pv_add_carry_stub\n" \ | |
210 | "1: adds %Q0, %1, %2\n" \ | |
211 | " adc %R0, %R0, #0\n" \ | |
212 | " .pushsection .pv_table,\"a\"\n" \ | |
213 | " .long 1b\n" \ | |
214 | " .popsection\n" \ | |
215 | : "+r" (y) \ | |
216 | : "r" (x), "I" (__PV_BITS_31_24) \ | |
217 | : "cc") | |
218 | ||
ca5a45c0 | 219 | static inline phys_addr_t __virt_to_phys(unsigned long x) |
dc21af99 | 220 | { |
f52bb722 S |
221 | phys_addr_t t; |
222 | ||
223 | if (sizeof(phys_addr_t) == 4) { | |
224 | __pv_stub(x, t, "add", __PV_BITS_31_24); | |
225 | } else { | |
226 | __pv_stub_mov_hi(t); | |
227 | __pv_add_carry_stub(x, t); | |
228 | } | |
dc21af99 RK |
229 | return t; |
230 | } | |
231 | ||
ca5a45c0 | 232 | static inline unsigned long __phys_to_virt(phys_addr_t x) |
dc21af99 RK |
233 | { |
234 | unsigned long t; | |
139cc2ba VK |
235 | |
236 | /* | |
237 | * 'unsigned long' cast discard upper word when | |
238 | * phys_addr_t is 64 bit, and makes sure that inline | |
239 | * assembler expression receives 32 bit argument | |
240 | * in place where 'r' 32 bit operand is expected. | |
241 | */ | |
242 | __pv_stub((unsigned long) x, t, "sub", __PV_BITS_31_24); | |
dc21af99 RK |
243 | return t; |
244 | } | |
ca5a45c0 | 245 | |
dc21af99 | 246 | #else |
ca5a45c0 | 247 | |
b713aa0b RK |
248 | #define PHYS_OFFSET PLAT_PHYS_OFFSET |
249 | ||
ca5a45c0 SS |
250 | static inline phys_addr_t __virt_to_phys(unsigned long x) |
251 | { | |
252 | return (phys_addr_t)x - PAGE_OFFSET + PHYS_OFFSET; | |
253 | } | |
254 | ||
255 | static inline unsigned long __phys_to_virt(phys_addr_t x) | |
256 | { | |
257 | return x - PHYS_OFFSET + PAGE_OFFSET; | |
258 | } | |
259 | ||
dc21af99 RK |
260 | #endif |
261 | #endif | |
b4ad5155 | 262 | |
1da177e4 LT |
263 | /* |
264 | * PFNs are used to describe any physical page; this means | |
265 | * PFN 0 == physical address 0. | |
266 | * | |
267 | * This is the PFN of the first RAM page in the kernel | |
268 | * direct-mapped view. We assume this is the first page | |
269 | * of RAM in the mem_map as well. | |
270 | */ | |
5b20c5b2 | 271 | #define PHYS_PFN_OFFSET ((unsigned long)(PHYS_OFFSET >> PAGE_SHIFT)) |
1da177e4 LT |
272 | |
273 | /* | |
274 | * These are *only* valid on the kernel direct mapped RAM memory. | |
275 | * Note: Drivers should NOT use these. They are the wrong | |
276 | * translation for translating DMA addresses. Use the driver | |
277 | * DMA support - see dma-mapping.h. | |
278 | */ | |
3a6b1676 | 279 | static inline phys_addr_t virt_to_phys(const volatile void *x) |
1da177e4 LT |
280 | { |
281 | return __virt_to_phys((unsigned long)(x)); | |
282 | } | |
283 | ||
3a6b1676 | 284 | static inline void *phys_to_virt(phys_addr_t x) |
1da177e4 | 285 | { |
ca5a45c0 | 286 | return (void *)__phys_to_virt(x); |
1da177e4 LT |
287 | } |
288 | ||
289 | /* | |
290 | * Drivers should NOT use these either. | |
291 | */ | |
292 | #define __pa(x) __virt_to_phys((unsigned long)(x)) | |
ca5a45c0 | 293 | #define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x))) |
31a5539e | 294 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) |
1da177e4 | 295 | |
5e4432d3 RK |
296 | extern phys_addr_t (*arch_virt_to_idmap)(unsigned long x); |
297 | ||
4dc9a817 SS |
298 | /* |
299 | * These are for systems that have a hardware interconnect supported alias of | |
300 | * physical memory for idmap purposes. Most cases should leave these | |
301 | * untouched. | |
302 | */ | |
303 | static inline phys_addr_t __virt_to_idmap(unsigned long x) | |
304 | { | |
305 | if (arch_virt_to_idmap) | |
306 | return arch_virt_to_idmap(x); | |
307 | else | |
308 | return __virt_to_phys(x); | |
309 | } | |
310 | ||
311 | #define virt_to_idmap(x) __virt_to_idmap((unsigned long)(x)) | |
312 | ||
1da177e4 LT |
313 | /* |
314 | * Virtual <-> DMA view memory address translations | |
315 | * Again, these are *only* valid on the kernel direct mapped RAM | |
316 | * memory. Use of these is *deprecated* (and that doesn't mean | |
317 | * use the __ prefixed forms instead.) See dma-mapping.h. | |
318 | */ | |
b5ee9002 NP |
319 | #ifndef __virt_to_bus |
320 | #define __virt_to_bus __virt_to_phys | |
321 | #define __bus_to_virt __phys_to_virt | |
1c4a4f48 RK |
322 | #define __pfn_to_bus(x) __pfn_to_phys(x) |
323 | #define __bus_to_pfn(x) __phys_to_pfn(x) | |
b5ee9002 NP |
324 | #endif |
325 | ||
a5d533ee | 326 | #ifdef CONFIG_VIRT_TO_BUS |
1da177e4 LT |
327 | static inline __deprecated unsigned long virt_to_bus(void *x) |
328 | { | |
329 | return __virt_to_bus((unsigned long)x); | |
330 | } | |
331 | ||
332 | static inline __deprecated void *bus_to_virt(unsigned long x) | |
333 | { | |
334 | return (void *)__bus_to_virt(x); | |
335 | } | |
a5d533ee | 336 | #endif |
1da177e4 LT |
337 | |
338 | /* | |
339 | * Conversion between a struct page and a physical address. | |
340 | * | |
1da177e4 LT |
341 | * page_to_pfn(page) convert a struct page * to a PFN number |
342 | * pfn_to_page(pfn) convert a _valid_ PFN number to struct page * | |
1da177e4 LT |
343 | * |
344 | * virt_to_page(k) convert a _valid_ virtual address to struct page * | |
345 | * virt_addr_valid(k) indicates whether a virtual address is valid | |
346 | */ | |
7d129637 | 347 | #define ARCH_PFN_OFFSET PHYS_PFN_OFFSET |
05944d74 | 348 | |
7d129637 | 349 | #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) |
1da177e4 LT |
350 | #define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory) |
351 | ||
1da177e4 LT |
352 | #endif |
353 | ||
7eb98a2f KH |
354 | #include <asm-generic/memory_model.h> |
355 | ||
1da177e4 | 356 | #endif |