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7ada189f JI |
1 | /* |
2 | * linux/arch/arm/include/asm/perf_event.h | |
3 | * | |
4 | * Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | */ | |
11 | ||
12 | #ifndef __ARM_PERF_EVENT_H__ | |
13 | #define __ARM_PERF_EVENT_H__ | |
14 | ||
15 | /* | |
16 | * NOP: on *most* (read: all supported) ARM platforms, the performance | |
17 | * counter interrupts are regular interrupts and not an NMI. This | |
18 | * means that when we receive the interrupt we can call | |
19 | * perf_event_do_pending() that handles all of the work with | |
20 | * interrupts enabled. | |
21 | */ | |
22 | static inline void | |
23 | set_perf_event_pending(void) | |
24 | { | |
25 | } | |
26 | ||
27 | /* ARM performance counters start from 1 (in the cp15 accesses) so use the | |
28 | * same indexes here for consistency. */ | |
29 | #define PERF_EVENT_INDEX_OFFSET 1 | |
30 | ||
31 | #endif /* __ARM_PERF_EVENT_H__ */ |